Jz4740 timer driver: only init timer in timer_set() when start is true

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22075 a1c6a512-1295-4272-9138-f99709370657

1 files changed, 19 insertions, 12 deletions

diff --git a/firmware/target/mips/ingenic_jz47xx/timer-jz4740.c b/firmware/target/mips/ingenic_jz47xx/timer-jz4740.c
index c174ca6eb1..5bc030eeb2 100644
--- a/firmware/target/mips/ingenic_jz47xx/timer-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/timer-jz4740.c
@@ -46,17 +46,6 @@ bool timer_set(long cycles, bool start)
         pfn_unregister = NULL;
     }
 
-    old_irq = disable_irq_save();
-
-    __tcu_stop_counter(1);
-    __tcu_disable_pwm_output(1);
-
-    __tcu_mask_half_match_irq(1); 
-    __tcu_unmask_full_match_irq(1);
-
-    /* EXTAL clock = CFG_EXTAL (12Mhz in most targets) */
-    __tcu_select_extalclk(1);
-
     /* Increase prescale values starting from 0 to make the cycle count fit */
     while(divider > 65535 && prescaler <= 1024)
     {
@@ -65,6 +54,20 @@ bool timer_set(long cycles, bool start)
         divider = cycles / prescaler;
     }
 
+    old_irq = disable_irq_save();
+
+    __tcu_stop_counter(1);
+    if(start)
+    {
+        __tcu_disable_pwm_output(1);
+
+        __tcu_mask_half_match_irq(1); 
+        __tcu_unmask_full_match_irq(1);
+
+        /* EXTAL clock = CFG_EXTAL (12Mhz in most targets) */
+        __tcu_select_extalclk(1);
+    }
+
     REG_TCU_TCSR(1) = (REG_TCU_TCSR(1) & ~TCU_TCSR_PRESCALE_MASK) | (prescaler_bit << TCU_TCSR_PRESCALE_BIT);
     REG_TCU_TCNT(1) = 0;
     REG_TCU_TDHR(1) = 0;
@@ -72,7 +75,11 @@ bool timer_set(long cycles, bool start)
 
     __tcu_clear_full_match_flag(1);
 
-    system_enable_irq(IRQ_TCU1);
+    if(start)
+    {
+        system_enable_irq(IRQ_TCU1);
+        __tcu_start_counter(1);
+    }
 
     restore_irq(old_irq);