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authorAmaury Pouly <amaury.pouly@gmail.com>2012-12-14 12:06:11 +0100
committerAmaury Pouly <amaury.pouly@gmail.com>2012-12-14 12:06:11 +0100
commitcdaef6f3826ebac6f1a8e6862dc1a5c0563a957b (patch)
treec867795f047efaa8b275159abf50f4ab54798499
parent788bf2e3b25a52fa0dca3cf1266a6570391b83a7 (diff)
downloadrockbox-cdaef6f3826ebac6f1a8e6862dc1a5c0563a957b.tar.gz
rockbox-cdaef6f3826ebac6f1a8e6862dc1a5c0563a957b.zip
imxtools/hwemul: remove useless code (pwm)
The PWM code was for testing only the Zen X-Fi and should be present in general because it could touch pins by error and without producing any result. Change-Id: Id20e2940cd7a057941d241254d0a867f5451e2db
-rw-r--r--utils/imxtools/hwemul/dev/main.c102
1 files changed, 0 insertions, 102 deletions
diff --git a/utils/imxtools/hwemul/dev/main.c b/utils/imxtools/hwemul/dev/main.c
index 5adbb9fd23..09bb6c7714 100644
--- a/utils/imxtools/hwemul/dev/main.c
+++ b/utils/imxtools/hwemul/dev/main.c
@@ -780,91 +780,6 @@ static void udelay(unsigned us)
780 780
781/** 781/**
782 * 782 *
783 * PWM
784 *
785 */
786
787#define HW_PWM_BASE 0x80064000
788
789#define HW_PWM_CTRL (*(volatile uint32_t *)(HW_PWM_BASE + 0x0))
790#define HW_PWM_CTRL__PWMx_ENABLE(x) (1 << (x))
791
792#define HW_PWM_ACTIVEx(x) (*(volatile uint32_t *)(HW_PWM_BASE + 0x10 + (x) * 0x20))
793#define HW_PWM_ACTIVEx__ACTIVE_BP 0
794#define HW_PWM_ACTIVEx__ACTIVE_BM 0xffff
795#define HW_PWM_ACTIVEx__INACTIVE_BP 16
796#define HW_PWM_ACTIVEx__INACTIVE_BM 0xffff0000
797
798#define HW_PWM_PERIODx(x) (*(volatile uint32_t *)(HW_PWM_BASE + 0x20 + (x) * 0x20))
799#define HW_PWM_PERIODx__PERIOD_BP 0
800#define HW_PWM_PERIODx__PERIOD_BM 0xffff
801#define HW_PWM_PERIODx__ACTIVE_STATE_BP 16
802#define HW_PWM_PERIODx__ACTIVE_STATE_BM (0x3 << 16)
803#define HW_PWM_PERIODx__INACTIVE_STATE_BP 18
804#define HW_PWM_PERIODx__INACTIVE_STATE_BM (0x3 << 18)
805#define HW_PWM_PERIODx__CDIV_BP 20
806#define HW_PWM_PERIODx__CDIV_BM (0x7 << 20)
807#define HW_PWM_PERIODx__CDIV__DIV_1 0
808#define HW_PWM_PERIODx__CDIV__DIV_2 1
809#define HW_PWM_PERIODx__CDIV__DIV_4 2
810#define HW_PWM_PERIODx__CDIV__DIV_8 3
811#define HW_PWM_PERIODx__CDIV__DIV_16 4
812#define HW_PWM_PERIODx__CDIV__DIV_64 5
813#define HW_PWM_PERIODx__CDIV__DIV_256 6
814#define HW_PWM_PERIODx__CDIV__DIV_1024 7
815
816#define HW_PWM_PERIODx__STATE__HI_Z 0
817#define HW_PWM_PERIODx__STATE__LOW 2
818#define HW_PWM_PERIODx__STATE__HIGH 3
819
820#define IMX233_PWM_PIN_BANK(channel) 2
821#define IMX233_PWM_PIN(channel) (0 + (channel))
822
823static void imx233_pwm_init(void)
824{
825 //__REG_SET(HW_PWM_CTRL) = __BLOCK_SFTRST;
826 __REG_CLR(HW_PWM_CTRL) = __BLOCK_SFTRST | __BLOCK_CLKGATE;
827 while(HW_PWM_CTRL & __BLOCK_CLKGATE);
828 __REG_CLR(HW_CLKCTRL_XTAL) = HW_CLKCTRL_XTAL__PWM_CLK24M_GATE;
829}
830
831static bool imx233_pwm_is_channel_enable(int channel)
832{
833 return HW_PWM_CTRL & HW_PWM_CTRL__PWMx_ENABLE(channel);
834}
835
836static void imx233_pwm_enable_channel(int channel, bool enable)
837{
838 if(enable)
839 __REG_SET(HW_PWM_CTRL) = HW_PWM_CTRL__PWMx_ENABLE(channel);
840 else
841 __REG_CLR(HW_PWM_CTRL) = HW_PWM_CTRL__PWMx_ENABLE(channel);
842}
843
844static void imx233_pwm_setup_channel(int channel, int period, int cdiv, int active,
845 int active_state, int inactive, int inactive_state)
846{
847 /* stop */
848 bool enable = imx233_pwm_is_channel_enable(channel);
849 if(enable)
850 imx233_pwm_enable_channel(channel, false);
851 /* setup pin */
852 imx233_set_pin_function(IMX233_PWM_PIN_BANK(channel), IMX233_PWM_PIN(channel),
853 PINCTRL_FUNCTION_MAIN);
854 imx233_set_pin_drive_strength(IMX233_PWM_PIN_BANK(channel), IMX233_PWM_PIN(channel),
855 PINCTRL_DRIVE_4mA);
856 /* watch the order ! active THEN period */
857 HW_PWM_ACTIVEx(channel) = active << HW_PWM_ACTIVEx__ACTIVE_BP |
858 inactive << HW_PWM_ACTIVEx__INACTIVE_BP;
859 HW_PWM_PERIODx(channel) = period | active_state << HW_PWM_PERIODx__ACTIVE_STATE_BP |
860 inactive_state << HW_PWM_PERIODx__INACTIVE_STATE_BP |
861 cdiv << HW_PWM_PERIODx__CDIV_BP;
862 /* restore */
863 imx233_pwm_enable_channel(channel, enable);
864}
865
866/**
867 *
868 * USB PHY 783 * USB PHY
869 * 784 *
870 */ 785 */
@@ -1430,13 +1345,6 @@ static void handle_class_req(struct usb_ctrlrequest *req)
1430 * 1345 *
1431 */ 1346 */
1432 1347
1433static void flash_pwm(int chan, int v1, int v2)
1434{
1435 imx233_pwm_setup_channel(chan, 500, HW_PWM_PERIODx__CDIV__DIV_256,
1436 v1, HW_PWM_PERIODx__STATE__HIGH,
1437 v2, HW_PWM_PERIODx__STATE__LOW);
1438}
1439
1440void main(uint32_t arg) 1348void main(uint32_t arg)
1441{ 1349{
1442 usb_buffer_size = oc_buffersize; 1350 usb_buffer_size = oc_buffersize;
@@ -1445,13 +1353,6 @@ void main(uint32_t arg)
1445 HWEMUL_VERSION_REV); 1353 HWEMUL_VERSION_REV);
1446 logf("argument: 0x%08x\n", arg); 1354 logf("argument: 0x%08x\n", arg);
1447 1355
1448 imx233_pwm_init();
1449
1450 flash_pwm(2, 0, 500);
1451 flash_pwm(4, 0, 0);
1452
1453 udelay(HZ / 2);
1454
1455 /* we don't know if USB was connected or not. In USB recovery mode it will 1356 /* we don't know if USB was connected or not. In USB recovery mode it will
1456 * but in other cases it might not be. In doubt, disconnect */ 1357 * but in other cases it might not be. In doubt, disconnect */
1457 REG_USBCMD &= ~USBCMD_RUN; 1358 REG_USBCMD &= ~USBCMD_RUN;
@@ -1481,9 +1382,6 @@ void main(uint32_t arg)
1481 REG_ENDPTSETUPSTAT = EPSETUP_STATUS_EP0; 1382 REG_ENDPTSETUPSTAT = EPSETUP_STATUS_EP0;
1482 /* run! */ 1383 /* run! */
1483 REG_USBCMD |= USBCMD_RUN; 1384 REG_USBCMD |= USBCMD_RUN;
1484 /* infinite loop */
1485 flash_pwm(2, 0, 0);
1486 flash_pwm(4, 0, 500);
1487 1385
1488 while(1) 1386 while(1)
1489 { 1387 {