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authorMichael Sevakis <jethead71@rockbox.org>2008-12-08 23:31:05 +0000
committerMichael Sevakis <jethead71@rockbox.org>2008-12-08 23:31:05 +0000
commitcb0610802495d2f767c78a0b07a0b8359238f590 (patch)
treeecf223f8233cedb90ee5ad055cab1b4bdd2c9ee8
parentea929a3e4547e9c709560803d2cea760ffe3e6a3 (diff)
downloadrockbox-cb0610802495d2f767c78a0b07a0b8359238f590.tar.gz
rockbox-cb0610802495d2f767c78a0b07a0b8359238f590.zip
Meg-FX: Enable a real tick in the bootloader. Do cleanups before switching to firmware and cache handling. Put proper main return address in lr.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19368 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--bootloader/gigabeat.c20
-rw-r--r--firmware/kernel.c7
-rw-r--r--firmware/target/arm/s3c2440/crt0.S1
-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h4
-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c29
-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c9
-rw-r--r--firmware/target/arm/s3c2440/gigabeat-fx/system-target.h3
7 files changed, 45 insertions, 28 deletions
diff --git a/bootloader/gigabeat.c b/bootloader/gigabeat.c
index 11ab93a5e2..a3732b0e06 100644
--- a/bootloader/gigabeat.c
+++ b/bootloader/gigabeat.c
@@ -75,11 +75,14 @@ void main(void)
75 int(*kernel_entry)(void); 75 int(*kernel_entry)(void);
76 76
77 system_init(); 77 system_init();
78 kernel_init(); /* Need the kernel to sleep */
79
80 enable_interrupt(IRQ_FIQ_STATUS);
81
78 lcd_init(); 82 lcd_init();
79 backlight_init(); 83 backlight_init();
80 button_init(); 84 button_init();
81 font_init(); 85 font_init();
82 kernel_init(); /* Need the kernel to sleep */
83 adc_init(); 86 adc_init();
84 87
85 lcd_setfont(FONT_SYSFIXED); 88 lcd_setfont(FONT_SYSFIXED);
@@ -192,6 +195,9 @@ void main(void)
192 195
193 printf("Loading firmware"); 196 printf("Loading firmware");
194 197
198 /* Flush out anything pending first */
199 invalidate_icache();
200
195 loadbuffer = (unsigned char*) 0x31000000; 201 loadbuffer = (unsigned char*) 0x31000000;
196 buffer_size = (unsigned char*)0x31400000 - loadbuffer; 202 buffer_size = (unsigned char*)0x31400000 - loadbuffer;
197 203
@@ -199,10 +205,22 @@ void main(void)
199 if(rc < 0) 205 if(rc < 0)
200 error(EBOOTFILE, rc); 206 error(EBOOTFILE, rc);
201 207
208 storage_close();
209 system_prepare_fw_start();
210
202 if (rc == EOK) 211 if (rc == EOK)
203 { 212 {
213 invalidate_icache();
204 kernel_entry = (void*) loadbuffer; 214 kernel_entry = (void*) loadbuffer;
205 rc = kernel_entry(); 215 rc = kernel_entry();
206 } 216 }
217
218#if 0
219 /* Halt */
220 while (1)
221 core_idle();
222#else
223 /* Return and restart */
224#endif
207} 225}
208 226
diff --git a/firmware/kernel.c b/firmware/kernel.c
index 730484ed51..920893818a 100644
--- a/firmware/kernel.c
+++ b/firmware/kernel.c
@@ -244,10 +244,7 @@ void timeout_register(struct timeout *tmo, timeout_cb_type callback,
244 ****************************************************************************/ 244 ****************************************************************************/
245void sleep(int ticks) 245void sleep(int ticks)
246{ 246{
247#if CONFIG_CPU == S3C2440 && defined(BOOTLOADER) 247#if defined(CPU_PP) && defined(BOOTLOADER)
248 extern void delay(int ticks);
249 delay(ticks);
250#elif defined(CPU_PP) && defined(BOOTLOADER)
251 unsigned stop = USEC_TIMER + ticks * (1000000/HZ); 248 unsigned stop = USEC_TIMER + ticks * (1000000/HZ);
252 while (TIME_BEFORE(USEC_TIMER, stop)) 249 while (TIME_BEFORE(USEC_TIMER, stop))
253 switch_thread(); 250 switch_thread();
@@ -265,7 +262,7 @@ void sleep(int ticks)
265 262
266void yield(void) 263void yield(void)
267{ 264{
268#if ((CONFIG_CPU == S3C2440 || defined(ELIO_TPJ1022)) && defined(BOOTLOADER)) 265#if ((defined(ELIO_TPJ1022)) && defined(BOOTLOADER))
269 /* Some targets don't like yielding in the bootloader */ 266 /* Some targets don't like yielding in the bootloader */
270#else 267#else
271 switch_thread(); 268 switch_thread();
diff --git a/firmware/target/arm/s3c2440/crt0.S b/firmware/target/arm/s3c2440/crt0.S
index a05fd78fe9..7de2c46437 100644
--- a/firmware/target/arm/s3c2440/crt0.S
+++ b/firmware/target/arm/s3c2440/crt0.S
@@ -467,6 +467,7 @@ stackmunge:
467 ldr sp, =stackend 467 ldr sp, =stackend
468 468
469 /* Start the main function */ 469 /* Start the main function */
470 adr lr, vectors
470 ldr pc, =main 471 ldr pc, =main
471 472
472 /* Should never get here, but let's restart in case (also needed for 473 /* Should never get here, but let's restart in case (also needed for
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h b/firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h
index b010e3a4d4..54d0964560 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/ata-target.h
@@ -21,6 +21,10 @@
21#ifndef ATA_TARGET_H 21#ifndef ATA_TARGET_H
22#define ATA_TARGET_H 22#define ATA_TARGET_H
23 23
24#ifdef BOOTLOADER
25#define ATA_DRIVER_CLOSE
26#endif
27
24/* Plain C read & write loops */ 28/* Plain C read & write loops */
25#define PREFER_C_READING 29#define PREFER_C_READING
26#define PREFER_C_WRITING 30#define PREFER_C_WRITING
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c
index 6a750c32e2..6cabc8dc81 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/kernel-meg-fx.c
@@ -24,7 +24,7 @@
24#include "timer.h" 24#include "timer.h"
25#include "thread.h" 25#include "thread.h"
26 26
27static inline void tick_set(unsigned int interval_in_ms) 27void tick_start(unsigned int interval_in_ms)
28{ 28{
29 /* 29 /*
30 * Based on default PCLK of 49.1568MHz - scaling chosen to give 30 * Based on default PCLK of 49.1568MHz - scaling chosen to give
@@ -49,11 +49,6 @@ static inline void tick_set(unsigned int interval_in_ms)
49 TCON |= 1 << 21; 49 TCON |= 1 << 21;
50 /* reset manual bit */ 50 /* reset manual bit */
51 TCON &= ~(1 << 21); 51 TCON &= ~(1 << 21);
52}
53
54void tick_start(unsigned int interval_in_ms)
55{
56 tick_set(interval_in_ms);
57 52
58 /* interval mode */ 53 /* interval mode */
59 TCON |= 1 << 22; 54 TCON |= 1 << 22;
@@ -65,24 +60,14 @@ void tick_start(unsigned int interval_in_ms)
65} 60}
66 61
67#ifdef BOOTLOADER 62#ifdef BOOTLOADER
68void delay(int ticks) 63void tick_stop(void)
69{ 64{
70 volatile unsigned long counter; 65 s3c_regset32(&INTMSK, TIMER4_MASK);
71 66 TCON &= ~(1 << 20);
72 INTMSK |= TIMER4_MASK; 67 SRCPND = TIMER4_MASK;
73 68 INTPND = TIMER4_MASK;
74 tick_set(1000 * ticks / HZ);
75
76 /* autoreload Off */
77 TCON &= ~(1 << 22);
78 /* start timer 4 */
79 TCON |= (1 << 20);
80
81 do {
82 counter = TCNTO4;
83 } while(counter > 0);
84} 69}
85#endif /* BOOTLOADER */ 70#endif
86 71
87void TIMER4(void) 72void TIMER4(void)
88{ 73{
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c
index 6d8108be49..43e2c408a2 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c
@@ -143,6 +143,15 @@ void s3c_regclr32(volatile unsigned long *reg, unsigned long bits)
143 s3c_regmod32(reg, 0, bits); 143 s3c_regmod32(reg, 0, bits);
144} 144}
145 145
146#ifdef BOOTLOADER
147void system_prepare_fw_start(void)
148{
149 tick_stop();
150 disable_interrupt(IRQ_FIQ_STATUS);
151 INTMSK = 0xFFFFFFFF;
152}
153#endif
154
146void system_init(void) 155void system_init(void)
147{ 156{
148 INTMSK = 0xFFFFFFFF; 157 INTMSK = 0xFFFFFFFF;
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h b/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h
index 43758ece08..320c595b99 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h
@@ -28,6 +28,9 @@
28#define CPUFREQ_NORMAL 98784000 28#define CPUFREQ_NORMAL 98784000
29#define CPUFREQ_MAX 296352000 29#define CPUFREQ_MAX 296352000
30 30
31void system_prepare_fw_start(void);
32void tick_stop(void);
33
31/* Functions to set and clear regiser bits atomically */ 34/* Functions to set and clear regiser bits atomically */
32 35
33/* Set and clear register bits */ 36/* Set and clear register bits */