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author | Michael Sevakis <jethead71@rockbox.org> | 2008-04-16 20:44:10 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2008-04-16 20:44:10 +0000 |
commit | bbb0c3f397b5fb44bd13a3fbc6cf75260deb019f (patch) | |
tree | 6b474558f7449970a602da02c3e0d37973a2a0c8 | |
parent | a01996436d09eca8ae114e67005d2cac73cae7b3 (diff) | |
download | rockbox-bbb0c3f397b5fb44bd13a3fbc6cf75260deb019f.tar.gz rockbox-bbb0c3f397b5fb44bd13a3fbc6cf75260deb019f.zip |
Optimized byte-swapping macros for ARMv6.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17148 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/target/arm/system-arm.h | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/firmware/target/arm/system-arm.h b/firmware/target/arm/system-arm.h index 5627475408..9ab2bfa57b 100644 --- a/firmware/target/arm/system-arm.h +++ b/firmware/target/arm/system-arm.h | |||
@@ -33,7 +33,14 @@ static inline uint16_t swap16(uint16_t value) | |||
33 | result[ 7..0] = value[15..8]; | 33 | result[ 7..0] = value[15..8]; |
34 | */ | 34 | */ |
35 | { | 35 | { |
36 | #if ARM_ARCH >= 6 | ||
37 | uint32_t retval; | ||
38 | asm volatile ("revsh %0, %1" /* xxAB */ | ||
39 | : "=r"(retval) : "r"((uint32_t)value)); /* xxBA */ | ||
40 | return retval; | ||
41 | #else | ||
36 | return (value >> 8) | (value << 8); | 42 | return (value >> 8) | (value << 8); |
43 | #endif | ||
37 | } | 44 | } |
38 | 45 | ||
39 | static inline uint32_t swap32(uint32_t value) | 46 | static inline uint32_t swap32(uint32_t value) |
@@ -44,6 +51,12 @@ static inline uint32_t swap32(uint32_t value) | |||
44 | result[ 7.. 0] = value[31..24]; | 51 | result[ 7.. 0] = value[31..24]; |
45 | */ | 52 | */ |
46 | { | 53 | { |
54 | #if ARM_ARCH >= 6 | ||
55 | uint32_t retval; | ||
56 | asm volatile ("rev %0, %1" /* ABCD */ | ||
57 | : "=r"(retval) : "r"(value)); /* DCBA */ | ||
58 | return retval; | ||
59 | #else | ||
47 | uint32_t tmp; | 60 | uint32_t tmp; |
48 | 61 | ||
49 | asm volatile ( | 62 | asm volatile ( |
@@ -54,6 +67,7 @@ static inline uint32_t swap32(uint32_t value) | |||
54 | : "+r" (value), "=r" (tmp) | 67 | : "+r" (value), "=r" (tmp) |
55 | ); | 68 | ); |
56 | return value; | 69 | return value; |
70 | #endif | ||
57 | } | 71 | } |
58 | 72 | ||
59 | static inline uint32_t swap_odd_even32(uint32_t value) | 73 | static inline uint32_t swap_odd_even32(uint32_t value) |
@@ -62,6 +76,12 @@ static inline uint32_t swap_odd_even32(uint32_t value) | |||
62 | result[31..24],[15.. 8] = value[23..16],[ 7.. 0] | 76 | result[31..24],[15.. 8] = value[23..16],[ 7.. 0] |
63 | result[23..16],[ 7.. 0] = value[31..24],[15.. 8] | 77 | result[23..16],[ 7.. 0] = value[31..24],[15.. 8] |
64 | */ | 78 | */ |
79 | #if ARM_ARCH >= 6 | ||
80 | uint32_t retval; | ||
81 | asm volatile ("rev16 %0, %1" /* ABCD */ | ||
82 | : "=r"(retval) : "r"(value)); /* BADC */ | ||
83 | return retval; | ||
84 | #else | ||
65 | uint32_t tmp; | 85 | uint32_t tmp; |
66 | 86 | ||
67 | asm volatile ( /* ABCD */ | 87 | asm volatile ( /* ABCD */ |
@@ -72,6 +92,7 @@ static inline uint32_t swap_odd_even32(uint32_t value) | |||
72 | : "+r" (value), "=r" (tmp) /* BADC */ | 92 | : "+r" (value), "=r" (tmp) /* BADC */ |
73 | ); | 93 | ); |
74 | return value; | 94 | return value; |
95 | #endif | ||
75 | } | 96 | } |
76 | 97 | ||
77 | /* Core-level interrupt masking */ | 98 | /* Core-level interrupt masking */ |