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authorMarcin Bukat <marcin.bukat@gmail.com>2014-09-18 10:04:14 +0200
committerMarcin Bukat <marcin.bukat@gmail.com>2014-09-19 11:00:31 +0200
commitb888743cac9c0af26632672796934fe9eaaa471d (patch)
treeeddcd6bece2f3f7d9c157be5eb8b28a31a2127fd
parent970c2482dd22a84a5973b73621d0dd06e6f45a25 (diff)
downloadrockbox-b888743cac9c0af26632672796934fe9eaaa471d.tar.gz
rockbox-b888743cac9c0af26632672796934fe9eaaa471d.zip
qeditor: Implement clock analyzer for rk27xx
Change-Id: Ib8f53d32120893b6c1054299ed434a6650a0d7c2 Reviewed-on: http://gerrit.rockbox.org/971 Reviewed-by: Marcin Bukat <marcin.bukat@gmail.com>
-rw-r--r--utils/regtools/lib/soc_desc.cpp1
-rw-r--r--utils/regtools/qeditor/std_analysers.cpp202
-rw-r--r--utils/regtools/qeditor/std_analysers.h2
3 files changed, 200 insertions, 5 deletions
diff --git a/utils/regtools/lib/soc_desc.cpp b/utils/regtools/lib/soc_desc.cpp
index 3904f6a77e..1b1cd61edc 100644
--- a/utils/regtools/lib/soc_desc.cpp
+++ b/utils/regtools/lib/soc_desc.cpp
@@ -982,4 +982,3 @@ public:
982}; 982};
983 983
984xml_parser_init __xml_parser_init; 984xml_parser_init __xml_parser_init;
985}
diff --git a/utils/regtools/qeditor/std_analysers.cpp b/utils/regtools/qeditor/std_analysers.cpp
index f278c2a526..8aae007093 100644
--- a/utils/regtools/qeditor/std_analysers.cpp
+++ b/utils/regtools/qeditor/std_analysers.cpp
@@ -33,7 +33,7 @@ QWidget *ClockAnalyser::GetWidget()
33 33
34bool ClockAnalyser::SupportSoc(const QString& soc_name) 34bool ClockAnalyser::SupportSoc(const QString& soc_name)
35{ 35{
36 return soc_name == "imx233"; 36 return soc_name == "imx233" || soc_name == "rk27xx";
37} 37}
38 38
39QString ClockAnalyser::GetFreq(unsigned freq) 39QString ClockAnalyser::GetFreq(unsigned freq)
@@ -82,6 +82,203 @@ int ClockAnalyser::GetClockFreq(QTreeWidgetItem *item)
82void ClockAnalyser::FillTree() 82void ClockAnalyser::FillTree()
83{ 83{
84 m_tree_widget->clear(); 84 m_tree_widget->clear();
85 if(m_soc.GetSoc().name == "imx233") FillTreeIMX233();
86 else if(m_soc.GetSoc().name == "rk27xx") FillTreeRK27XX();
87 m_tree_widget->expandAll();
88 m_tree_widget->resizeColumnToContents(0);
89}
90
91void ClockAnalyser::FillTreeRK27XX()
92{
93 soc_word_t value, value2, value3, value4;
94 soc_word_t bypass, clkr, clkf, clkod, pll_off;
95
96 BackendHelper helper(m_io_backend, m_soc);
97
98 QTreeWidgetItem *xtal_clk = AddClock(0, "xtal clk", 24000000);
99
100 // F = (Fref*F)/R/OD = (Fref*F)/R/OD
101 QTreeWidgetItem *arm_pll = 0;
102 if (helper.ReadRegisterField("SCU", "PLLCON1", "ARM_PLL_BYPASS", bypass) &&
103 helper.ReadRegisterField("SCU", "PLLCON1", "ARM_PLL_CLKR", clkr) &&
104 helper.ReadRegisterField("SCU", "PLLCON1", "ARM_PLL_CLKF", clkf) &&
105 helper.ReadRegisterField("SCU", "PLLCON1", "ARM_PLL_CLKOD", clkod) &&
106 helper.ReadRegisterField("SCU", "PLLCON1", "ARM_PLL_POWERDOWN", pll_off))
107 {
108 arm_pll = AddClock(xtal_clk, "arm pll", pll_off ? DISABLED : FROM_PARENT,
109 bypass ? 1 : clkf+1, bypass ? 1 : (clkr+1)*(clkod+1));
110 }
111 else
112 {
113 arm_pll = AddClock(xtal_clk, "arm pll", INVALID);
114 }
115
116 QTreeWidgetItem *arm_clk = 0;
117 QTreeWidgetItem *hclk = 0;
118 QTreeWidgetItem *pclk = 0;
119 if(helper.ReadRegisterField("SCU", "DIVCON1", "ARM_SLOW_MODE", value) &&
120 helper.ReadRegisterField("SCU", "DIVCON1", "ARM_CLK_DIV", value2) &&
121 helper.ReadRegisterField("SCU", "DIVCON1", "PCLK_CLK_DIV", value3))
122 {
123 arm_clk = AddClock(value ? xtal_clk : arm_pll, "arm clk", FROM_PARENT, 1, value2 ? 2 : 1);
124 hclk = AddClock(arm_clk, "hclk", FROM_PARENT, 1, value2 ? 1 : 2);
125 pclk = AddClock(hclk, "pclk", FROM_PARENT, 1, (1<<value3));
126 }
127 else
128 {
129 arm_clk = AddClock(xtal_clk, "arm_clk", INVALID);
130 hclk = AddClock(xtal_clk, "hclk", INVALID);
131 pclk = AddClock(xtal_clk, "pclk", INVALID);
132 }
133
134 QTreeWidgetItem *dsp_pll = 0;
135 if (helper.ReadRegisterField("SCU", "PLLCON2", "DSP_PLL_BYPASS", bypass) &&
136 helper.ReadRegisterField("SCU", "PLLCON2", "DSP_PLL_CLKR", clkr) &&
137 helper.ReadRegisterField("SCU", "PLLCON2", "DSP_PLL_CLKF", clkf) &&
138 helper.ReadRegisterField("SCU", "PLLCON2", "DSP_PLL_CLKOD", clkod) &&
139 helper.ReadRegisterField("SCU", "PLLCON2", "DSP_PLL_POWERDOWN", pll_off))
140 {
141 dsp_pll = AddClock(xtal_clk, "dsp pll", pll_off ? DISABLED : FROM_PARENT,
142 bypass ? 1 : clkf+1, bypass ? 1 : (clkr+1)*(clkod+1));
143 }
144 else
145 {
146 dsp_pll = AddClock(xtal_clk, "dsp_pll", INVALID);
147 }
148
149 QTreeWidgetItem *dsp_clk = AddClock(dsp_pll, "dsp clk", FROM_PARENT);
150
151 QTreeWidgetItem *codec_pll = 0;
152 if (helper.ReadRegisterField("SCU", "PLLCON3", "CODEC_PLL_BYPASS", bypass) &&
153 helper.ReadRegisterField("SCU", "PLLCON3", "CODEC_PLL_CLKR", clkr) &&
154 helper.ReadRegisterField("SCU", "PLLCON3", "CODEC_PLL_CLKF", clkf) &&
155 helper.ReadRegisterField("SCU", "PLLCON3", "CODEC_PLL_CLKOD", clkod) &&
156 helper.ReadRegisterField("SCU", "PLLCON3", "CODEC_PLL_POWERDOWN", pll_off))
157 {
158 codec_pll = AddClock(xtal_clk, "codec pll", pll_off ? DISABLED : FROM_PARENT,
159 bypass ? 1 : clkf+1, bypass ? 1 : (clkr+1)*(clkod+1));
160 }
161 else
162 {
163 codec_pll = AddClock(xtal_clk, "codec_pll", INVALID);
164 }
165
166 QTreeWidgetItem *codec_clk = 0;
167 if (helper.ReadRegisterField("SCU", "DIVCON1", "CODEC_CLK_SRC", value) &&
168 helper.ReadRegisterField("SCU", "DIVCON1", "CODEC_CLK_DIV", value2))
169 {
170 codec_clk = AddClock(value ? xtal_clk : codec_pll, "codec clk", FROM_PARENT, 1, value ? 1 : (value2 + 1));
171 }
172 else
173 {
174 codec_clk = AddClock(xtal_clk, "codec_clk", INVALID);
175 }
176
177 QTreeWidgetItem *lsadc_clk = 0;
178 if (helper.ReadRegisterField("SCU", "DIVCON1", "LSADC_CLK_DIV", value))
179 {
180 lsadc_clk = AddClock(pclk, "lsadc clk", FROM_PARENT, 1, (value+1));
181 }
182 else
183 {
184 lsadc_clk = AddClock(xtal_clk, "lsadc clk", INVALID);
185 }
186
187 QTreeWidgetItem *lcdc_clk = 0;
188 if (helper.ReadRegisterField("SCU", "DIVCON1", "LCDC_CLK", value) &&
189 helper.ReadRegisterField("SCU", "DIVCON1", "LCDC_CLK_DIV", value2) &&
190 helper.ReadRegisterField("SCU", "DIVCON1", "LCDC_CLK_DIV_SRC", value3))
191 {
192 if (value)
193 {
194 lcdc_clk = AddClock(xtal_clk, "lcdc clk", FROM_PARENT);
195 }
196 else
197 {
198 if(value3 == 0)
199 lcdc_clk = AddClock(arm_pll, "lcdc clk", FROM_PARENT, 1, value2+1);
200 else if(value3 == 1)
201 lcdc_clk = AddClock(dsp_pll, "lcdc clk", FROM_PARENT, 1, value2+1);
202 else
203 lcdc_clk = AddClock(codec_pll, "lcdc clk", FROM_PARENT, 1, value2+1);
204 }
205 }
206 else
207 {
208 lcdc_clk = AddClock(xtal_clk, "lcdc clk", INVALID);
209 }
210
211 QTreeWidgetItem *pwm0_clk = 0;
212 if(helper.ReadRegisterField("PWM0", "LRC", "TR", value) &&
213 helper.ReadRegisterField("PWM0", "CTRL", "PRESCALE", value3) &&
214 helper.ReadRegisterField("PWM0", "CTRL", "PWM_EN", value4))
215 {
216 pwm0_clk = AddClock(pclk, "pwm0 clk", value4 ? FROM_PARENT : DISABLED, 1, 2*value*(1<<value3));
217 }
218 else
219 {
220 pwm0_clk = AddClock(xtal_clk, "pwm0 clk", INVALID);
221 }
222
223 QTreeWidgetItem *pwm1_clk = 0;
224 if(helper.ReadRegisterField("PWM1", "LRC", "TR", value) &&
225 helper.ReadRegisterField("PWM1", "CTRL", "PRESCALE", value3) &&
226 helper.ReadRegisterField("PWM1", "CTRL", "PWM_EN", value4))
227 {
228 pwm1_clk = AddClock(pclk, "pwm1 clk", value4 ? FROM_PARENT : DISABLED, 1, 2*value*(1<<value3));
229 }
230 else
231 {
232 pwm1_clk = AddClock(xtal_clk, "pwm1 clk", INVALID);
233 }
234
235 QTreeWidgetItem *pwm2_clk = 0;
236 if(helper.ReadRegisterField("PWM2", "LRC", "TR", value) &&
237 helper.ReadRegisterField("PWM2", "CTRL", "PRESCALE", value3) &&
238 helper.ReadRegisterField("PWM2", "CTRL", "PWM_EN", value4))
239 {
240 pwm2_clk = AddClock(pclk, "pwm2 clk", value4 ? FROM_PARENT : DISABLED, 1, 2*value*(1<<value3));
241 }
242 else
243 {
244 pwm2_clk = AddClock(xtal_clk, "pwm2 clk", INVALID);
245 }
246
247 QTreeWidgetItem *pwm3_clk = 0;
248 if(helper.ReadRegisterField("PWM3", "LRC", "TR", value) &&
249 helper.ReadRegisterField("PWM3", "CTRL", "PRESCALE", value3) &&
250 helper.ReadRegisterField("PWM3", "CTRL", "PWM_EN", value4))
251 {
252 pwm3_clk = AddClock(pclk, "pwm3", value4 ? FROM_PARENT : DISABLED, 1, 2*value*(1<<value3));
253 }
254 else
255 {
256 pwm3_clk = AddClock(xtal_clk, "pwm3 clk", INVALID);
257 }
258
259 QTreeWidgetItem *sdmmc_clk = 0;
260 if(helper.ReadRegisterField("SD", "CTRL", "DIVIDER", value))
261 {
262 sdmmc_clk = AddClock(pclk, "sd clk", FROM_PARENT, 1, value+1);
263 }
264 else
265 {
266 sdmmc_clk = AddClock(xtal_clk, "sd clk", INVALID);
267 }
268
269 Q_UNUSED(dsp_clk);
270 Q_UNUSED(codec_clk);
271 Q_UNUSED(lsadc_clk);
272 Q_UNUSED(lcdc_clk);
273 Q_UNUSED(pwm0_clk);
274 Q_UNUSED(pwm1_clk);
275 Q_UNUSED(pwm2_clk);
276 Q_UNUSED(pwm3_clk);
277 Q_UNUSED(sdmmc_clk);
278}
279
280void ClockAnalyser::FillTreeIMX233()
281{
85 BackendHelper helper(m_io_backend, m_soc); 282 BackendHelper helper(m_io_backend, m_soc);
86 soc_word_t value, value2, value3; 283 soc_word_t value, value2, value3;
87 284
@@ -291,9 +488,6 @@ void ClockAnalyser::FillTree()
291 Q_UNUSED(clk_x); 488 Q_UNUSED(clk_x);
292 Q_UNUSED(clk_gpmi); 489 Q_UNUSED(clk_gpmi);
293 Q_UNUSED(clk_h); 490 Q_UNUSED(clk_h);
294
295 m_tree_widget->expandAll();
296 m_tree_widget->resizeColumnToContents(0);
297} 491}
298 492
299static TmplAnalyserFactory< ClockAnalyser > g_clock_factory(true, "Clock Analyser"); 493static TmplAnalyserFactory< ClockAnalyser > g_clock_factory(true, "Clock Analyser");
diff --git a/utils/regtools/qeditor/std_analysers.h b/utils/regtools/qeditor/std_analysers.h
index cca8b12b99..a9b3022b41 100644
--- a/utils/regtools/qeditor/std_analysers.h
+++ b/utils/regtools/qeditor/std_analysers.h
@@ -40,6 +40,8 @@ private:
40 QTreeWidgetItem *AddClock(QTreeWidgetItem *parent, const QString& name, int freq, int mul = 1, int div = 1); 40 QTreeWidgetItem *AddClock(QTreeWidgetItem *parent, const QString& name, int freq, int mul = 1, int div = 1);
41 int GetClockFreq(QTreeWidgetItem *item); 41 int GetClockFreq(QTreeWidgetItem *item);
42 void FillTree(); 42 void FillTree();
43 void FillTreeIMX233();
44 void FillTreeRK27XX();
43 45
44private: 46private:
45 QGroupBox *m_group; 47 QGroupBox *m_group;