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authorMichael Sevakis <jethead71@rockbox.org>2008-12-19 15:30:30 +0000
committerMichael Sevakis <jethead71@rockbox.org>2008-12-19 15:30:30 +0000
commitac5059b1b562bfbaf20c4646b6158b23345495a8 (patch)
tree0c7f58127b2cefb1d94eb97fd1b8d8b1a996a8c6
parent2b4290cc128a412e50922e8650d94d70c99926f3 (diff)
downloadrockbox-ac5059b1b562bfbaf20c4646b6158b23345495a8.tar.gz
rockbox-ac5059b1b562bfbaf20c4646b6158b23345495a8.zip
Use set/clr instead of mod functions where applicable.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19486 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c4
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/power-imx31.c8
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/system-imx31.c16
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/usb-imx31.c8
-rw-r--r--firmware/target/arm/imx31/gigabeat-s/wmcodec-imx31.c12
5 files changed, 21 insertions, 27 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c b/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
index d0f93eedd5..4710e2d82b 100644
--- a/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
+++ b/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c
@@ -51,7 +51,7 @@ void pcm_play_lock(void)
51 if (++dma_play_data.locked == 1) 51 if (++dma_play_data.locked == 1)
52 { 52 {
53 /* Atomically disable transmit interrupt */ 53 /* Atomically disable transmit interrupt */
54 imx31_regmod32(&SSI_SIER1, 0, SSI_SIER_TIE); 54 imx31_regclr32(&SSI_SIER1, SSI_SIER_TIE);
55 } 55 }
56} 56}
57 57
@@ -60,7 +60,7 @@ void pcm_play_unlock(void)
60 if (--dma_play_data.locked == 0 && dma_play_data.state != 0) 60 if (--dma_play_data.locked == 0 && dma_play_data.state != 0)
61 { 61 {
62 /* Atomically enable transmit interrupt */ 62 /* Atomically enable transmit interrupt */
63 imx31_regmod32(&SSI_SIER1, SSI_SIER_TIE, SSI_SIER_TIE); 63 imx31_regset32(&SSI_SIER1, SSI_SIER_TIE);
64 } 64 }
65} 65}
66 66
diff --git a/firmware/target/arm/imx31/gigabeat-s/power-imx31.c b/firmware/target/arm/imx31/gigabeat-s/power-imx31.c
index 07e6462bfb..17008cec4b 100644
--- a/firmware/target/arm/imx31/gigabeat-s/power-imx31.c
+++ b/firmware/target/arm/imx31/gigabeat-s/power-imx31.c
@@ -63,7 +63,7 @@ void ide_power_enable(bool on)
63 if (!on) 63 if (!on)
64 { 64 {
65 /* Bus must be isolated before power off */ 65 /* Bus must be isolated before power off */
66 imx31_regmod32(&GPIO2_DR, (1 << 16), (1 << 16)); 66 imx31_regset32(&GPIO2_DR, (1 << 16));
67 } 67 }
68 68
69 /* HD power switch */ 69 /* HD power switch */
@@ -73,7 +73,7 @@ void ide_power_enable(bool on)
73 { 73 {
74 /* Bus switch may be turned on after powerup */ 74 /* Bus switch may be turned on after powerup */
75 sleep(HZ/10); 75 sleep(HZ/10);
76 imx31_regmod32(&GPIO2_DR, 0, (1 << 16)); 76 imx31_regclr32(&GPIO2_DR, (1 << 16));
77 } 77 }
78} 78}
79 79
@@ -91,7 +91,7 @@ bool tuner_power(bool status)
91 we can diable the i2c module when not in use */ 91 we can diable the i2c module when not in use */
92 i2c_enable_node(&si4700_i2c_node, true); 92 i2c_enable_node(&si4700_i2c_node, true);
93 /* enable the fm chip */ 93 /* enable the fm chip */
94 imx31_regmod32(&GPIO1_DR, (1 << 26), (1 << 26)); 94 imx31_regset32(&GPIO1_DR, (1 << 26));
95 /* enable CLK32KMCU clock */ 95 /* enable CLK32KMCU clock */
96 mc13783_set(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN); 96 mc13783_set(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN);
97 } 97 }
@@ -101,7 +101,7 @@ bool tuner_power(bool status)
101 we can diable the i2c module when not in use */ 101 we can diable the i2c module when not in use */
102 i2c_enable_node(&si4700_i2c_node, false); 102 i2c_enable_node(&si4700_i2c_node, false);
103 /* disable the fm chip */ 103 /* disable the fm chip */
104 imx31_regmod32(&GPIO1_DR, 0, (1 << 26)); 104 imx31_regclr32(&GPIO1_DR, (1 << 26));
105 /* disable CLK32KMCU clock */ 105 /* disable CLK32KMCU clock */
106 mc13783_clear(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN); 106 mc13783_clear(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN);
107 } 107 }
diff --git a/firmware/target/arm/imx31/gigabeat-s/system-imx31.c b/firmware/target/arm/imx31/gigabeat-s/system-imx31.c
index a8af583212..6d4797e9df 100644
--- a/firmware/target/arm/imx31/gigabeat-s/system-imx31.c
+++ b/firmware/target/arm/imx31/gigabeat-s/system-imx31.c
@@ -89,14 +89,14 @@ void system_init(void)
89 /* MCR WFI enables wait mode */ 89 /* MCR WFI enables wait mode */
90 CLKCTL_CCMR &= ~(3 << 14); 90 CLKCTL_CCMR &= ~(3 << 14);
91 91
92 imx31_regmod32(&SDHC1_CLOCK_CONTROL, STOP_CLK, STOP_CLK); 92 imx31_regset32(&SDHC1_CLOCK_CONTROL, STOP_CLK);
93 imx31_regmod32(&SDHC2_CLOCK_CONTROL, STOP_CLK, STOP_CLK); 93 imx31_regset32(&SDHC2_CLOCK_CONTROL, STOP_CLK);
94 imx31_regmod32(&RNGA_CONTROL, RNGA_CONTROL_SLEEP, RNGA_CONTROL_SLEEP); 94 imx31_regset32(&RNGA_CONTROL, RNGA_CONTROL_SLEEP);
95 imx31_regmod32(&UCR1_1, 0, EUARTUCR1_UARTEN); 95 imx31_regclr32(&UCR1_1, EUARTUCR1_UARTEN);
96 imx31_regmod32(&UCR1_2, 0, EUARTUCR1_UARTEN); 96 imx31_regclr32(&UCR1_2, EUARTUCR1_UARTEN);
97 imx31_regmod32(&UCR1_3, 0, EUARTUCR1_UARTEN); 97 imx31_regclr32(&UCR1_3, EUARTUCR1_UARTEN);
98 imx31_regmod32(&UCR1_4, 0, EUARTUCR1_UARTEN); 98 imx31_regclr32(&UCR1_4, EUARTUCR1_UARTEN);
99 imx31_regmod32(&UCR1_5, 0, EUARTUCR1_UARTEN); 99 imx31_regclr32(&UCR1_5, EUARTUCR1_UARTEN);
100 100
101 for (i = 0; i < ARRAYLEN(disable_clocks); i++) 101 for (i = 0; i < ARRAYLEN(disable_clocks); i++)
102 imx31_clkctl_module_clock_gating(disable_clocks[i], CGM_OFF); 102 imx31_clkctl_module_clock_gating(disable_clocks[i], CGM_OFF);
diff --git a/firmware/target/arm/imx31/gigabeat-s/usb-imx31.c b/firmware/target/arm/imx31/gigabeat-s/usb-imx31.c
index cdc41cd43b..382bc326b7 100644
--- a/firmware/target/arm/imx31/gigabeat-s/usb-imx31.c
+++ b/firmware/target/arm/imx31/gigabeat-s/usb-imx31.c
@@ -38,16 +38,16 @@ static void enable_transceiver(bool enable)
38 { 38 {
39 if (GPIO1_DR & (1 << 30)) 39 if (GPIO1_DR & (1 << 30))
40 { 40 {
41 imx31_regmod32(&GPIO3_DR, 0, (1 << 16)); /* Reset ISP1504 */ 41 imx31_regclr32(&GPIO3_DR, (1 << 16)); /* Reset ISP1504 */
42 sleep(HZ/100); 42 sleep(HZ/100);
43 imx31_regmod32(&GPIO3_DR, (1 << 16), (1 << 16)); 43 imx31_regset32(&GPIO3_DR, (1 << 16));
44 sleep(HZ/10); 44 sleep(HZ/10);
45 imx31_regmod32(&GPIO1_DR, 0, (1 << 30)); /* Select ISP1504 */ 45 imx31_regclr32(&GPIO1_DR, (1 << 30)); /* Select ISP1504 */
46 } 46 }
47 } 47 }
48 else 48 else
49 { 49 {
50 imx31_regmod32(&GPIO1_DR, (1 << 30), (1 << 30)); /* Deselect ISP1504 */ 50 imx31_regset32(&GPIO1_DR, (1 << 30)); /* Deselect ISP1504 */
51 } 51 }
52} 52}
53 53
diff --git a/firmware/target/arm/imx31/gigabeat-s/wmcodec-imx31.c b/firmware/target/arm/imx31/gigabeat-s/wmcodec-imx31.c
index 0bb9e49506..e307057978 100644
--- a/firmware/target/arm/imx31/gigabeat-s/wmcodec-imx31.c
+++ b/firmware/target/arm/imx31/gigabeat-s/wmcodec-imx31.c
@@ -62,19 +62,13 @@ void audiohw_init(void)
62 62
63 audiohw_preinit(); 63 audiohw_preinit();
64 64
65 GPIO3_DR |= (1 << 21); /* Turn on analogue LDO */ 65 imx31_regset32(&GPIO3_DR, (1 << 21)); /* Turn on analogue LDO */
66} 66}
67 67
68void audiohw_enable_headphone_jack(bool enable) 68void audiohw_enable_headphone_jack(bool enable)
69{ 69{
70 if (enable) 70 /* Turn headphone jack output on or off. */
71 { 71 imx31_regmod32(&GPIO3_DR, enable ? (1 << 22) : 0, (1 << 22));
72 GPIO3_DR |= (1 << 22); /* Turn on headphone jack output */
73 }
74 else
75 {
76 GPIO3_DR &= ~(1 << 22); /* Turn off headphone jack output */
77 }
78} 72}
79 73
80void wmcodec_write(int reg, int data) 74void wmcodec_write(int reg, int data)