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authorRafaël Carré <rafael.carre@gmail.com>2011-12-31 18:44:32 +0000
committerRafaël Carré <rafael.carre@gmail.com>2011-12-31 18:44:32 +0000
commita51879dd01f2cb4da5001084166fc1788669d936 (patch)
tree150068efc5ce048f517855cf632f860ffe843218
parent6824fdf4b3b3a462054a0595f34550b9c0f94b1c (diff)
downloadrockbox-a51879dd01f2cb4da5001084166fc1788669d936.tar.gz
rockbox-a51879dd01f2cb4da5001084166fc1788669d936.zip
creative zvm isp1583 defines: move to isp1583.h
zvm is the only user of this file git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31495 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/drivers/isp1583.c9
-rw-r--r--firmware/export/isp1583.h76
-rw-r--r--firmware/target/arm/tms320dm320/creative-zvm/usb-target.h76
3 files changed, 48 insertions, 113 deletions
diff --git a/firmware/drivers/isp1583.c b/firmware/drivers/isp1583.c
index f45ff6eb5e..80dce59731 100644
--- a/firmware/drivers/isp1583.c
+++ b/firmware/drivers/isp1583.c
@@ -54,6 +54,15 @@ struct usb_endpoint
54static unsigned char setup_pkt_buf[8]; 54static unsigned char setup_pkt_buf[8];
55static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS]; 55static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS];
56 56
57#if 0
58#define ZVM_SPECIFIC asm volatile( \
59 "LDR R12, =0x50FFC000\n" \
60 "LDRH R12, [R12]\n" \
61 : : : "r12");
62#else
63#define ZVM_SPECIFIC
64#endif
65
57static bool high_speed_mode = false; 66static bool high_speed_mode = false;
58 67
59static inline void or_int_value(volatile unsigned short *a, volatile unsigned short *b, unsigned long r, unsigned long value) 68static inline void or_int_value(volatile unsigned short *a, volatile unsigned short *b, unsigned long r, unsigned long value)
diff --git a/firmware/export/isp1583.h b/firmware/export/isp1583.h
index 61ea4b83cc..fb150fb704 100644
--- a/firmware/export/isp1583.h
+++ b/firmware/export/isp1583.h
@@ -21,40 +21,46 @@
21#ifndef ISP1583_H 21#ifndef ISP1583_H
22#define ISP1583_H 22#define ISP1583_H
23 23
24#include "usb-target.h" 24#include "dm320.h"
25 25
26#ifndef ISP1583_H_OVERRIDE 26/* General purpose memory region #2 */
27/* Initialization registers */ 27#define ISP1583_IOBASE 0x60FFC000
28#define ISP1583_INIT_ADDRESS (*((volatile unsigned char*)(ISP1583_IOBASE+0x0))) 28
29#define ISP1583_INIT_MODE (*((volatile unsigned short*)(ISP1583_IOBASE+0xC))) 29#define ISP1583_INIT_ADDRESS (*((volatile unsigned char*)(ISP1583_IOBASE+0x0))) //char
30#define ISP1583_INIT_INTCONF (*((volatile unsigned char*)(ISP1583_IOBASE+0x10))) 30#define ISP1583_INIT_MODE (*((volatile unsigned short*)(ISP1583_IOBASE+0xC*2)))
31#define ISP1583_INIT_OTG (*((volatile unsigned char*)(ISP1583_IOBASE+0x12))) 31#define ISP1583_INIT_INTCONF (*((volatile unsigned char*)(ISP1583_IOBASE+0x10*2))) //char
32#define ISP1583_INIT_INTEN_A (*((volatile unsigned long*)(ISP1583_IOBASE+0x14))) 32#define ISP1583_INIT_OTG (*((volatile unsigned char*)(ISP1583_IOBASE+0x12*2))) //char
33#define ISP1583_INIT_INTEN_B 33#define ISP1583_INIT_INTEN_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x14*2)))
34#define ISP1583_INIT_INTEN_READ ISP1583_INIT_INTEN_A 34#define ISP1583_INIT_INTEN_B (*((volatile unsigned short*)(ISP1583_IOBASE+0x14*2+4)))
35/* Data Flow registers */ 35#define ISP1583_INIT_INTEN_READ (unsigned long)( (ISP1583_INIT_INTEN_A & 0xFFFF) | ((ISP1583_INIT_INTEN_B & 0xFFFF) << 16) )
36#define ISP1583_DFLOW_EPINDEX (*((volatile unsigned char*)(ISP1583_IOBASE+0xC2))) 36/* Data flow registers */
37#define ISP1583_DFLOW_CTRLFUN (*((volatile unsigned char*)(ISP1583_IOBASE+0x28))) 37#define ISP1583_DFLOW_EPINDEX (*((volatile unsigned char*)(ISP1583_IOBASE+0xC2*2))) //char
38#define ISP1583_DFLOW_DATA (*((volatile unsigned short*)(ISP1583_IOBASE+0x20))) 38#define ISP1583_DFLOW_CTRLFUN (*((volatile unsigned char*)(ISP1583_IOBASE+0x28*2))) //char
39#define ISP1583_DFLOW_BUFLEN (*((volatile unsigned short*)(ISP1583_IOBASE+0x1C))) 39#define ISP1583_DFLOW_DATA (*((volatile unsigned short*)(ISP1583_IOBASE+0x20*2)))
40#define ISP1583_DFLOW_BUFSTAT (*((volatile unsigned char*)(ISP1583_IOBASE+0x1E))) 40#define ISP1583_DFLOW_BUFLEN (*((volatile unsigned short*)(ISP1583_IOBASE+0x1C*2)))
41#define ISP1583_DFLOW_MAXPKSZ (*((volatile unsigned short*)(ISP1583_IOBASE+0x04))) 41#define ISP1583_DFLOW_BUFSTAT (*((volatile unsigned char*)(ISP1583_IOBASE+0x1E*2))) //char
42#define ISP1583_DFLOW_EPTYPE (*((volatile unsigned short*)(ISP1583_IOBASE+0x08))) 42#define ISP1583_DFLOW_MAXPKSZ (*((volatile unsigned short*)(ISP1583_IOBASE+0x04*2)))
43#define ISP1583_DFLOW_EPTYPE (*((volatile unsigned short*)(ISP1583_IOBASE+0x08*2)))
43/* DMA registers */ 44/* DMA registers */
44#define ISP1583_DMA_ENDPOINT (*((volatile unsigned char*)(ISP1583_IOBASE+0x58))) 45#define ISP1583_DMA_ENDPOINT (*((volatile unsigned char*)(ISP1583_IOBASE+0x58*2)))
45/* General registers */ 46/* General registers */
46#define ISP1583_GEN_INT_A (*((volatile unsigned long*)(ISP1583_IOBASE+0x18))) 47#define ISP1583_GEN_INT_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x18*2)))
47#define ISP1583_GEN_INT_B 48#define ISP1583_GEN_INT_B (*((volatile unsigned short*)(ISP1583_IOBASE+0x18*2+4)))
48#define ISP1583_GEN_INT_READ ISP1583_GEN_INT_A 49#define ISP1583_GEN_INT_READ (unsigned long)( (ISP1583_GEN_INT_A & 0xFFFF) | ((ISP1583_GEN_INT_B & 0xFFFF) << 16))
49#define ISP1583_GEN_CHIPID (*((volatile unsigned long*)(ISP1583_IOBASE+0x70))) /* Size=3 bytes */ 50#define ISP1583_GEN_CHIPID_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x70*2)))
50#define ISP1583_GEN_FRAMEN0 (*((volatile unsigned short*)(ISP1583_IOBASE+0x74))) 51#define ISP1583_GEN_CHIPID_B (*((volatile unsigned char*)(ISP1583_IOBASE+0x70*2+4))) //char
51#define ISP1583_GEN_SCRATCH (*((volatile unsigned short*)(ISP1583_IOBASE+0x78))) 52#define ISP1583_GEN_CHIPID (unsigned long)( (ISP1583_GEN_CHIPID_A & 0xFFFF) | ((ISP1583_GEN_CHIPID_B & 0xFFFF) << 16) )
52#define ISP1583_GEN_UNLCKDEV (*((volatile unsigned short*)(ISP1583_IOBASE+0x7C))) 53#define ISP1583_GEN_FRAMEN0 (*((volatile unsigned short*)(ISP1583_IOBASE+0x74*2)))
53#define ISP1583_GEN_TSTMOD (*((volatile unsigned char*)(ISP1583_IOBASE+0x84))) 54#define ISP1583_GEN_SCRATCH (*((volatile unsigned short*)(ISP1583_IOBASE+0x78*2)))
54 55#define ISP1583_GEN_UNLCKDEV (*((volatile unsigned short*)(ISP1583_IOBASE+0x7C*2)))
55#define set_int_value(a,b,value) (a) = (value); 56#define ISP1583_GEN_TSTMOD (*((volatile unsigned char*)(ISP1583_IOBASE+0x84*2))) //char
56#endif 57
57 58#define EN_INT_CPU_TARGET IO_INTC_EINT1 |= INTR_EINT1_EXT7
59#define DIS_INT_CPU_TARGET IO_INTC_EINT1 &= ~INTR_EINT1_EXT7
60#define INT_CONF_TARGET 0
61//#define INT_CONF_TARGET 2
62#define set_int_value(a,b,value) a = value & 0xFFFF; \
63 b = value >> 16;
58#define ISP1583_UNLOCK_CODE ((unsigned short)0xAA37) 64#define ISP1583_UNLOCK_CODE ((unsigned short)0xAA37)
59 65
60/* Initialization registers' bits */ 66/* Initialization registers' bits */
@@ -170,11 +176,7 @@
170#define STANDARD_INTEN ( INIT_INTEN_IEBRST | INIT_INTEN_IEHS_STA | INT_IESUSP | INT_IERESM | INIT_INTEN_IEVBUS | INIT_INTEN_IEP0SETUP | INIT_INTEN_IEP0RX | INIT_INTEN_IEP0TX ) 176#define STANDARD_INTEN ( INIT_INTEN_IEBRST | INIT_INTEN_IEHS_STA | INT_IESUSP | INT_IERESM | INIT_INTEN_IEVBUS | INIT_INTEN_IEP0SETUP | INIT_INTEN_IEP0RX | INIT_INTEN_IEP0TX )
171#define STANDARD_INIT_MODE ( INIT_MODE_CLKAON | INIT_MODE_GLINTENA ) 177#define STANDARD_INIT_MODE ( INIT_MODE_CLKAON | INIT_MODE_GLINTENA )
172 178
173#ifdef USE_IRAM 179#define IRAM_ATTR __attribute__ ((section(".icode")))
174 #define IRAM_ATTR __attribute__ ((section(".icode")))
175#else
176 #define IRAM_ATTR
177#endif
178 180
179#include "usb_drv.h" 181#include "usb_drv.h"
180 182
diff --git a/firmware/target/arm/tms320dm320/creative-zvm/usb-target.h b/firmware/target/arm/tms320dm320/creative-zvm/usb-target.h
index 58c5e5e6da..e69de29bb2 100644
--- a/firmware/target/arm/tms320dm320/creative-zvm/usb-target.h
+++ b/firmware/target/arm/tms320dm320/creative-zvm/usb-target.h
@@ -1,76 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2008 by Maurus Cuelenaere
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef USB_TARGET_H
23#define USB_TARGET_H
24
25#include "dm320.h"
26
27/* General purpose memory region #2 */
28#define ISP1583_IOBASE 0x60FFC000
29#define ISP1583_H_OVERRIDE
30
31#define ISP1583_INIT_ADDRESS (*((volatile unsigned char*)(ISP1583_IOBASE+0x0))) //char
32#define ISP1583_INIT_MODE (*((volatile unsigned short*)(ISP1583_IOBASE+0xC*2)))
33#define ISP1583_INIT_INTCONF (*((volatile unsigned char*)(ISP1583_IOBASE+0x10*2))) //char
34#define ISP1583_INIT_OTG (*((volatile unsigned char*)(ISP1583_IOBASE+0x12*2))) //char
35#define ISP1583_INIT_INTEN_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x14*2)))
36#define ISP1583_INIT_INTEN_B (*((volatile unsigned short*)(ISP1583_IOBASE+0x14*2+4)))
37#define ISP1583_INIT_INTEN_READ (unsigned long)( (ISP1583_INIT_INTEN_A & 0xFFFF) | ((ISP1583_INIT_INTEN_B & 0xFFFF) << 16) )
38/* Data flow registers */
39#define ISP1583_DFLOW_EPINDEX (*((volatile unsigned char*)(ISP1583_IOBASE+0xC2*2))) //char
40#define ISP1583_DFLOW_CTRLFUN (*((volatile unsigned char*)(ISP1583_IOBASE+0x28*2))) //char
41#define ISP1583_DFLOW_DATA (*((volatile unsigned short*)(ISP1583_IOBASE+0x20*2)))
42#define ISP1583_DFLOW_BUFLEN (*((volatile unsigned short*)(ISP1583_IOBASE+0x1C*2)))
43#define ISP1583_DFLOW_BUFSTAT (*((volatile unsigned char*)(ISP1583_IOBASE+0x1E*2))) //char
44#define ISP1583_DFLOW_MAXPKSZ (*((volatile unsigned short*)(ISP1583_IOBASE+0x04*2)))
45#define ISP1583_DFLOW_EPTYPE (*((volatile unsigned short*)(ISP1583_IOBASE+0x08*2)))
46/* DMA registers */
47#define ISP1583_DMA_ENDPOINT (*((volatile unsigned char*)(ISP1583_IOBASE+0x58*2)))
48/* General registers */
49#define ISP1583_GEN_INT_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x18*2)))
50#define ISP1583_GEN_INT_B (*((volatile unsigned short*)(ISP1583_IOBASE+0x18*2+4)))
51#define ISP1583_GEN_INT_READ (unsigned long)( (ISP1583_GEN_INT_A & 0xFFFF) | ((ISP1583_GEN_INT_B & 0xFFFF) << 16))
52#define ISP1583_GEN_CHIPID_A (*((volatile unsigned short*)(ISP1583_IOBASE+0x70*2)))
53#define ISP1583_GEN_CHIPID_B (*((volatile unsigned char*)(ISP1583_IOBASE+0x70*2+4))) //char
54#define ISP1583_GEN_CHIPID (unsigned long)( (ISP1583_GEN_CHIPID_A & 0xFFFF) | ((ISP1583_GEN_CHIPID_B & 0xFFFF) << 16) )
55#define ISP1583_GEN_FRAMEN0 (*((volatile unsigned short*)(ISP1583_IOBASE+0x74*2)))
56#define ISP1583_GEN_SCRATCH (*((volatile unsigned short*)(ISP1583_IOBASE+0x78*2)))
57#define ISP1583_GEN_UNLCKDEV (*((volatile unsigned short*)(ISP1583_IOBASE+0x7C*2)))
58#define ISP1583_GEN_TSTMOD (*((volatile unsigned char*)(ISP1583_IOBASE+0x84*2))) //char
59
60#define EN_INT_CPU_TARGET IO_INTC_EINT1 |= INTR_EINT1_EXT7
61#define DIS_INT_CPU_TARGET IO_INTC_EINT1 &= ~INTR_EINT1_EXT7
62#define INT_CONF_TARGET 0
63//#define INT_CONF_TARGET 2
64#define set_int_value(a,b,value) a = value & 0xFFFF; \
65 b = value >> 16;
66
67
68/*#define ZVM_SPECIFIC asm volatile( \
69 "LDR R12, =0x50FFC000\n" \
70 "LDRH R12, [R12]\n" \
71 : : : "r12");*/
72#define ZVM_SPECIFIC
73
74#define USE_IRAM
75
76#endif