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authorMichael Sevakis <jethead71@rockbox.org>2011-02-25 00:46:39 +0000
committerMichael Sevakis <jethead71@rockbox.org>2011-02-25 00:46:39 +0000
commit9f0bad0efe46237c18d7fb7074bdc60afc42c2ca (patch)
tree2a17724b3fee596dcc60b1a382d9f43a189b8fd9
parent93b1b8e15875e05d5df478194aef19a6bd69a08d (diff)
downloadrockbox-9f0bad0efe46237c18d7fb7074bdc60afc42c2ca.tar.gz
rockbox-9f0bad0efe46237c18d7fb7074bdc60afc42c2ca.zip
Byteswap routines don't really need 'asm volatile', just 'asm' since it should be safe to move them for optimizing. Clean up the line endings for ARM.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29394 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/target/arm/system-arm.h70
-rw-r--r--firmware/target/sh/system-target.h18
2 files changed, 44 insertions, 44 deletions
diff --git a/firmware/target/arm/system-arm.h b/firmware/target/arm/system-arm.h
index 9b92b7897d..7f10a30bdb 100644
--- a/firmware/target/arm/system-arm.h
+++ b/firmware/target/arm/system-arm.h
@@ -97,7 +97,7 @@ static inline uint16_t swap16_hw(uint16_t value)
97 */ 97 */
98{ 98{
99 uint32_t retval; 99 uint32_t retval;
100 asm volatile ("revsh %0, %1" /* xxAB */ 100 asm ("revsh %0, %1" /* xxAB */
101 : "=r"(retval) : "r"((uint32_t)value)); /* xxBA */ 101 : "=r"(retval) : "r"((uint32_t)value)); /* xxBA */
102 return retval; 102 return retval;
103} 103}
@@ -111,7 +111,7 @@ static inline uint32_t swap32_hw(uint32_t value)
111 */ 111 */
112{ 112{
113 uint32_t retval; 113 uint32_t retval;
114 asm volatile ("rev %0, %1" /* ABCD */ 114 asm ("rev %0, %1" /* ABCD */
115 : "=r"(retval) : "r"(value)); /* DCBA */ 115 : "=r"(retval) : "r"(value)); /* DCBA */
116 return retval; 116 return retval;
117} 117}
@@ -123,7 +123,7 @@ static inline uint32_t swap_odd_even32_hw(uint32_t value)
123 result[23..16],[ 7.. 0] = value[31..24],[15.. 8] 123 result[23..16],[ 7.. 0] = value[31..24],[15.. 8]
124 */ 124 */
125 uint32_t retval; 125 uint32_t retval;
126 asm volatile ("rev16 %0, %1" /* ABCD */ 126 asm ("rev16 %0, %1" /* ABCD */
127 : "=r"(retval) : "r"(value)); /* BADC */ 127 : "=r"(retval) : "r"(value)); /* BADC */
128 return retval; 128 return retval;
129} 129}
@@ -209,24 +209,23 @@ static inline uint32_t swap32_hw(uint32_t value)
209{ 209{
210#ifdef __thumb__ 210#ifdef __thumb__
211 uint32_t mask = 0x00FF00FF; 211 uint32_t mask = 0x00FF00FF;
212 asm volatile ( 212 asm ( /* val = ABCD */
213 "and %1, %0 \n\t" /* mask = .B.D */ 213 "and %1, %0 \n" /* mask = .B.D */
214 "eor %0, %1 \n\t" /* val = A.C. */ 214 "eor %0, %1 \n" /* val = A.C. */
215 "lsl %1, #8 \n\t" /* mask = B.D. */ 215 "lsl %1, #8 \n" /* mask = B.D. */
216 "lsr %0, #8 \n\t" /* val = .A.C */ 216 "lsr %0, #8 \n" /* val = .A.C */
217 "orr %0, %1 \n\t" /* val = BADC */ 217 "orr %0, %1 \n" /* val = BADC */
218 "mov %1, #16 \n\t" /* mask = 16 */ 218 "mov %1, #16 \n" /* mask = 16 */
219 "ror %0, %1 \n\t" /* val = DCBA */ 219 "ror %0, %1 \n" /* val = DCBA */
220 : "+l"(value), "+l"(mask)); 220 : "+l"(value), "+l"(mask));
221#else 221#else
222 uint32_t tmp; 222 uint32_t tmp;
223 asm volatile ( 223 asm (
224 "eor %1, %0, %0, ror #16 \n\t" 224 "eor %1, %0, %0, ror #16 \n"
225 "bic %1, %1, #0xff0000 \n\t" 225 "bic %1, %1, #0xff0000 \n"
226 "mov %0, %0, ror #8 \n\t" 226 "mov %0, %0, ror #8 \n"
227 "eor %0, %0, %1, lsr #8 \n\t" 227 "eor %0, %0, %1, lsr #8 \n"
228 : "+r" (value), "=r" (tmp) 228 : "+r" (value), "=r" (tmp));
229 );
230#endif 229#endif
231 return value; 230 return value;
232} 231}
@@ -239,22 +238,21 @@ static inline uint32_t swap_odd_even32_hw(uint32_t value)
239 */ 238 */
240#ifdef __thumb__ 239#ifdef __thumb__
241 uint32_t mask = 0x00FF00FF; 240 uint32_t mask = 0x00FF00FF;
242 asm volatile ( 241 asm ( /* val = ABCD */
243 "and %1, %0 \n\t" /* mask = .B.D */ 242 "and %1, %0 \n" /* mask = .B.D */
244 "eor %0, %1 \n\t" /* val = A.C. */ 243 "eor %0, %1 \n" /* val = A.C. */
245 "lsl %1, #8 \n\t" /* mask = B.D. */ 244 "lsl %1, #8 \n" /* mask = B.D. */
246 "lsr %0, #8 \n\t" /* val = .A.C */ 245 "lsr %0, #8 \n" /* val = .A.C */
247 "orr %0, %1 \n\t" /* val = BADC */ 246 "orr %0, %1 \n" /* val = BADC */
248 : "+l"(value), "+l"(mask)); 247 : "+l"(value), "+l"(mask));
249#else 248#else
250 uint32_t tmp; 249 uint32_t tmp;
251 asm volatile ( /* ABCD */ 250 asm ( /* ABCD */
252 "bic %1, %0, #0x00ff00 \n\t" /* AB.D */ 251 "bic %1, %0, #0x00ff00 \n" /* AB.D */
253 "bic %0, %0, #0xff0000 \n\t" /* A.CD */ 252 "bic %0, %0, #0xff0000 \n" /* A.CD */
254 "mov %0, %0, lsr #8 \n\t" /* .A.C */ 253 "mov %0, %0, lsr #8 \n" /* .A.C */
255 "orr %0, %0, %1, lsl #8 \n\t" /* B.D.|.A.C */ 254 "orr %0, %0, %1, lsl #8 \n" /* B.D.|.A.C */
256 : "+r" (value), "=r" (tmp) /* BADC */ 255 : "+r" (value), "=r" (tmp)); /* BADC */
257 );
258#endif 256#endif
259 return value; 257 return value;
260} 258}
@@ -303,13 +301,15 @@ static inline uint32_t swaw32_hw(uint32_t value)
303 result[15.. 0] = value[31..16]; 301 result[15.. 0] = value[31..16];
304 */ 302 */
305#ifdef __thumb__ 303#ifdef __thumb__
306 asm volatile ("ror %0, %1" : 304 asm (
307 "+l"(value) : "l"(16)); 305 "ror %0, %1"
306 : "+l"(value) : "l"(16));
308 return value; 307 return value;
309#else 308#else
310 uint32_t retval; 309 uint32_t retval;
311 asm volatile ("mov %0, %1, ror #16" : 310 asm (
312 "=r"(retval) : "r"(value)); 311 "mov %0, %1, ror #16"
312 : "=r"(retval) : "r"(value));
313 return retval; 313 return retval;
314#endif 314#endif
315 315
diff --git a/firmware/target/sh/system-target.h b/firmware/target/sh/system-target.h
index 1693a132a6..d78c0587fc 100644
--- a/firmware/target/sh/system-target.h
+++ b/firmware/target/sh/system-target.h
@@ -84,7 +84,7 @@ static inline uint16_t swap16_hw(uint16_t value)
84 */ 84 */
85{ 85{
86 uint16_t result; 86 uint16_t result;
87 asm volatile ("swap.b\t%1,%0" : "=r"(result) : "r"(value)); 87 asm ("swap.b\t%1,%0" : "=r"(result) : "r"(value));
88 return result; 88 return result;
89} 89}
90 90
@@ -95,7 +95,7 @@ static inline uint32_t swaw32_hw(uint32_t value)
95 */ 95 */
96{ 96{
97 uint32_t result; 97 uint32_t result;
98 asm volatile ("swap.w\t%1,%0" : "=r"(result) : "r"(value)); 98 asm ("swap.w\t%1,%0" : "=r"(result) : "r"(value));
99 return result; 99 return result;
100} 100}
101 101
@@ -107,9 +107,9 @@ static inline uint32_t swap32_hw(uint32_t value)
107 result[ 7.. 0] = value[31..24]; 107 result[ 7.. 0] = value[31..24];
108 */ 108 */
109{ 109{
110 asm volatile ("swap.b\t%0,%0\n" 110 asm ("swap.b\t%0,%0\n"
111 "swap.w\t%0,%0\n" 111 "swap.w\t%0,%0\n"
112 "swap.b\t%0,%0\n" : "+r"(value)); 112 "swap.b\t%0,%0\n" : "+r"(value));
113 return value; 113 return value;
114} 114}
115 115
@@ -119,10 +119,10 @@ static inline uint32_t swap_odd_even32_hw(uint32_t value)
119 result[31..24],[15.. 8] = value[23..16],[ 7.. 0] 119 result[31..24],[15.. 8] = value[23..16],[ 7.. 0]
120 result[23..16],[ 7.. 0] = value[31..24],[15.. 8] 120 result[23..16],[ 7.. 0] = value[31..24],[15.. 8]
121 */ 121 */
122 asm volatile ("swap.b\t%0,%0\n" 122 asm ("swap.b\t%0,%0\n"
123 "swap.w\t%0,%0\n" 123 "swap.w\t%0,%0\n"
124 "swap.b\t%0,%0\n" 124 "swap.b\t%0,%0\n"
125 "swap.w\t%0,%0\n" : "+r"(value)); 125 "swap.w\t%0,%0\n" : "+r"(value));
126 return value; 126 return value;
127} 127}
128 128