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authorMark Arigo <markarigo@gmail.com>2009-01-27 03:36:30 +0000
committerMark Arigo <markarigo@gmail.com>2009-01-27 03:36:30 +0000
commit9d10f112994ddd3470e219175b92ab201769ba87 (patch)
treee1f1de922c002a2e105ec79aafde89ca8ab07902
parent04992ef050a2bef8387f84efc6988211c34e19b7 (diff)
downloadrockbox-9d10f112994ddd3470e219175b92ab201769ba87.tar.gz
rockbox-9d10f112994ddd3470e219175b92ab201769ba87.zip
Make the Philips HDD1630 ADC work: it needs a slightly different init sequence. Also, it only needs 2 channels enabled.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19865 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/target/arm/adc-pp5020.c22
-rw-r--r--firmware/target/arm/philips/hdd1630/adc-target.h2
2 files changed, 21 insertions, 3 deletions
diff --git a/firmware/target/arm/adc-pp5020.c b/firmware/target/arm/adc-pp5020.c
index e270a41235..851e907246 100644
--- a/firmware/target/arm/adc-pp5020.c
+++ b/firmware/target/arm/adc-pp5020.c
@@ -39,6 +39,9 @@ unsigned short adc_scan(int channel)
39 unsigned int adc_data_1; 39 unsigned int adc_data_1;
40 unsigned int adc_data_2; 40 unsigned int adc_data_2;
41 41
42 if (channel >= NUM_ADC_CHANNELS)
43 return 0;
44
42 /* Start conversion */ 45 /* Start conversion */
43 ADC_ADDR |= 0x80000000; 46 ADC_ADDR |= 0x80000000;
44 47
@@ -56,12 +59,14 @@ unsigned short adc_scan(int channel)
56 59
57 adcdata[channel] = (adc_data_1<<2 | adc_data_2); 60 adcdata[channel] = (adc_data_1<<2 | adc_data_2);
58 61
62#if !defined(PHILIPS_HDD1630)
59 /* ADC values read low if PLL is enabled */ 63 /* ADC values read low if PLL is enabled */
60 if(PLL_CONTROL & 0x80000000){ 64 if(PLL_CONTROL & 0x80000000){
61 adcdata[channel] += 0x14; 65 adcdata[channel] += 0x14;
62 if(adcdata[channel] > 0x400) 66 if(adcdata[channel] > 0x400)
63 adcdata[channel] = 0x400; 67 adcdata[channel] = 0x400;
64 } 68 }
69#endif
65 70
66 return adcdata[channel]; 71 return adcdata[channel];
67} 72}
@@ -89,9 +94,12 @@ static void adc_tick(void)
89/* Figured out from how the OF does things */ 94/* Figured out from how the OF does things */
90void adc_init(void) 95void adc_init(void)
91{ 96{
92 97#if defined(PHILIPS_HDD1630)
98 ADC_INIT = 0;
99#else
93 ADC_INIT |= 1; 100 ADC_INIT |= 1;
94 ADC_INIT |= 0x40000000; 101 ADC_INIT |= 0x40000000;
102#endif
95 udelay(100); 103 udelay(100);
96 104
97 /* Reset ADC */ 105 /* Reset ADC */
@@ -108,13 +116,17 @@ void adc_init(void)
108 ADC_CLOCK_SRC |= 0x3; 116 ADC_CLOCK_SRC |= 0x3;
109 udelay(100); 117 udelay(100);
110 118
119 ADC_ADDR = 0;
111 ADC_ADDR |= 0x40; 120 ADC_ADDR |= 0x40;
121
122#if !defined(PHILIPS_HDD1630)
112 ADC_ADDR |= 0x20000000; 123 ADC_ADDR |= 0x20000000;
113 udelay(100); 124 udelay(100);
114 125
115 ADC_INIT; 126 ADC_INIT;
116 ADC_INIT = 0; 127 ADC_INIT = 0;
117 udelay(100); 128 udelay(100);
129#endif
118 130
119 ADC_STATUS = 0; 131 ADC_STATUS = 0;
120 132
@@ -129,7 +141,7 @@ void adc_init(void)
129 ADC_STATUS |= 0x2000; 141 ADC_STATUS |= 0x2000;
130 142
131#if defined (IRIVER_H10) || defined(IRIVER_H10_5GB) || \ 143#if defined (IRIVER_H10) || defined(IRIVER_H10_5GB) || \
132 defined(MROBE_100) || defined(PHILIPS_HDD1630) 144 defined(MROBE_100)
133 /* Enable channel 2 (H10:remote) */ 145 /* Enable channel 2 (H10:remote) */
134 DEV_INIT1 &=~0x300; 146 DEV_INIT1 &=~0x300;
135 DEV_INIT1 |= 0x100; 147 DEV_INIT1 |= 0x100;
@@ -143,6 +155,12 @@ void adc_init(void)
143 ADC_STATUS |= 0x20000000; 155 ADC_STATUS |= 0x20000000;
144#endif 156#endif
145 157
158#if defined(PHILIPS_HDD1630)
159 ADC_INIT |= 0x80000000;
160 udelay(100);
161 ADC_INIT = 0;
162#endif
163
146 /* Force a scan of all channels to get initial values */ 164 /* Force a scan of all channels to get initial values */
147 adc_scan(0); 165 adc_scan(0);
148 adc_scan(1); 166 adc_scan(1);
diff --git a/firmware/target/arm/philips/hdd1630/adc-target.h b/firmware/target/arm/philips/hdd1630/adc-target.h
index ee9e294c6b..bf97081e35 100644
--- a/firmware/target/arm/philips/hdd1630/adc-target.h
+++ b/firmware/target/arm/philips/hdd1630/adc-target.h
@@ -21,7 +21,7 @@
21#ifndef _ADC_TARGET_H_ 21#ifndef _ADC_TARGET_H_
22#define _ADC_TARGET_H_ 22#define _ADC_TARGET_H_
23 23
24#define NUM_ADC_CHANNELS 4 24#define NUM_ADC_CHANNELS 2
25 25
26#define ADC_BATTERY 0 26#define ADC_BATTERY 0
27#define ADC_UNKNOWN_1 1 27#define ADC_UNKNOWN_1 1