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authorRafaël Carré <rafael.carre@gmail.com>2009-11-03 08:14:28 +0000
committerRafaël Carré <rafael.carre@gmail.com>2009-11-03 08:14:28 +0000
commit9b46960baf2e19290f0761020609f78b82457263 (patch)
tree265cd99981495b7956386767b0556094159b6d06
parent00997714ef51f9ac046428041769e32a023635fd (diff)
downloadrockbox-9b46960baf2e19290f0761020609f78b82457263.tar.gz
rockbox-9b46960baf2e19290f0761020609f78b82457263.zip
Sansa AMS PCM : cleanup
Init CGU_AUDIO with correct clock source (for play & rec) Do not disable recording clocks when starting playback, they are already disabled Move clock enable/disable code from dma callback to init git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23493 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/target/arm/as3525/pcm-as3525.c18
1 files changed, 8 insertions, 10 deletions
diff --git a/firmware/target/arm/as3525/pcm-as3525.c b/firmware/target/arm/as3525/pcm-as3525.c
index 26e018c82f..2de047b8f0 100644
--- a/firmware/target/arm/as3525/pcm-as3525.c
+++ b/firmware/target/arm/as3525/pcm-as3525.c
@@ -64,13 +64,6 @@ static void play_start_pcm(void)
64 dma_size -= size; 64 dma_size -= size;
65 dma_start_addr += size; 65 dma_start_addr += size;
66 66
67 CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
68 CGU_AUDIO |= (1<<11);
69#ifdef HAVE_RECORDING
70 CGU_PERI &= ~CGU_I2SIN_APB_CLOCK_ENABLE;
71 CGU_AUDIO &= ~(1<<23);
72#endif
73
74 clean_dcache_range((void*)addr, size); /* force write back */ 67 clean_dcache_range((void*)addr, size); /* force write back */
75 dma_enable_channel(1, (void*)addr, (void*)I2SOUT_DATA, DMA_PERI_I2SOUT, 68 dma_enable_channel(1, (void*)addr, (void*)I2SOUT_DATA, DMA_PERI_I2SOUT,
76 DMAC_FLOWCTRL_DMAC_MEM_TO_PERI, true, false, size >> 2, DMA_S1, 69 DMAC_FLOWCTRL_DMAC_MEM_TO_PERI, true, false, size >> 2, DMA_S1,
@@ -102,6 +95,11 @@ void pcm_play_dma_start(const void *addr, size_t size)
102 95
103 dma_retain(); 96 dma_retain();
104 97
98 I2SOUT_CONTROL |= 1<<6; /* dma */
99
100 CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
101 CGU_AUDIO |= (1<<11);
102
105 play_start_pcm(); 103 play_start_pcm();
106} 104}
107 105
@@ -128,10 +126,9 @@ void pcm_play_dma_init(void)
128{ 126{
129 CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE; 127 CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
130 128
131 /* clock source PLLA, minimal frequency */ 129 CGU_AUDIO = (CGU_AUDIO & ~(3<<0)) | (1<<0); /* clock source PLLA */
132 CGU_AUDIO |= (511<<2) | (1<<0);
133 130
134 I2SOUT_CONTROL = (1<<6)|(1<<3) /* enable dma, stereo */; 131 I2SOUT_CONTROL = (1<<3) /* stereo */;
135 132
136 audiohw_preinit(); 133 audiohw_preinit();
137} 134}
@@ -290,6 +287,7 @@ void pcm_rec_dma_close(void)
290 287
291void pcm_rec_dma_init(void) 288void pcm_rec_dma_init(void)
292{ 289{
290 CGU_AUDIO = (CGU_AUDIO & ~(3<<12)) | (1<<12); /* clock source = PLLA */
293 pcm_dma_apply_settings(); 291 pcm_dma_apply_settings();
294} 292}
295 293