diff options
author | Marcin Bukat <marcin.bukat@gmail.com> | 2010-07-02 21:09:28 +0000 |
---|---|---|
committer | Marcin Bukat <marcin.bukat@gmail.com> | 2010-07-02 21:09:28 +0000 |
commit | 971a6e9c9480d07b939f5e80a050ef9f49c89f81 (patch) | |
tree | e01d1843ceb6e4c3efb5a9de7a2b862eb368a461 | |
parent | 15d0ac01345346ae348bb15c58ddf88ef0ac0020 (diff) | |
download | rockbox-971a6e9c9480d07b939f5e80a050ef9f49c89f81.tar.gz rockbox-971a6e9c9480d07b939f5e80a050ef9f49c89f81.zip |
HD200 - Setup codec as I2S master and enable recording
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27250 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/drivers/audio/wm8751.c | 153 | ||||
-rw-r--r-- | firmware/export/config/mpiohd200.h | 32 | ||||
-rw-r--r-- | firmware/export/wm8751.h | 10 | ||||
-rw-r--r-- | firmware/target/coldfire/mpio/audio-mpio.c | 7 | ||||
-rw-r--r-- | firmware/target/coldfire/pcm-coldfire.c | 13 |
5 files changed, 137 insertions, 78 deletions
diff --git a/firmware/drivers/audio/wm8751.c b/firmware/drivers/audio/wm8751.c index 2adbdcaa56..6e37a91ed7 100644 --- a/firmware/drivers/audio/wm8751.c +++ b/firmware/drivers/audio/wm8751.c | |||
@@ -42,6 +42,14 @@ const struct sound_settings_info audiohw_settings[] = { | |||
42 | [SOUND_BALANCE] = {"%", 0, 1,-100, 100, 0}, | 42 | [SOUND_BALANCE] = {"%", 0, 1,-100, 100, 0}, |
43 | [SOUND_CHANNELS] = {"", 0, 1, 0, 5, 0}, | 43 | [SOUND_CHANNELS] = {"", 0, 1, 0, 5, 0}, |
44 | [SOUND_STEREO_WIDTH] = {"%", 0, 5, 0, 250, 100}, | 44 | [SOUND_STEREO_WIDTH] = {"%", 0, 5, 0, 250, 100}, |
45 | #ifdef AUDIOHW_HAVE_DEPTH_3D | ||
46 | [SOUND_DEPTH_3D] = {"", 0, 1, 0, 15, 0}, | ||
47 | #endif | ||
48 | #ifdef HAVE_RECORDING | ||
49 | [SOUND_LEFT_GAIN] = {"dB", 1, 1,-172, 300, 0}, | ||
50 | [SOUND_RIGHT_GAIN] = {"dB", 1, 1,-172, 300, 0}, | ||
51 | [SOUND_MIC_GAIN] = {"dB", 1, 1,-172, 300, 0}, | ||
52 | #endif | ||
45 | }; | 53 | }; |
46 | 54 | ||
47 | /* Flags used in combination with settings */ | 55 | /* Flags used in combination with settings */ |
@@ -110,7 +118,7 @@ static int recvol2hw(int value) | |||
110 | /* 010111 == 0dB (0x17) */ | 118 | /* 010111 == 0dB (0x17) */ |
111 | /* 000000 == -17.25dB */ | 119 | /* 000000 == -17.25dB */ |
112 | 120 | ||
113 | return (3*(value/10 - 0x17))/4; | 121 | return ((4*(value))/30 + 0x17); |
114 | } | 122 | } |
115 | #endif | 123 | #endif |
116 | static void audiohw_mute(bool mute) | 124 | static void audiohw_mute(bool mute) |
@@ -167,6 +175,14 @@ void audiohw_postinit(void) | |||
167 | 175 | ||
168 | /* 4. Enable line and / or headphone output buffers as required. */ | 176 | /* 4. Enable line and / or headphone output buffers as required. */ |
169 | #if defined(MROBE_100) || defined(MPIO_HD200) | 177 | #if defined(MROBE_100) || defined(MPIO_HD200) |
178 | /* fix for high pitch noise after power-up on HD200 | ||
179 | * it is *NOT* required step according to the | ||
180 | * Datasheet for WM8750L but real life is different :-) | ||
181 | */ | ||
182 | wmcodec_write(LOUT1, LOUT1_BITS); | ||
183 | wmcodec_write(ROUT1, ROUT1_BITS); | ||
184 | |||
185 | /* power-up output stage */ | ||
170 | wmcodec_write(PWRMGMT2, PWRMGMT2_DACL | PWRMGMT2_DACR | | 186 | wmcodec_write(PWRMGMT2, PWRMGMT2_DACL | PWRMGMT2_DACR | |
171 | PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1); | 187 | PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1); |
172 | #else | 188 | #else |
@@ -196,16 +212,6 @@ void audiohw_postinit(void) | |||
196 | #endif | 212 | #endif |
197 | #endif | 213 | #endif |
198 | 214 | ||
199 | #ifdef MPIO_HD200 | ||
200 | /* Crude fix for high pitch noise at startup | ||
201 | * I should find out what realy causes this | ||
202 | */ | ||
203 | wmcodec_write(LOUT1, LOUT1_BITS|0x7f); | ||
204 | wmcodec_write(ROUT1, ROUT1_BITS|0x7f); | ||
205 | wmcodec_write(LOUT1, LOUT1_BITS); | ||
206 | wmcodec_write(ROUT1, ROUT1_BITS); | ||
207 | #endif | ||
208 | |||
209 | /* lower power consumption */ | 215 | /* lower power consumption */ |
210 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K); | 216 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K); |
211 | 217 | ||
@@ -276,10 +282,12 @@ void audiohw_close(void) | |||
276 | wmcodec_write(PWRMGMT1, 0x0); | 282 | wmcodec_write(PWRMGMT1, 0x0); |
277 | } | 283 | } |
278 | 284 | ||
285 | /* According to datasheet of WM8750 | ||
286 | * clocking setup is needed in both slave and master mode | ||
287 | */ | ||
279 | void audiohw_set_frequency(int fsel) | 288 | void audiohw_set_frequency(int fsel) |
280 | { | 289 | { |
281 | (void)fsel; | 290 | (void)fsel; |
282 | #ifndef CODEC_SLAVE | ||
283 | static const unsigned char srctrl_table[HW_NUM_FREQ] = | 291 | static const unsigned char srctrl_table[HW_NUM_FREQ] = |
284 | { | 292 | { |
285 | HW_HAVE_11_([HW_FREQ_11] = CODEC_SRCTRL_11025HZ,) | 293 | HW_HAVE_11_([HW_FREQ_11] = CODEC_SRCTRL_11025HZ,) |
@@ -292,10 +300,23 @@ void audiohw_set_frequency(int fsel) | |||
292 | fsel = HW_FREQ_DEFAULT; | 300 | fsel = HW_FREQ_DEFAULT; |
293 | 301 | ||
294 | wmcodec_write(CLOCKING, srctrl_table[fsel]); | 302 | wmcodec_write(CLOCKING, srctrl_table[fsel]); |
295 | #endif | ||
296 | } | 303 | } |
297 | 304 | ||
298 | #if defined(HAVE_WM8750) | 305 | #if defined(HAVE_WM8750) |
306 | #ifdef AUDIOHW_HAVE_DEPTH_3D | ||
307 | /* Set the depth of the 3D effect */ | ||
308 | void audiohw_set_depth_3d(int val) | ||
309 | { | ||
310 | if (val) | ||
311 | wmcodec_write(ENHANCE_3D, | ||
312 | ENHANCE_3D_MODE3D_PLAYBACK | ENHANCE_3D_DEPTH(val) | | ||
313 | ENHANCE_3D_3DEN); | ||
314 | else | ||
315 | wmcodec_write(ENHANCE_3D,ENHANCE_3D_MODE3D_PLAYBACK); | ||
316 | } | ||
317 | #endif | ||
318 | |||
319 | #ifdef HAVE_RECORDING | ||
299 | void audiohw_set_recsrc(int source, bool recording) | 320 | void audiohw_set_recsrc(int source, bool recording) |
300 | { | 321 | { |
301 | /* INPUT1 - FM radio | 322 | /* INPUT1 - FM radio |
@@ -307,17 +328,30 @@ void audiohw_set_recsrc(int source, bool recording) | |||
307 | * turn on output buffer(s) | 328 | * turn on output buffer(s) |
308 | * | 329 | * |
309 | * if recording == true we route input signal to PGA | 330 | * if recording == true we route input signal to PGA |
310 | * and monitoring picks up signal after PGA in analog domain | 331 | * and monitoring picks up signal after PGA and ADC |
311 | * turn on ADC, PGA, DAC, output buffer(s) | 332 | * turn on ADC, PGA, DAC, output buffer(s) |
312 | */ | 333 | */ |
313 | 334 | ||
314 | switch(source) | 335 | switch(source) |
315 | { | 336 | { |
316 | case AUDIO_SRC_PLAYBACK: | 337 | case AUDIO_SRC_PLAYBACK: |
317 | /* mute PGA, disable all audio paths but DAC and output stage*/ | 338 | /* turn off DAC and ADC in order to setup Enchance 3D function |
318 | wmcodec_write(LINVOL, LINVOL_LINMUTE | LINVOL_LINVOL(23)); /* 0dB */ | 339 | * for playback. This does not turn on enchancement but |
319 | wmcodec_write(RINVOL, RINVOL_RINMUTE | RINVOL_RINVOL(23)); /* 0dB */ | 340 | * the switch between playback/record has to be done with |
341 | * DAC and ADC off | ||
342 | */ | ||
343 | #ifdef AUDIOHW_HAVE_DEPTH_3D | ||
320 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K); | 344 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K); |
345 | wmcodec_write(PWRMGMT2, 0x00); | ||
346 | wmcodec_write(ENHANCE_3D, ENHANCE_3D_MODE3D_PLAYBACK); | ||
347 | #endif | ||
348 | /* mute PGA, disable all audio paths but DAC and output stage*/ | ||
349 | wmcodec_write(LINVOL, LINVOL_LINMUTE | LINVOL_LINVOL(0x17)); /* 0dB */ | ||
350 | wmcodec_write(RINVOL, RINVOL_RINMUTE | RINVOL_RINVOL(0x17)); /* 0dB */ | ||
351 | |||
352 | wmcodec_write(LOUT1, LOUT1_BITS); | ||
353 | wmcodec_write(ROUT1, ROUT1_BITS); | ||
354 | |||
321 | wmcodec_write(PWRMGMT2, PWRMGMT2_DACL | PWRMGMT2_DACR | | 355 | wmcodec_write(PWRMGMT2, PWRMGMT2_DACL | PWRMGMT2_DACR | |
322 | PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1); | 356 | PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1); |
323 | 357 | ||
@@ -332,15 +366,26 @@ void audiohw_set_recsrc(int source, bool recording) | |||
332 | case AUDIO_SRC_FMRADIO: | 366 | case AUDIO_SRC_FMRADIO: |
333 | if(recording) | 367 | if(recording) |
334 | { | 368 | { |
335 | /* Set input volume to PGA */ | 369 | /* turn off DAC and ADC in order to setup Enchance 3D function |
336 | wmcodec_write(LINVOL, LINVOL_LINVOL(23)); | 370 | * for playback. This does not turn on enchancement but |
337 | wmcodec_write(RINVOL, RINVOL_RINVOL(23)); | 371 | * the switch between playback/record has to be done with |
372 | * DAC and ADC off | ||
373 | */ | ||
374 | #ifdef AUDIOHW_HAVE_DEPTH_3D | ||
375 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K); | ||
376 | wmcodec_write(PWRMGMT2, 0x00); | ||
377 | wmcodec_write(ENHANCE_3D, ENHANCE_3D_MODE3D_RECORD); | ||
378 | #endif | ||
338 | 379 | ||
339 | /* Turn on PGA and ADC */ | 380 | /* Turn on PGA and ADC */ |
340 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K | | 381 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K | |
341 | PWRMGMT1_AINL | PWRMGMT1_AINR | | 382 | PWRMGMT1_AINL | PWRMGMT1_AINR | |
342 | PWRMGMT1_ADCL | PWRMGMT1_ADCR); | 383 | PWRMGMT1_ADCL | PWRMGMT1_ADCR); |
343 | 384 | ||
385 | /* Set input volume to PGA 0dB*/ | ||
386 | wmcodec_write(LINVOL, LINVOL_LIVU|LINVOL_LINVOL(0x17)); | ||
387 | wmcodec_write(RINVOL, RINVOL_RIVU|RINVOL_RINVOL(0x17)); | ||
388 | |||
344 | /* Setup input source for PGA as INPUT1 | 389 | /* Setup input source for PGA as INPUT1 |
345 | * MICBOOST disabled | 390 | * MICBOOST disabled |
346 | */ | 391 | */ |
@@ -356,38 +401,45 @@ void audiohw_set_recsrc(int source, bool recording) | |||
356 | wmcodec_write(PWRMGMT2, PWRMGMT2_DACL | PWRMGMT2_DACR | | 401 | wmcodec_write(PWRMGMT2, PWRMGMT2_DACL | PWRMGMT2_DACR | |
357 | PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1); | 402 | PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1); |
358 | 403 | ||
359 | /* analog monitor */ | 404 | /* route DAC signal to output mixer */ |
360 | wmcodec_write(LEFTMIX1, LEFTMIX1_LMIXSEL_ADCLIN | | 405 | wmcodec_write(LEFTMIX1, LEFTMIX1_LD2LO); |
361 | LEFTMIX1_LD2LO); | 406 | wmcodec_write(RIGHTMIX2, RIGHTMIX2_RD2RO); |
362 | wmcodec_write(RIGHTMIX2, RIGHTMIX2_RMIXSEL_ADCRIN | | ||
363 | RIGHTMIX2_RD2RO); | ||
364 | } | 407 | } |
365 | else | 408 | else |
366 | { | 409 | { |
367 | |||
368 | /* turn off ADC, PGA */ | 410 | /* turn off ADC, PGA */ |
369 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K); | 411 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K); |
370 | 412 | ||
413 | wmcodec_write(LOUT1, LOUT1_BITS); | ||
414 | wmcodec_write(ROUT1, ROUT1_BITS); | ||
415 | |||
371 | /* turn on DAC and output stage */ | 416 | /* turn on DAC and output stage */ |
372 | wmcodec_write(PWRMGMT2, PWRMGMT2_DACL | PWRMGMT2_DACR | | 417 | wmcodec_write(PWRMGMT2, PWRMGMT2_DACL | PWRMGMT2_DACR | |
373 | PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1); | 418 | PWRMGMT2_LOUT1 | PWRMGMT2_ROUT1); |
374 | 419 | ||
375 | /* setup monitor mode by routing input signal to outmix | 420 | /* setup monitor mode by routing input signal to outmix |
376 | * at 0dB volume | 421 | * at 0dB volume |
377 | */ | 422 | */ |
378 | wmcodec_write(LEFTMIX1, LEFTMIX1_LI2LO | LEFTMIX1_LMIXSEL_LINPUT1 | | 423 | wmcodec_write(LEFTMIX1, LEFTMIX1_LI2LO | LEFTMIX1_LMIXSEL_LINPUT1 | |
379 | LEFTMIX1_LI2LOVOL(0x20) | LEFTMIX1_LD2LO); | 424 | LEFTMIX1_LI2LOVOL(0x20) | LEFTMIX1_LD2LO); |
380 | wmcodec_write(RIGHTMIX2, RIGHTMIX2_RI2RO | RIGHTMIX2_RMIXSEL_RINPUT1 | | 425 | wmcodec_write(RIGHTMIX1, RIGHTMIX1_RMIXSEL_RINPUT1); |
426 | wmcodec_write(RIGHTMIX2, RIGHTMIX2_RI2RO | | ||
381 | RIGHTMIX2_RI2ROVOL(0x20) | RIGHTMIX2_RD2RO); | 427 | RIGHTMIX2_RI2ROVOL(0x20) | RIGHTMIX2_RD2RO); |
382 | } | 428 | } |
383 | break; | 429 | break; |
384 | 430 | ||
385 | case AUDIO_SRC_LINEIN: | 431 | case AUDIO_SRC_LINEIN: |
432 | #ifdef AUDIOHW_HAVE_DEPTH_3D | ||
433 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K); | ||
434 | wmcodec_write(PWRMGMT2, 0x00); | ||
435 | wmcodec_write(ENHANCE_3D, ENHANCE_3D_MODE3D_RECORD); | ||
436 | #endif | ||
437 | |||
386 | /* Set input volume to PGA */ | 438 | /* Set input volume to PGA */ |
387 | wmcodec_write(LINVOL, LINVOL_LINVOL(23)); | 439 | wmcodec_write(LINVOL, LINVOL_LIVU | LINVOL_LINVOL(23)); |
388 | wmcodec_write(RINVOL, RINVOL_RINVOL(23)); | 440 | wmcodec_write(RINVOL, RINVOL_RIVU | RINVOL_RINVOL(23)); |
389 | 441 | ||
390 | /* Turn on PGA, ADC, DAC */ | 442 | /* Turn on PGA, ADC */ |
391 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K | | 443 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K | |
392 | PWRMGMT1_AINL | PWRMGMT1_AINR | | 444 | PWRMGMT1_AINL | PWRMGMT1_AINR | |
393 | PWRMGMT1_ADCL | PWRMGMT1_ADCR); | 445 | PWRMGMT1_ADCL | PWRMGMT1_ADCR); |
@@ -406,18 +458,21 @@ void audiohw_set_recsrc(int source, bool recording) | |||
406 | * default is LADC -> LDATA, RADC -> RDATA | 458 | * default is LADC -> LDATA, RADC -> RDATA |
407 | * so we don't touch this | 459 | * so we don't touch this |
408 | */ | 460 | */ |
409 | 461 | /* route DAC signal to output mixer */ | |
410 | /* digital monitor */ | 462 | wmcodec_write(LEFTMIX1, LEFTMIX1_LD2LO); |
411 | wmcodec_write(LEFTMIX1, LEFTMIX1_LMIXSEL_ADCLIN | | 463 | wmcodec_write(RIGHTMIX2, RIGHTMIX2_RD2RO); |
412 | LEFTMIX1_LD2LO); | ||
413 | wmcodec_write(RIGHTMIX2, RIGHTMIX2_RMIXSEL_ADCRIN | | ||
414 | RIGHTMIX2_RD2RO); | ||
415 | break; | 464 | break; |
416 | 465 | ||
417 | case AUDIO_SRC_MIC: | 466 | case AUDIO_SRC_MIC: |
467 | #ifdef AUDIOHW_HAVE_DEPTH_3D | ||
468 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K); | ||
469 | wmcodec_write(PWRMGMT2, 0x00); | ||
470 | wmcodec_write(ENHANCE_3D, ENHANCE_3D_MODE3D_RECORD); | ||
471 | #endif | ||
472 | |||
418 | /* Set input volume to PGA */ | 473 | /* Set input volume to PGA */ |
419 | wmcodec_write(LINVOL, LINVOL_LINVOL(23)); | 474 | wmcodec_write(LINVOL, LINVOL_LIVU | LINVOL_LINVOL(23)); |
420 | wmcodec_write(RINVOL, RINVOL_RINVOL(23)); | 475 | wmcodec_write(RINVOL, RINVOL_RIVU | RINVOL_RINVOL(23)); |
421 | 476 | ||
422 | /* Turn on PGA and ADC, turn off DAC */ | 477 | /* Turn on PGA and ADC, turn off DAC */ |
423 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K | | 478 | wmcodec_write(PWRMGMT1, PWRMGMT1_VREF | PWRMGMT1_VMIDSEL_50K | |
@@ -439,21 +494,19 @@ void audiohw_set_recsrc(int source, bool recording) | |||
439 | * so we don't touch this | 494 | * so we don't touch this |
440 | */ | 495 | */ |
441 | 496 | ||
442 | /* analog monitor */ | 497 | /* route DAC signal to output mixer */ |
443 | wmcodec_write(LEFTMIX1, LEFTMIX1_LMIXSEL_ADCLIN | | 498 | wmcodec_write(LEFTMIX1, LEFTMIX1_LD2LO); |
444 | LEFTMIX1_LD2LO); | 499 | wmcodec_write(RIGHTMIX2, RIGHTMIX2_RD2RO); |
445 | wmcodec_write(RIGHTMIX2, RIGHTMIX2_RMIXSEL_ADCRIN | | ||
446 | RIGHTMIX2_RD2RO); | ||
447 | break; | ||
448 | 500 | ||
449 | } /* switch(source) */ | 501 | } /* switch(source) */ |
450 | } | 502 | } |
451 | 503 | ||
452 | /* Setup PGA gain */ | 504 | /* Setup PGA gain */ |
453 | void audiohw_set_recvol(int left, int right, int type) | 505 | void audiohw_set_recvol(int vol_l, int vol_r, int type) |
454 | { | 506 | { |
455 | (void)type; | 507 | (void)type; |
456 | wmcodec_write(LINVOL, LINVOL_LINVOL(recvol2hw(left))); | 508 | wmcodec_write(LINVOL, LINVOL_LIZC|LINVOL_LINVOL(recvol2hw(vol_l))); |
457 | wmcodec_write(RINVOL, RINVOL_RINVOL(recvol2hw(right))); | 509 | wmcodec_write(RINVOL, RINVOL_RIZC|RINVOL_RIVU|RINVOL_RINVOL(recvol2hw(vol_r))); |
458 | } | 510 | } |
459 | #endif | 511 | #endif /* HAVE_RECORDING */ |
512 | #endif /* HAVE_WM8750 */ | ||
diff --git a/firmware/export/config/mpiohd200.h b/firmware/export/config/mpiohd200.h index 465154a4bd..b9e9b11e2d 100644 --- a/firmware/export/config/mpiohd200.h +++ b/firmware/export/config/mpiohd200.h | |||
@@ -14,26 +14,18 @@ | |||
14 | #define ATA_SWAP_WORDS | 14 | #define ATA_SWAP_WORDS |
15 | 15 | ||
16 | /* define this if you have recording possibility */ | 16 | /* define this if you have recording possibility */ |
17 | /* not implemented yet | 17 | #define HAVE_RECORDING |
18 | * #define HAVE_RECORDING | ||
19 | */ | ||
20 | |||
21 | 18 | ||
22 | /* Define bitmask of input sources - recordable bitmask can be defined | 19 | /* Define bitmask of input sources - recordable bitmask can be defined |
23 | * explicitly if different | 20 | * explicitly if different |
24 | * not implemented yet | ||
25 | */ | 21 | */ |
26 | |||
27 | #define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_LINEIN | SRC_CAP_FMRADIO) | 22 | #define INPUT_SRC_CAPS (SRC_CAP_MIC | SRC_CAP_LINEIN | SRC_CAP_FMRADIO) |
28 | 23 | ||
29 | |||
30 | /* define the bitmask of hardware sample rates */ | 24 | /* define the bitmask of hardware sample rates */ |
31 | #define HW_SAMPR_CAPS (SAMPR_CAP_88 | SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11) | 25 | #define HW_SAMPR_CAPS (SAMPR_CAP_88 | SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11) |
32 | 26 | ||
33 | /* define the bitmask of recording sample rates | 27 | /* define the bitmask of recording sample rates */ |
34 | * not implemented yet | 28 | #define REC_SAMPR_CAPS (SAMPR_CAP_88 | SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11) |
35 | *#define REC_SAMPR_CAPS (SAMPR_CAP_88 | SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11) | ||
36 | */ | ||
37 | 29 | ||
38 | /* define this if you have a bitmap LCD display */ | 30 | /* define this if you have a bitmap LCD display */ |
39 | #define HAVE_LCD_BITMAP | 31 | #define HAVE_LCD_BITMAP |
@@ -114,9 +106,17 @@ | |||
114 | #define CONFIG_TUNER_XTAL 32768 | 106 | #define CONFIG_TUNER_XTAL 32768 |
115 | 107 | ||
116 | 108 | ||
117 | /* we have WM8750 codec in I2S slave mode */ | 109 | /* we have WM8750 codec in I2S master mode */ |
118 | #define HAVE_WM8750 | 110 | #define HAVE_WM8750 |
119 | #define CODEC_SLAVE | 111 | |
112 | /* clocking setup based on 11.2896 MHz master clock | ||
113 | * provided to the codec by MCU | ||
114 | * WM8750L Datasheet Table 40, page 46 | ||
115 | */ | ||
116 | #define CODEC_SRCTRL_11025HZ (0x18 << 1) | ||
117 | #define CODEC_SRCTRL_22050HZ (0x1A << 1) | ||
118 | #define CODEC_SRCTRL_44100HZ (0x10 << 1) | ||
119 | #define CODEC_SRCTRL_88200HZ (0x1E << 1) | ||
120 | 120 | ||
121 | #define BATTERY_CAPACITY_DEFAULT 950 /* default battery capacity */ | 121 | #define BATTERY_CAPACITY_DEFAULT 950 /* default battery capacity */ |
122 | #define BATTERY_CAPACITY_MIN 950 /* min. capacity selectable */ | 122 | #define BATTERY_CAPACITY_MIN 950 /* min. capacity selectable */ |
@@ -142,12 +142,6 @@ | |||
142 | /* Define this if you want to use coldfire's i2c interface */ | 142 | /* Define this if you want to use coldfire's i2c interface */ |
143 | #define CONFIG_I2C I2C_COLDFIRE | 143 | #define CONFIG_I2C I2C_COLDFIRE |
144 | 144 | ||
145 | /* OF resets device instead of poweroff while charging | ||
146 | * this triggers bootloader code which takes care of charging. | ||
147 | * I have feeling that powering off while charging may cause | ||
148 | * partition table corruption I am experiencing from time to time | ||
149 | */ | ||
150 | |||
151 | /* define this if the hardware can be powered off while charging */ | 145 | /* define this if the hardware can be powered off while charging */ |
152 | /* #define HAVE_POWEROFF_WHILE_CHARGING */ | 146 | /* #define HAVE_POWEROFF_WHILE_CHARGING */ |
153 | 147 | ||
diff --git a/firmware/export/wm8751.h b/firmware/export/wm8751.h index 8992c88076..7a3a3075af 100644 --- a/firmware/export/wm8751.h +++ b/firmware/export/wm8751.h | |||
@@ -25,13 +25,19 @@ | |||
25 | #define VOLUME_MIN -730 | 25 | #define VOLUME_MIN -730 |
26 | #define VOLUME_MAX 60 | 26 | #define VOLUME_MAX 60 |
27 | 27 | ||
28 | /* turn off 3D Enchance feature of WM8750 for now | ||
29 | #if defined(HAVE_WM8750) | ||
30 | #define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP | PRESCALER_CAP | DEPTH_3D_CAP) | ||
31 | #else | ||
32 | */ | ||
28 | #define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP | PRESCALER_CAP) | 33 | #define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP | PRESCALER_CAP) |
34 | /* #endif */ | ||
29 | 35 | ||
30 | extern int tenthdb2master(int db); | 36 | extern int tenthdb2master(int db); |
31 | 37 | ||
32 | extern void audiohw_set_master_vol(int vol_l, int vol_r); | 38 | extern void audiohw_set_master_vol(int vol_l, int vol_r); |
33 | extern void audiohw_set_lineout_vol(int vol_l, int vol_r); | 39 | extern void audiohw_set_lineout_vol(int vol_l, int vol_r); |
34 | #if defined(HAVE_WM8750) | 40 | #if defined(HAVE_WM8750) && defined(HAVE_RECORDING) |
35 | void audiohw_set_recsrc(int source, bool recording); | 41 | void audiohw_set_recsrc(int source, bool recording); |
36 | #endif | 42 | #endif |
37 | 43 | ||
@@ -222,7 +228,7 @@ void audiohw_set_recsrc(int source, bool recording); | |||
222 | #define ADCL_LMICBOOST_13DB (1 << 4) | 228 | #define ADCL_LMICBOOST_13DB (1 << 4) |
223 | #define ADCL_LMICBOOST_20DB (2 << 4) | 229 | #define ADCL_LMICBOOST_20DB (2 << 4) |
224 | #define ADCL_LMICBOOST_29DB (3 << 4) | 230 | #define ADCL_LMICBOOST_29DB (3 << 4) |
225 | #define ADCL_LMICBOOST(x) ((x) & (0x3 << 7)) | 231 | #define ADCL_LMICBOOST(x) (((x) & 0x3) << 4)) |
226 | #define ADCL_LINSEL_LINPUT1 (0 << 6) | 232 | #define ADCL_LINSEL_LINPUT1 (0 << 6) |
227 | #define ADCL_LINSEL_LINPUT2 (1 << 6) | 233 | #define ADCL_LINSEL_LINPUT2 (1 << 6) |
228 | #define ADCL_LINSEL_LINPUT3 (2 << 6) | 234 | #define ADCL_LINSEL_LINPUT3 (2 << 6) |
diff --git a/firmware/target/coldfire/mpio/audio-mpio.c b/firmware/target/coldfire/mpio/audio-mpio.c index 217881547e..88c43383ca 100644 --- a/firmware/target/coldfire/mpio/audio-mpio.c +++ b/firmware/target/coldfire/mpio/audio-mpio.c | |||
@@ -46,6 +46,7 @@ void audio_set_output_source(int source) | |||
46 | if ((unsigned)source >= AUDIO_NUM_SOURCES) | 46 | if ((unsigned)source >= AUDIO_NUM_SOURCES) |
47 | source = AUDIO_SRC_PLAYBACK; | 47 | source = AUDIO_SRC_PLAYBACK; |
48 | 48 | ||
49 | /* route incoming audio samples to DAC */ | ||
49 | IIS2CONFIG = (IIS2CONFIG & ~(7 << 8)) | (txsrc_select[source+1] << 8); | 50 | IIS2CONFIG = (IIS2CONFIG & ~(7 << 8)) | (txsrc_select[source+1] << 8); |
50 | 51 | ||
51 | restore_irq(level); | 52 | restore_irq(level); |
@@ -73,8 +74,8 @@ void audio_input_mux(int source, unsigned flags) | |||
73 | break; | 74 | break; |
74 | 75 | ||
75 | case AUDIO_SRC_MIC: | 76 | case AUDIO_SRC_MIC: |
76 | case AUDIO_SRC_LINEIN: | 77 | case AUDIO_SRC_LINEIN: |
77 | /* recording only */ | 78 | /* recording only */ |
78 | if (source != last_source) | 79 | if (source != last_source) |
79 | { | 80 | { |
80 | audiohw_set_recsrc(source,true); | 81 | audiohw_set_recsrc(source,true); |
@@ -89,10 +90,10 @@ void audio_input_mux(int source, unsigned flags) | |||
89 | 90 | ||
90 | last_recording = recording; | 91 | last_recording = recording; |
91 | 92 | ||
93 | audiohw_set_recsrc(source,recording); | ||
92 | /* Int. when 6 samples in FIFO, PDIR2 src = iis1RcvData */ | 94 | /* Int. when 6 samples in FIFO, PDIR2 src = iis1RcvData */ |
93 | coldfire_set_dataincontrol(recording ? | 95 | coldfire_set_dataincontrol(recording ? |
94 | ((3 << 14) | (4 << 3)) : 0); | 96 | ((3 << 14) | (4 << 3)) : 0); |
95 | audiohw_set_recsrc(source, recording); | ||
96 | break; | 97 | break; |
97 | } | 98 | } |
98 | 99 | ||
diff --git a/firmware/target/coldfire/pcm-coldfire.c b/firmware/target/coldfire/pcm-coldfire.c index 06f17d1170..fa320dff3f 100644 --- a/firmware/target/coldfire/pcm-coldfire.c +++ b/firmware/target/coldfire/pcm-coldfire.c | |||
@@ -84,13 +84,18 @@ static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] = | |||
84 | #endif | 84 | #endif |
85 | 85 | ||
86 | #if CONFIG_CPU == MCF5249 && defined(HAVE_WM8750) | 86 | #if CONFIG_CPU == MCF5249 && defined(HAVE_WM8750) |
87 | /* We run codec in master mode. | ||
88 | * Codec can reconstruct all frequencies | ||
89 | * from single 11.2896 MHz master clock | ||
90 | */ | ||
87 | static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] = | 91 | static const unsigned char pcm_freq_parms[HW_NUM_FREQ][2] = |
88 | { | 92 | { |
89 | [HW_FREQ_88] = { 0x0c, 0x01 }, | 93 | [HW_FREQ_88] = { 0x00, 0x01 }, |
90 | [HW_FREQ_44] = { 0x06, 0x01 }, | 94 | [HW_FREQ_44] = { 0x00, 0x01 }, |
91 | [HW_FREQ_22] = { 0x04, 0x01 }, | 95 | [HW_FREQ_22] = { 0x00, 0x01 }, |
92 | [HW_FREQ_11] = { 0x02, 0x01 }, | 96 | [HW_FREQ_11] = { 0x00, 0x01 }, |
93 | }; | 97 | }; |
98 | |||
94 | #endif | 99 | #endif |
95 | 100 | ||
96 | #if (CONFIG_CPU == MCF5250 || CONFIG_CPU == MCF5249) && defined(HAVE_TLV320) | 101 | #if (CONFIG_CPU == MCF5250 || CONFIG_CPU == MCF5249) && defined(HAVE_TLV320) |