summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRafaël Carré <rafael.carre@gmail.com>2009-07-01 22:41:33 +0000
committerRafaël Carré <rafael.carre@gmail.com>2009-07-01 22:41:33 +0000
commit90d7a8c4fce466ac1710549d3f54469c54fc73f3 (patch)
tree7c66ee87684be6e360affc4d3701972019efb954
parentc0eb9aeb9e89ae33a9f084167147d8eacb9c7c60 (diff)
downloadrockbox-90d7a8c4fce466ac1710549d3f54469c54fc73f3.tar.gz
rockbox-90d7a8c4fce466ac1710549d3f54469c54fc73f3.zip
Ingenic jz4740 SD driver: remove custom list of SD commands
Replace most references to MMC/mmc with SD/sd Remove MMC failover code since MMC cards aren't supported git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21604 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/export/sd.h8
-rw-r--r--firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c787
2 files changed, 366 insertions, 429 deletions
diff --git a/firmware/export/sd.h b/firmware/export/sd.h
index 6c848c34cf..d313a4c2e1 100644
--- a/firmware/export/sd.h
+++ b/firmware/export/sd.h
@@ -70,6 +70,7 @@ long sd_last_disk_activity(void);
70#define SD_SEND_RELATIVE_ADDR 3 70#define SD_SEND_RELATIVE_ADDR 3
71#define SD_SET_DSR 4 71#define SD_SET_DSR 4
72#define SD_SWITCH_FUNC 6 72#define SD_SWITCH_FUNC 6
73#define SD_SET_BUS_WIDTH 6 /* acmd6 */
73#define SD_SELECT_CARD 7 74#define SD_SELECT_CARD 7
74#define SD_DESELECT_CARD 7 75#define SD_DESELECT_CARD 7
75#define SD_SEND_IF_COND 8 76#define SD_SEND_IF_COND 8
@@ -87,10 +88,9 @@ long sd_last_disk_activity(void);
87#define SD_ERASE_WR_BLK_START 32 88#define SD_ERASE_WR_BLK_START 32
88#define SD_ERASE_WR_BLK_END 33 89#define SD_ERASE_WR_BLK_END 33
89#define SD_ERASE 38 90#define SD_ERASE 38
91#define SD_APP_OP_COND 41
92#define SD_LOCK_UNLOCK 42
93#define SD_SEND_SCR 51 /* acmd51 */
90#define SD_APP_CMD 55 94#define SD_APP_CMD 55
91 95
92/* Application Specific commands */
93#define SD_SET_BUS_WIDTH 6
94#define SD_APP_OP_COND 41
95
96#endif 96#endif
diff --git a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c
index d14715c192..d95c88c787 100644
--- a/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c
+++ b/firmware/target/mips/ingenic_jz47xx/ata-sd-jz4740.c
@@ -36,46 +36,46 @@
36static struct wakeup sd_wakeup; 36static struct wakeup sd_wakeup;
37static long last_disk_activity = -1; 37static long last_disk_activity = -1;
38 38
39//#define MMC_DMA_ENABLE 39//#define SD_DMA_ENABLE
40#define MMC_DMA_INTERRUPT 0 40#define SD_DMA_INTERRUPT 0
41 41
42#define DEBUG(x...) logf(x) 42#define DEBUG(x...) logf(x)
43 43
44#define MMC_INSERT_STATUS() __gpio_get_pin(MMC_CD_PIN) 44#define SD_INSERT_STATUS() __gpio_get_pin(MMC_CD_PIN)
45#define MMC_RESET() __msc_reset() 45#define SD_RESET() __msc_reset()
46 46
47#define MMC_IRQ_MASK() \ 47#define SD_IRQ_MASK() \
48do { \ 48do { \
49 REG_MSC_IMASK = 0xffff; \ 49 REG_MSC_IMASK = 0xffff; \
50 REG_MSC_IREG = 0xffff; \ 50 REG_MSC_IREG = 0xffff; \
51} while (0) 51} while (0)
52 52
53/* Error codes */ 53/* Error codes */
54enum mmc_result_t 54enum sd_result_t
55{ 55{
56 MMC_NO_RESPONSE = -1, 56 SD_NO_RESPONSE = -1,
57 MMC_NO_ERROR = 0, 57 SD_NO_ERROR = 0,
58 MMC_ERROR_OUT_OF_RANGE, 58 SD_ERROR_OUT_OF_RANGE,
59 MMC_ERROR_ADDRESS, 59 SD_ERROR_ADDRESS,
60 MMC_ERROR_BLOCK_LEN, 60 SD_ERROR_BLOCK_LEN,
61 MMC_ERROR_ERASE_SEQ, 61 SD_ERROR_ERASE_SEQ,
62 MMC_ERROR_ERASE_PARAM, 62 SD_ERROR_ERASE_PARAM,
63 MMC_ERROR_WP_VIOLATION, 63 SD_ERROR_WP_VIOLATION,
64 MMC_ERROR_CARD_IS_LOCKED, 64 SD_ERROR_CARD_IS_LOCKED,
65 MMC_ERROR_LOCK_UNLOCK_FAILED, 65 SD_ERROR_LOCK_UNLOCK_FAILED,
66 MMC_ERROR_COM_CRC, 66 SD_ERROR_COM_CRC,
67 MMC_ERROR_ILLEGAL_COMMAND, 67 SD_ERROR_ILLEGAL_COMMAND,
68 MMC_ERROR_CARD_ECC_FAILED, 68 SD_ERROR_CARD_ECC_FAILED,
69 MMC_ERROR_CC, 69 SD_ERROR_CC,
70 MMC_ERROR_GENERAL, 70 SD_ERROR_GENERAL,
71 MMC_ERROR_UNDERRUN, 71 SD_ERROR_UNDERRUN,
72 MMC_ERROR_OVERRUN, 72 SD_ERROR_OVERRUN,
73 MMC_ERROR_CID_CSD_OVERWRITE, 73 SD_ERROR_CID_CSD_OVERWRITE,
74 MMC_ERROR_STATE_MISMATCH, 74 SD_ERROR_STATE_MISMATCH,
75 MMC_ERROR_HEADER_MISMATCH, 75 SD_ERROR_HEADER_MISMATCH,
76 MMC_ERROR_TIMEOUT, 76 SD_ERROR_TIMEOUT,
77 MMC_ERROR_CRC, 77 SD_ERROR_CRC,
78 MMC_ERROR_DRIVER_FAILURE, 78 SD_ERROR_DRIVER_FAILURE,
79}; 79};
80 80
81/* Standard MMC/SD clock speeds */ 81/* Standard MMC/SD clock speeds */
@@ -84,68 +84,26 @@ enum mmc_result_t
84#define SD_CLOCK_FAST 24000000 /* 24 MHz for SD Cards */ 84#define SD_CLOCK_FAST 24000000 /* 24 MHz for SD Cards */
85#define SD_CLOCK_HIGH 48000000 /* 48 MHz for SD Cards */ 85#define SD_CLOCK_HIGH 48000000 /* 48 MHz for SD Cards */
86 86
87/* Extra MMC commands for state control */ 87/* Extra commands for state control */
88/* Use negative numbers to disambiguate */ 88/* Use negative numbers to disambiguate */
89#define MMC_CIM_RESET -1 89#define SD_CIM_RESET -1
90 90
91/* Standard MMC commands (3.1) type argument response */ 91/* Proprietary commands, illegal/reserved according to SD Specification 2.00 */
92 /* class 1 */ 92 /* class 1 */
93#define MMC_GO_IDLE_STATE 0 /* bc */ 93#define SD_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */
94#define MMC_SEND_OP_COND 1 /* bcr [31:0] OCR R3 */ 94
95#define MMC_ALL_SEND_CID 2 /* bcr R2 */ 95 /* class 3 */
96#define MMC_SET_RELATIVE_ADDR 3 /* ac [31:16] RCA R1 */ 96#define SD_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
97#define MMC_SET_DSR 4 /* bc [31:16] RCA */ 97
98#define MMC_SELECT_CARD 7 /* ac [31:16] RCA R1 */ 98 /* class 4 */
99#define MMC_SEND_CSD 9 /* ac [31:16] RCA R2 */ 99#define SD_PROGRAM_CID 26 /* adtc R1 */
100#define MMC_SEND_CID 10 /* ac [31:16] RCA R2 */ 100#define SD_PROGRAM_CSD 27 /* adtc R1 */
101#define MMC_READ_DAT_UNTIL_STOP 11 /* adtc [31:0] dadr R1 */ 101
102#define MMC_STOP_TRANSMISSION 12 /* ac R1b */ 102 /* class 9 */
103#define MMC_SEND_STATUS 13 /* ac [31:16] RCA R1 */ 103#define SD_GO_IRQ_STATE 40 /* bcr R5 */
104#define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
105
106 /* class 2 */
107#define MMC_SET_BLOCKLEN 16 /* ac [31:0] block len R1 */
108#define MMC_READ_SINGLE_BLOCK 17 /* adtc [31:0] data addr R1 */
109#define MMC_READ_MULTIPLE_BLOCK 18 /* adtc [31:0] data addr R1 */
110
111 /* class 3 */
112#define MMC_WRITE_DAT_UNTIL_STOP 20 /* adtc [31:0] data addr R1 */
113
114 /* class 4 */
115#define MMC_SET_BLOCK_COUNT 23 /* adtc [31:0] data addr R1 */
116#define MMC_WRITE_BLOCK 24 /* adtc [31:0] data addr R1 */
117#define MMC_WRITE_MULTIPLE_BLOCK 25 /* adtc R1 */
118#define MMC_PROGRAM_CID 26 /* adtc R1 */
119#define MMC_PROGRAM_CSD 27 /* adtc R1 */
120
121 /* class 6 */
122#define MMC_SET_WRITE_PROT 28 /* ac [31:0] data addr R1b */
123#define MMC_CLR_WRITE_PROT 29 /* ac [31:0] data addr R1b */
124#define MMC_SEND_WRITE_PROT 30 /* adtc [31:0] wpdata addr R1 */
125
126 /* class 5 */
127#define MMC_ERASE_GROUP_START 35 /* ac [31:0] data addr R1 */
128#define MMC_ERASE_GROUP_END 36 /* ac [31:0] data addr R1 */
129#define MMC_ERASE 37 /* ac R1b */
130
131 /* class 9 */
132#define MMC_FAST_IO 39 /* ac <Complex> R4 */
133#define MMC_GO_IRQ_STATE 40 /* bcr R5 */
134
135 /* class 7 */
136#define MMC_LOCK_UNLOCK 42 /* adtc R1b */
137
138 /* class 8 */
139#define MMC_APP_CMD 55 /* ac [31:16] RCA R1 */
140#define MMC_GEN_CMD 56 /* adtc [0] RD/WR R1b */
141
142 /* SD class */
143#define SD_SEND_OP_COND 41 /* bcr [31:0] OCR R3 */
144#define SET_BUS_WIDTH 6 /* ac [1:0] bus width R1 */
145#define SEND_SCR 51 /* adtc [31:0] staff R1 */
146 104
147/* Don't change the order of these; they are used in dispatch tables */ 105/* Don't change the order of these; they are used in dispatch tables */
148enum mmc_rsp_t 106enum sd_rsp_t
149{ 107{
150 RESPONSE_NONE = 0, 108 RESPONSE_NONE = 0,
151 RESPONSE_R1 = 1, 109 RESPONSE_R1 = 1,
@@ -200,13 +158,13 @@ enum mmc_rsp_t
200#define R1_APP_CMD (1 << 7) /* sr, c */ 158#define R1_APP_CMD (1 << 7) /* sr, c */
201 159
202/* These are unpacked versions of the actual responses */ 160/* These are unpacked versions of the actual responses */
203struct mmc_response_r1 161struct sd_response_r1
204{ 162{
205 unsigned char cmd; 163 unsigned char cmd;
206 unsigned int status; 164 unsigned int status;
207}; 165};
208 166
209struct mmc_cid 167struct sd_cid
210{ 168{
211 unsigned char mid; 169 unsigned char mid;
212 unsigned short oid; 170 unsigned short oid;
@@ -216,7 +174,7 @@ struct mmc_cid
216 unsigned char mdt; 174 unsigned char mdt;
217}; 175};
218 176
219struct mmc_csd 177struct sd_csd
220{ 178{
221 unsigned char csd_structure; 179 unsigned char csd_structure;
222 unsigned char spec_vers; 180 unsigned char spec_vers;
@@ -262,36 +220,36 @@ struct mmc_csd
262 unsigned char ecc; 220 unsigned char ecc;
263}; 221};
264 222
265struct mmc_response_r3 223struct sd_response_r3
266{ 224{
267 unsigned int ocr; 225 unsigned int ocr;
268}; 226};
269 227
270#define MMC_VDD_145_150 0x00000001 /* VDD voltage 1.45 - 1.50 */ 228#define SD_VDD_145_150 0x00000001 /* VDD voltage 1.45 - 1.50 */
271#define MMC_VDD_150_155 0x00000002 /* VDD voltage 1.50 - 1.55 */ 229#define SD_VDD_150_155 0x00000002 /* VDD voltage 1.50 - 1.55 */
272#define MMC_VDD_155_160 0x00000004 /* VDD voltage 1.55 - 1.60 */ 230#define SD_VDD_155_160 0x00000004 /* VDD voltage 1.55 - 1.60 */
273#define MMC_VDD_160_165 0x00000008 /* VDD voltage 1.60 - 1.65 */ 231#define SD_VDD_160_165 0x00000008 /* VDD voltage 1.60 - 1.65 */
274#define MMC_VDD_165_170 0x00000010 /* VDD voltage 1.65 - 1.70 */ 232#define SD_VDD_165_170 0x00000010 /* VDD voltage 1.65 - 1.70 */
275#define MMC_VDD_17_18 0x00000020 /* VDD voltage 1.7 - 1.8 */ 233#define SD_VDD_17_18 0x00000020 /* VDD voltage 1.7 - 1.8 */
276#define MMC_VDD_18_19 0x00000040 /* VDD voltage 1.8 - 1.9 */ 234#define SD_VDD_18_19 0x00000040 /* VDD voltage 1.8 - 1.9 */
277#define MMC_VDD_19_20 0x00000080 /* VDD voltage 1.9 - 2.0 */ 235#define SD_VDD_19_20 0x00000080 /* VDD voltage 1.9 - 2.0 */
278#define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */ 236#define SD_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
279#define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */ 237#define SD_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
280#define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */ 238#define SD_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
281#define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */ 239#define SD_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
282#define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */ 240#define SD_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
283#define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */ 241#define SD_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
284#define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */ 242#define SD_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
285#define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */ 243#define SD_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
286#define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */ 244#define SD_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
287#define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */ 245#define SD_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
288#define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */ 246#define SD_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
289#define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */ 247#define SD_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
290#define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */ 248#define SD_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
291#define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */ 249#define SD_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
292#define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */ 250#define SD_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
293#define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */ 251#define SD_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
294#define MMC_CARD_BUSY 0x80000000 /* Card Power up status bit */ 252#define SD_CARD_BUSY 0x80000000 /* Card Power up status bit */
295 253
296 254
297/* CSD field definitions */ 255/* CSD field definitions */
@@ -304,23 +262,23 @@ struct mmc_response_r3
304#define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */ 262#define CSD_SPEC_VER_2 2 /* Implements system specification 2.0 - 2.2 */
305#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 */ 263#define CSD_SPEC_VER_3 3 /* Implements system specification 3.1 */
306 264
307/* the information structure of MMC/SD Card */ 265/* the information structure of SD Card */
308typedef struct MMC_INFO 266typedef struct SD_INFO
309{ 267{
310 int rca; /* RCA */ 268 int rca; /* RCA */
311 struct mmc_cid cid; 269 struct sd_cid cid;
312 struct mmc_csd csd; 270 struct sd_csd csd;
313 unsigned int block_num; 271 unsigned int block_num;
314 unsigned int block_len; 272 unsigned int block_len;
315 unsigned int ocr; 273 unsigned int ocr;
316} mmc_info; 274} sd_info;
317 275
318struct mmc_request 276struct sd_request
319{ 277{
320 int index; /* Slot index - used for CS lines */ 278 int index; /* Slot index - used for CS lines */
321 int cmd; /* Command to send */ 279 int cmd; /* Command to send */
322 unsigned int arg; /* Argument to send */ 280 unsigned int arg; /* Argument to send */
323 enum mmc_rsp_t rtype; /* Response type expected */ 281 enum sd_rsp_t rtype; /* Response type expected */
324 282
325 /* Data transfer (these may be modified at the low level) */ 283 /* Data transfer (these may be modified at the low level) */
326 unsigned short nob; /* Number of blocks to transfer*/ 284 unsigned short nob; /* Number of blocks to transfer*/
@@ -330,23 +288,23 @@ struct mmc_request
330 288
331 /* Results */ 289 /* Results */
332 unsigned char response[18]; /* Buffer to store response - CRC is optional */ 290 unsigned char response[18]; /* Buffer to store response - CRC is optional */
333 enum mmc_result_t result; 291 enum sd_result_t result;
334}; 292};
335 293
336#define MMC_OCR_ARG 0x00ff8000 /* Argument of OCR */ 294#define SD_OCR_ARG 0x00ff8000 /* Argument of OCR */
337 295
338/*********************************************************************** 296/***********************************************************************
339 * MMC Events 297 * SD Events
340 */ 298 */
341#define MMC_EVENT_NONE 0x00 /* No events */ 299#define SD_EVENT_NONE 0x00 /* No events */
342#define MMC_EVENT_RX_DATA_DONE 0x01 /* Rx data done */ 300#define SD_EVENT_RX_DATA_DONE 0x01 /* Rx data done */
343#define MMC_EVENT_TX_DATA_DONE 0x02 /* Tx data done */ 301#define SD_EVENT_TX_DATA_DONE 0x02 /* Tx data done */
344#define MMC_EVENT_PROG_DONE 0x04 /* Programming is done */ 302#define SD_EVENT_PROG_DONE 0x04 /* Programming is done */
345 303
346static int use_4bit = 1; /* Use 4-bit data bus */ 304static int use_4bit = 1; /* Use 4-bit data bus */
347static int num_6 = 0; 305static int num_6 = 0;
348static int sd2_0 = 0; 306static int sd2_0 = 0;
349static mmc_info mmcinfo; 307static sd_info sdinfo;
350 308
351/************************************************************************** 309/**************************************************************************
352 * Utility functions 310 * Utility functions
@@ -359,7 +317,7 @@ static mmc_info mmcinfo;
359#define PARSE_U16(_buf,_index) \ 317#define PARSE_U16(_buf,_index) \
360 (((unsigned short)_buf[_index]) << 8) | ((unsigned short)_buf[_index+1]); 318 (((unsigned short)_buf[_index]) << 8) | ((unsigned short)_buf[_index+1]);
361 319
362int mmc_unpack_csd(struct mmc_request *request, struct mmc_csd *csd) 320int sd_unpack_csd(struct sd_request *request, struct sd_csd *csd)
363{ 321{
364 unsigned char *buf = request->response; 322 unsigned char *buf = request->response;
365 int num = 0; 323 int num = 0;
@@ -545,12 +503,12 @@ int mmc_unpack_csd(struct mmc_request *request, struct mmc_csd *csd)
545 } 503 }
546 504
547 if (buf[0] != 0x3f) 505 if (buf[0] != 0x3f)
548 return MMC_ERROR_HEADER_MISMATCH; 506 return SD_ERROR_HEADER_MISMATCH;
549 507
550 return 0; 508 return 0;
551} 509}
552 510
553int mmc_unpack_r1(struct mmc_request *request, struct mmc_response_r1 *r1) 511int sd_unpack_r1(struct sd_request *request, struct sd_response_r1 *r1)
554{ 512{
555 unsigned char *buf = request->response; 513 unsigned char *buf = request->response;
556 514
@@ -560,46 +518,46 @@ int mmc_unpack_r1(struct mmc_request *request, struct mmc_response_r1 *r1)
560 r1->cmd = buf[0]; 518 r1->cmd = buf[0];
561 r1->status = PARSE_U32(buf,1); 519 r1->status = PARSE_U32(buf,1);
562 520
563 DEBUG("mmc_unpack_r1: cmd=%d status=%08x", r1->cmd, r1->status); 521 DEBUG("sd_unpack_r1: cmd=%d status=%08x", r1->cmd, r1->status);
564 522
565 if (R1_STATUS(r1->status)) { 523 if (R1_STATUS(r1->status)) {
566 if (r1->status & R1_OUT_OF_RANGE) return MMC_ERROR_OUT_OF_RANGE; 524 if (r1->status & R1_OUT_OF_RANGE) return SD_ERROR_OUT_OF_RANGE;
567 if (r1->status & R1_ADDRESS_ERROR) return MMC_ERROR_ADDRESS; 525 if (r1->status & R1_ADDRESS_ERROR) return SD_ERROR_ADDRESS;
568 if (r1->status & R1_BLOCK_LEN_ERROR) return MMC_ERROR_BLOCK_LEN; 526 if (r1->status & R1_BLOCK_LEN_ERROR) return SD_ERROR_BLOCK_LEN;
569 if (r1->status & R1_ERASE_SEQ_ERROR) return MMC_ERROR_ERASE_SEQ; 527 if (r1->status & R1_ERASE_SEQ_ERROR) return SD_ERROR_ERASE_SEQ;
570 if (r1->status & R1_ERASE_PARAM) return MMC_ERROR_ERASE_PARAM; 528 if (r1->status & R1_ERASE_PARAM) return SD_ERROR_ERASE_PARAM;
571 if (r1->status & R1_WP_VIOLATION) return MMC_ERROR_WP_VIOLATION; 529 if (r1->status & R1_WP_VIOLATION) return SD_ERROR_WP_VIOLATION;
572 //if (r1->status & R1_CARD_IS_LOCKED) return MMC_ERROR_CARD_IS_LOCKED; 530 //if (r1->status & R1_CARD_IS_LOCKED) return SD_ERROR_CARD_IS_LOCKED;
573 if (r1->status & R1_LOCK_UNLOCK_FAILED) return MMC_ERROR_LOCK_UNLOCK_FAILED; 531 if (r1->status & R1_LOCK_UNLOCK_FAILED) return SD_ERROR_LOCK_UNLOCK_FAILED;
574 if (r1->status & R1_COM_CRC_ERROR) return MMC_ERROR_COM_CRC; 532 if (r1->status & R1_COM_CRC_ERROR) return SD_ERROR_COM_CRC;
575 if (r1->status & R1_ILLEGAL_COMMAND) return MMC_ERROR_ILLEGAL_COMMAND; 533 if (r1->status & R1_ILLEGAL_COMMAND) return SD_ERROR_ILLEGAL_COMMAND;
576 if (r1->status & R1_CARD_ECC_FAILED) return MMC_ERROR_CARD_ECC_FAILED; 534 if (r1->status & R1_CARD_ECC_FAILED) return SD_ERROR_CARD_ECC_FAILED;
577 if (r1->status & R1_CC_ERROR) return MMC_ERROR_CC; 535 if (r1->status & R1_CC_ERROR) return SD_ERROR_CC;
578 if (r1->status & R1_ERROR) return MMC_ERROR_GENERAL; 536 if (r1->status & R1_ERROR) return SD_ERROR_GENERAL;
579 if (r1->status & R1_UNDERRUN) return MMC_ERROR_UNDERRUN; 537 if (r1->status & R1_UNDERRUN) return SD_ERROR_UNDERRUN;
580 if (r1->status & R1_OVERRUN) return MMC_ERROR_OVERRUN; 538 if (r1->status & R1_OVERRUN) return SD_ERROR_OVERRUN;
581 if (r1->status & R1_CID_CSD_OVERWRITE) return MMC_ERROR_CID_CSD_OVERWRITE; 539 if (r1->status & R1_CID_CSD_OVERWRITE) return SD_ERROR_CID_CSD_OVERWRITE;
582 } 540 }
583 541
584 if (buf[0] != request->cmd) 542 if (buf[0] != request->cmd)
585 return MMC_ERROR_HEADER_MISMATCH; 543 return SD_ERROR_HEADER_MISMATCH;
586 544
587 /* This should be last - it's the least dangerous error */ 545 /* This should be last - it's the least dangerous error */
588 546
589 return 0; 547 return 0;
590} 548}
591 549
592int mmc_unpack_scr(struct mmc_request *request, struct mmc_response_r1 *r1, unsigned int *scr) 550int sd_unpack_scr(struct sd_request *request, struct sd_response_r1 *r1, unsigned int *scr)
593{ 551{
594 unsigned char *buf = request->response; 552 unsigned char *buf = request->response;
595 if (request->result) 553 if (request->result)
596 return request->result; 554 return request->result;
597 555
598 *scr = PARSE_U32(buf, 5); /* Save SCR returned by the SD Card */ 556 *scr = PARSE_U32(buf, 5); /* Save SCR returned by the SD Card */
599 return mmc_unpack_r1(request, r1); 557 return sd_unpack_r1(request, r1);
600} 558}
601 559
602int mmc_unpack_r6(struct mmc_request *request, struct mmc_response_r1 *r1, int *rca) 560int sd_unpack_r6(struct sd_request *request, struct sd_response_r1 *r1, int *rca)
603{ 561{
604 unsigned char *buf = request->response; 562 unsigned char *buf = request->response;
605 563
@@ -610,10 +568,10 @@ int mmc_unpack_r6(struct mmc_request *request, struct mmc_response_r1 *r1, int *
610 *(buf+1) = 0; 568 *(buf+1) = 0;
611 *(buf+2) = 0; 569 *(buf+2) = 0;
612 570
613 return mmc_unpack_r1(request, r1); 571 return sd_unpack_r1(request, r1);
614} 572}
615 573
616int mmc_unpack_cid(struct mmc_request *request, struct mmc_cid *cid) 574int sd_unpack_cid(struct sd_request *request, struct sd_cid *cid)
617{ 575{
618 unsigned char *buf = request->response; 576 unsigned char *buf = request->response;
619 int i; 577 int i;
@@ -629,30 +587,30 @@ int mmc_unpack_cid(struct mmc_request *request, struct mmc_cid *cid)
629 cid->psn = PARSE_U32(buf,11); 587 cid->psn = PARSE_U32(buf,11);
630 cid->mdt = buf[15]; 588 cid->mdt = buf[15];
631 589
632 DEBUG("mmc_unpack_cid: mid=%d oid=%d pnm=%s prv=%d.%d psn=%08x mdt=%d/%d", 590 DEBUG("sd_unpack_cid: mid=%d oid=%d pnm=%s prv=%d.%d psn=%08x mdt=%d/%d",
633 cid->mid, cid->oid, cid->pnm, 591 cid->mid, cid->oid, cid->pnm,
634 (cid->prv>>4), (cid->prv&0xf), 592 (cid->prv>>4), (cid->prv&0xf),
635 cid->psn, (cid->mdt>>4), (cid->mdt&0xf)+1997); 593 cid->psn, (cid->mdt>>4), (cid->mdt&0xf)+1997);
636 594
637 if (buf[0] != 0x3f) return MMC_ERROR_HEADER_MISMATCH; 595 if (buf[0] != 0x3f) return SD_ERROR_HEADER_MISMATCH;
638 return 0; 596 return 0;
639} 597}
640 598
641int mmc_unpack_r3(struct mmc_request *request, struct mmc_response_r3 *r3) 599int sd_unpack_r3(struct sd_request *request, struct sd_response_r3 *r3)
642{ 600{
643 unsigned char *buf = request->response; 601 unsigned char *buf = request->response;
644 602
645 if (request->result) return request->result; 603 if (request->result) return request->result;
646 604
647 r3->ocr = PARSE_U32(buf,1); 605 r3->ocr = PARSE_U32(buf,1);
648 DEBUG("mmc_unpack_r3: ocr=%08x", r3->ocr); 606 DEBUG("sd_unpack_r3: ocr=%08x", r3->ocr);
649 607
650 if (buf[0] != 0x3f) return MMC_ERROR_HEADER_MISMATCH; 608 if (buf[0] != 0x3f) return SD_ERROR_HEADER_MISMATCH;
651 return 0; 609 return 0;
652} 610}
653 611
654/* Stop the MMC clock and wait while it happens */ 612/* Stop the MMC clock and wait while it happens */
655static inline int jz_mmc_stop_clock(void) 613static inline int jz_sd_stop_clock(void)
656{ 614{
657 register int timeout = 1000; 615 register int timeout = 1000;
658 616
@@ -665,22 +623,22 @@ static inline int jz_mmc_stop_clock(void)
665 if (timeout == 0) 623 if (timeout == 0)
666 { 624 {
667 DEBUG("Timeout on stop clock waiting"); 625 DEBUG("Timeout on stop clock waiting");
668 return MMC_ERROR_TIMEOUT; 626 return SD_ERROR_TIMEOUT;
669 } 627 }
670 udelay(1); 628 udelay(1);
671 } 629 }
672 //DEBUG("clock off time is %d microsec", timeout); 630 //DEBUG("clock off time is %d microsec", timeout);
673 return MMC_NO_ERROR; 631 return SD_NO_ERROR;
674} 632}
675 633
676/* Start the MMC clock and operation */ 634/* Start the MMC clock and operation */
677static inline int jz_mmc_start_clock(void) 635static inline int jz_sd_start_clock(void)
678{ 636{
679 REG_MSC_STRPCL = MSC_STRPCL_CLOCK_CONTROL_START | MSC_STRPCL_START_OP; 637 REG_MSC_STRPCL = MSC_STRPCL_CLOCK_CONTROL_START | MSC_STRPCL_START_OP;
680 return MMC_NO_ERROR; 638 return SD_NO_ERROR;
681} 639}
682 640
683static int jz_mmc_check_status(struct mmc_request *request) 641static int jz_sd_check_status(struct sd_request *request)
684{ 642{
685 (void)request; 643 (void)request;
686 unsigned int status = REG_MSC_STAT; 644 unsigned int status = REG_MSC_STAT;
@@ -688,9 +646,9 @@ static int jz_mmc_check_status(struct mmc_request *request)
688 /* Checking for response or data timeout */ 646 /* Checking for response or data timeout */
689 if (status & (MSC_STAT_TIME_OUT_RES | MSC_STAT_TIME_OUT_READ)) 647 if (status & (MSC_STAT_TIME_OUT_RES | MSC_STAT_TIME_OUT_READ))
690 { 648 {
691 DEBUG("MMC/SD timeout, MSC_STAT 0x%x CMD %d", status, 649 DEBUG("SD timeout, MSC_STAT 0x%x CMD %d", status,
692 request->cmd); 650 request->cmd);
693 return MMC_ERROR_TIMEOUT; 651 return SD_ERROR_TIMEOUT;
694 } 652 }
695 653
696 /* Checking for CRC error */ 654 /* Checking for CRC error */
@@ -698,8 +656,8 @@ static int jz_mmc_check_status(struct mmc_request *request)
698 (MSC_STAT_CRC_READ_ERROR | MSC_STAT_CRC_WRITE_ERROR | 656 (MSC_STAT_CRC_READ_ERROR | MSC_STAT_CRC_WRITE_ERROR |
699 MSC_STAT_CRC_RES_ERR)) 657 MSC_STAT_CRC_RES_ERR))
700 { 658 {
701 DEBUG("MMC/SD CRC error, MSC_STAT 0x%x", status); 659 DEBUG("SD CRC error, MSC_STAT 0x%x", status);
702 return MMC_ERROR_CRC; 660 return SD_ERROR_CRC;
703 661
704 } 662 }
705 663
@@ -707,15 +665,15 @@ static int jz_mmc_check_status(struct mmc_request *request)
707 /* Checking for FIFO empty */ 665 /* Checking for FIFO empty */
708 /*if(status & MSC_STAT_DATA_FIFO_EMPTY && request->rtype != RESPONSE_NONE) 666 /*if(status & MSC_STAT_DATA_FIFO_EMPTY && request->rtype != RESPONSE_NONE)
709 { 667 {
710 DEBUG("MMC/SD FIFO empty, MSC_STAT 0x%x", status); 668 DEBUG("SD FIFO empty, MSC_STAT 0x%x", status);
711 return MMC_ERROR_UNDERRUN; 669 return SD_ERROR_UNDERRUN;
712 }*/ 670 }*/
713 671
714 return MMC_NO_ERROR; 672 return SD_NO_ERROR;
715} 673}
716 674
717/* Obtain response to the command and store it to response buffer */ 675/* Obtain response to the command and store it to response buffer */
718static void jz_mmc_get_response(struct mmc_request *request) 676static void jz_sd_get_response(struct sd_request *request)
719{ 677{
720 int i; 678 int i;
721 unsigned char *buf; 679 unsigned char *buf;
@@ -724,7 +682,7 @@ static void jz_mmc_get_response(struct mmc_request *request)
724 DEBUG("fetch response for request %d, cmd %d", request->rtype, 682 DEBUG("fetch response for request %d, cmd %d", request->rtype,
725 request->cmd); 683 request->cmd);
726 buf = request->response; 684 buf = request->response;
727 request->result = MMC_NO_ERROR; 685 request->result = SD_NO_ERROR;
728 686
729 switch (request->rtype) 687 switch (request->rtype)
730 { 688 {
@@ -773,8 +731,8 @@ static void jz_mmc_get_response(struct mmc_request *request)
773 } 731 }
774} 732}
775 733
776#ifdef MMC_DMA_ENABLE 734#ifdef SD_DMA_ENABLE
777static int jz_mmc_receive_data_dma(struct mmc_request *req) 735static int jz_sd_receive_data_dma(struct sd_request *req)
778{ 736{
779 int ch = RX_DMA_CHANNEL; 737 int ch = RX_DMA_CHANNEL;
780 unsigned int size = req->block_len * req->nob; 738 unsigned int size = req->block_len * req->nob;
@@ -788,12 +746,12 @@ static int jz_mmc_receive_data_dma(struct mmc_request *req)
788 REG_DMAC_DTCR(ch) = (size + 3) / 4; /* DMA transfer count */ 746 REG_DMAC_DTCR(ch) = (size + 3) / 4; /* DMA transfer count */
789 REG_DMAC_DRSR(ch) = DMAC_DRSR_RS_MSCIN; /* DMA request type */ 747 REG_DMAC_DRSR(ch) = DMAC_DRSR_RS_MSCIN; /* DMA request type */
790 748
791#if MMC_DMA_INTERRUPT 749#if SD_DMA_INTERRUPT
792 REG_DMAC_DCMD(ch) = 750 REG_DMAC_DCMD(ch) =
793 DMAC_DCMD_DAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | 751 DMAC_DCMD_DAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 |
794 DMAC_DCMD_DS_32BIT | DMAC_DCMD_TIE; 752 DMAC_DCMD_DS_32BIT | DMAC_DCMD_TIE;
795 REG_DMAC_DCCSR(ch) = DMAC_DCCSR_EN | DMAC_DCCSR_NDES; 753 REG_DMAC_DCCSR(ch) = DMAC_DCCSR_EN | DMAC_DCCSR_NDES;
796 OSSemPend(mmc_dma_rx_sem, 100, &err); 754 OSSemPend(sd_dma_rx_sem, 100, &err);
797#else 755#else
798 REG_DMAC_DCMD(ch) = 756 REG_DMAC_DCMD(ch) =
799 DMAC_DCMD_DAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | 757 DMAC_DCMD_DAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 |
@@ -803,14 +761,14 @@ static int jz_mmc_receive_data_dma(struct mmc_request *req)
803#endif 761#endif
804/* clear status and disable channel */ 762/* clear status and disable channel */
805 REG_DMAC_DCCSR(ch) = 0; 763 REG_DMAC_DCCSR(ch) = 0;
806#if MMC_DMA_INTERRUPT 764#if SD_DMA_INTERRUPT
807 return (err == OS_NO_ERR); 765 return (err == OS_NO_ERR);
808#else 766#else
809 return 0; 767 return 0;
810#endif 768#endif
811} 769}
812 770
813static int jz_mmc_transmit_data_dma(struct mmc_request *req) 771static int jz_sd_transmit_data_dma(struct sd_request *req)
814{ 772{
815 int ch = TX_DMA_CHANNEL; 773 int ch = TX_DMA_CHANNEL;
816 unsigned int size = req->block_len * req->nob; 774 unsigned int size = req->block_len * req->nob;
@@ -824,12 +782,12 @@ static int jz_mmc_transmit_data_dma(struct mmc_request *req)
824 REG_DMAC_DTCR(ch) = (size + 3) / 4; /* DMA transfer count */ 782 REG_DMAC_DTCR(ch) = (size + 3) / 4; /* DMA transfer count */
825 REG_DMAC_DRSR(ch) = DMAC_DRSR_RS_MSCOUT; /* DMA request type */ 783 REG_DMAC_DRSR(ch) = DMAC_DRSR_RS_MSCOUT; /* DMA request type */
826 784
827#if MMC_DMA_INTERRUPT 785#if SD_DMA_INTERRUPT
828 REG_DMAC_DCMD(ch) = 786 REG_DMAC_DCMD(ch) =
829 DMAC_DCMD_SAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | 787 DMAC_DCMD_SAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 |
830 DMAC_DCMD_DS_32BIT | DMAC_DCMD_TIE; 788 DMAC_DCMD_DS_32BIT | DMAC_DCMD_TIE;
831 REG_DMAC_DCCSR(ch) = DMAC_DCCSR_EN | DMAC_DCCSR_NDES; 789 REG_DMAC_DCCSR(ch) = DMAC_DCCSR_EN | DMAC_DCCSR_NDES;
832 OSSemPend(mmc_dma_tx_sem, 100, &err); 790 OSSemPend(sd_dma_tx_sem, 100, &err);
833#else 791#else
834 REG_DMAC_DCMD(ch) = 792 REG_DMAC_DCMD(ch) =
835 DMAC_DCMD_SAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 | 793 DMAC_DCMD_SAI | DMAC_DCMD_SWDH_32 | DMAC_DCMD_DWDH_32 |
@@ -840,16 +798,16 @@ static int jz_mmc_transmit_data_dma(struct mmc_request *req)
840#endif 798#endif
841 /* clear status and disable channel */ 799 /* clear status and disable channel */
842 REG_DMAC_DCCSR(ch) = 0; 800 REG_DMAC_DCCSR(ch) = 0;
843#if MMC_DMA_INTERRUPT 801#if SD_DMA_INTERRUPT
844 return (err == OS_NO_ERR); 802 return (err == OS_NO_ERR);
845#else 803#else
846 return 0; 804 return 0;
847#endif 805#endif
848} 806}
849 807
850#endif /* MMC_DMA_ENABLE */ 808#endif /* SD_DMA_ENABLE */
851 809
852static int jz_mmc_receive_data(struct mmc_request *req) 810static int jz_sd_receive_data(struct sd_request *req)
853{ 811{
854 unsigned int nob = req->nob; 812 unsigned int nob = req->nob;
855 unsigned int wblocklen = (unsigned int) (req->block_len + 3) >> 2; /* length in word */ 813 unsigned int wblocklen = (unsigned int) (req->block_len + 3) >> 2; /* length in word */
@@ -868,9 +826,9 @@ static int jz_mmc_receive_data(struct mmc_request *req)
868 stat = REG_MSC_STAT; 826 stat = REG_MSC_STAT;
869 827
870 if (stat & MSC_STAT_TIME_OUT_READ) 828 if (stat & MSC_STAT_TIME_OUT_READ)
871 return MMC_ERROR_TIMEOUT; 829 return SD_ERROR_TIMEOUT;
872 else if (stat & MSC_STAT_CRC_READ_ERROR) 830 else if (stat & MSC_STAT_CRC_READ_ERROR)
873 return MMC_ERROR_CRC; 831 return SD_ERROR_CRC;
874 else if (!(stat & MSC_STAT_DATA_FIFO_EMPTY) 832 else if (!(stat & MSC_STAT_DATA_FIFO_EMPTY)
875 || (stat & MSC_STAT_DATA_FIFO_AFULL)) { 833 || (stat & MSC_STAT_DATA_FIFO_AFULL)) {
876 /* Ready to read data */ 834 /* Ready to read data */
@@ -881,7 +839,7 @@ static int jz_mmc_receive_data(struct mmc_request *req)
881 } 839 }
882 840
883 if (!timeout) 841 if (!timeout)
884 return MMC_ERROR_TIMEOUT; 842 return SD_ERROR_TIMEOUT;
885 843
886 /* Read data from RXFIFO. It could be FULL or PARTIAL FULL */ 844 /* Read data from RXFIFO. It could be FULL or PARTIAL FULL */
887 DEBUG("Receive Data = %d", wblocklen); 845 DEBUG("Receive Data = %d", wblocklen);
@@ -905,10 +863,10 @@ static int jz_mmc_receive_data(struct mmc_request *req)
905 } 863 }
906 } 864 }
907 865
908 return MMC_NO_ERROR; 866 return SD_NO_ERROR;
909} 867}
910 868
911static int jz_mmc_transmit_data(struct mmc_request *req) 869static int jz_sd_transmit_data(struct sd_request *req)
912{ 870{
913 unsigned int nob = req->nob; 871 unsigned int nob = req->nob;
914 unsigned int wblocklen = (unsigned int) (req->block_len + 3) >> 2; /* length in word */ 872 unsigned int wblocklen = (unsigned int) (req->block_len + 3) >> 2; /* length in word */
@@ -929,7 +887,7 @@ static int jz_mmc_transmit_data(struct mmc_request *req)
929 if (stat & 887 if (stat &
930 (MSC_STAT_CRC_WRITE_ERROR | 888 (MSC_STAT_CRC_WRITE_ERROR |
931 MSC_STAT_CRC_WRITE_ERROR_NOSTS)) 889 MSC_STAT_CRC_WRITE_ERROR_NOSTS))
932 return MMC_ERROR_CRC; 890 return SD_ERROR_CRC;
933 else if (!(stat & MSC_STAT_DATA_FIFO_FULL)) 891 else if (!(stat & MSC_STAT_DATA_FIFO_FULL))
934 { 892 {
935 /* Ready to write data */ 893 /* Ready to write data */
@@ -940,7 +898,7 @@ static int jz_mmc_transmit_data(struct mmc_request *req)
940 } 898 }
941 899
942 if (!timeout) 900 if (!timeout)
943 return MMC_ERROR_TIMEOUT; 901 return SD_ERROR_TIMEOUT;
944 902
945 /* Write data to TXFIFO */ 903 /* Write data to TXFIFO */
946 cnt = wblocklen; 904 cnt = wblocklen;
@@ -963,10 +921,10 @@ static int jz_mmc_transmit_data(struct mmc_request *req)
963 } 921 }
964 } 922 }
965 923
966 return MMC_NO_ERROR; 924 return SD_NO_ERROR;
967} 925}
968 926
969static inline unsigned int jz_mmc_calc_clkrt(int is_sd, unsigned int rate) 927static inline unsigned int jz_sd_calc_clkrt(int is_sd, unsigned int rate)
970{ 928{
971 unsigned int clkrt; 929 unsigned int clkrt;
972 unsigned int clk_src = is_sd ? (sd2_0 ? 48000000 : 24000000) : 20000000; 930 unsigned int clk_src = is_sd ? (sd2_0 ? 48000000 : 24000000) : 20000000;
@@ -981,26 +939,26 @@ static inline unsigned int jz_mmc_calc_clkrt(int is_sd, unsigned int rate)
981} 939}
982 940
983/* Set the MMC clock frequency */ 941/* Set the MMC clock frequency */
984static void jz_mmc_set_clock(int sd, unsigned int rate) 942static void jz_sd_set_clock(int sd, unsigned int rate)
985{ 943{
986 int clkrt = 0; 944 int clkrt = 0;
987 945
988 sd = sd ? 1 : 0; 946 sd = sd ? 1 : 0;
989 947
990 jz_mmc_stop_clock(); 948 jz_sd_stop_clock();
991 949
992 if (sd2_0) 950 if (sd2_0)
993 { 951 {
994 __cpm_select_msc_hs_clk(sd); /* select clock source from CPM */ 952 __cpm_select_msc_hs_clk(sd); /* select clock source from CPM */
995 REG_CPM_CPCCR |= CPM_CPCCR_CE; 953 REG_CPM_CPCCR |= CPM_CPCCR_CE;
996 clkrt = jz_mmc_calc_clkrt(sd, rate); 954 clkrt = jz_sd_calc_clkrt(sd, rate);
997 REG_MSC_CLKRT = clkrt; 955 REG_MSC_CLKRT = clkrt;
998 } 956 }
999 else 957 else
1000 { 958 {
1001 __cpm_select_msc_clk(sd); /* select clock source from CPM */ 959 __cpm_select_msc_clk(sd); /* select clock source from CPM */
1002 REG_CPM_CPCCR |= CPM_CPCCR_CE; 960 REG_CPM_CPCCR |= CPM_CPCCR_CE;
1003 clkrt = jz_mmc_calc_clkrt(sd, rate); 961 clkrt = jz_sd_calc_clkrt(sd, rate);
1004 REG_MSC_CLKRT = clkrt; 962 REG_MSC_CLKRT = clkrt;
1005 } 963 }
1006 964
@@ -1008,33 +966,33 @@ static void jz_mmc_set_clock(int sd, unsigned int rate)
1008} 966}
1009 967
1010/******************************************************************************************************************** 968/********************************************************************************************************************
1011** Name: int jz_mmc_exec_cmd() 969** Name: int jz_sd_exec_cmd()
1012** Function: send command to the card, and get a response 970** Function: send command to the card, and get a response
1013** Input: struct mmc_request *req: MMC/SD request 971** Input: struct sd_request *req: SD request
1014** Output: 0: right >0: error code 972** Output: 0: right >0: error code
1015********************************************************************************************************************/ 973********************************************************************************************************************/
1016static int jz_mmc_exec_cmd(struct mmc_request *request) 974static int jz_sd_exec_cmd(struct sd_request *request)
1017{ 975{
1018 unsigned int cmdat = 0, events = 0; 976 unsigned int cmdat = 0, events = 0;
1019 int retval, timeout = 0x3fffff; 977 int retval, timeout = 0x3fffff;
1020 978
1021 /* Indicate we have no result yet */ 979 /* Indicate we have no result yet */
1022 request->result = MMC_NO_RESPONSE; 980 request->result = SD_NO_RESPONSE;
1023 981
1024 if (request->cmd == MMC_CIM_RESET) { 982 if (request->cmd == SD_CIM_RESET) {
1025 /* On reset, 1-bit bus width */ 983 /* On reset, 1-bit bus width */
1026 use_4bit = 0; 984 use_4bit = 0;
1027 985
1028 /* Reset MMC/SD controller */ 986 /* Reset MMC/SD controller */
1029 __msc_reset(); 987 __msc_reset();
1030 988
1031 /* On reset, drop MMC clock down */ 989 /* On reset, drop SD clock down */
1032 jz_mmc_set_clock(1, MMC_CLOCK_SLOW); 990 jz_sd_set_clock(1, MMC_CLOCK_SLOW);
1033 991
1034 /* On reset, stop MMC clock */ 992 /* On reset, stop SD clock */
1035 jz_mmc_stop_clock(); 993 jz_sd_stop_clock();
1036 } 994 }
1037 if (request->cmd == SET_BUS_WIDTH) 995 if (request->cmd == SD_SET_BUS_WIDTH)
1038 { 996 {
1039 if (request->arg == 0x2) 997 if (request->arg == 0x2)
1040 { 998 {
@@ -1049,7 +1007,7 @@ static int jz_mmc_exec_cmd(struct mmc_request *request)
1049 } 1007 }
1050 1008
1051 /* stop clock */ 1009 /* stop clock */
1052 jz_mmc_stop_clock(); 1010 jz_sd_stop_clock();
1053 1011
1054 /* mask all interrupts */ 1012 /* mask all interrupts */
1055 //REG_MSC_IMASK = 0xffff; 1013 //REG_MSC_IMASK = 0xffff;
@@ -1064,69 +1022,66 @@ static int jz_mmc_exec_cmd(struct mmc_request *request)
1064 /* Set command type and events */ 1022 /* Set command type and events */
1065 switch (request->cmd) 1023 switch (request->cmd)
1066 { 1024 {
1067 /* MMC core extra command */ 1025 /* SD core extra command */
1068 case MMC_CIM_RESET: 1026 case SD_CIM_RESET:
1069 cmdat |= MSC_CMDAT_INIT; /* Initialization sequence sent prior to command */ 1027 cmdat |= MSC_CMDAT_INIT; /* Initialization sequence sent prior to command */
1070 break; 1028 break;
1071 /* bc - broadcast - no response */ 1029 /* bc - broadcast - no response */
1072 case MMC_GO_IDLE_STATE: 1030 case SD_GO_IDLE_STATE:
1073 case MMC_SET_DSR: 1031 case SD_SET_DSR:
1074 break; 1032 break;
1075 1033
1076 /* bcr - broadcast with response */ 1034 /* bcr - broadcast with response */
1077 case MMC_SEND_OP_COND: 1035 case SD_APP_OP_COND:
1078 case MMC_ALL_SEND_CID: 1036 case SD_ALL_SEND_CID:
1079 1037 case SD_GO_IRQ_STATE:
1080 case MMC_GO_IRQ_STATE:
1081 break; 1038 break;
1082 1039
1083 /* adtc - addressed with data transfer */ 1040 /* adtc - addressed with data transfer */
1084 case MMC_READ_DAT_UNTIL_STOP: 1041 case SD_READ_DAT_UNTIL_STOP:
1085 case MMC_READ_SINGLE_BLOCK: 1042 case SD_READ_SINGLE_BLOCK:
1086 case MMC_READ_MULTIPLE_BLOCK: 1043 case SD_READ_MULTIPLE_BLOCK:
1087 case SEND_SCR: 1044 case SD_SEND_SCR:
1088#if defined(MMC_DMA_ENABLE) 1045#if defined(SD_DMA_ENABLE)
1089 cmdat |= 1046 cmdat |=
1090 MSC_CMDAT_DATA_EN | MSC_CMDAT_READ | MSC_CMDAT_DMA_EN; 1047 MSC_CMDAT_DATA_EN | MSC_CMDAT_READ | MSC_CMDAT_DMA_EN;
1091#else 1048#else
1092 cmdat |= MSC_CMDAT_DATA_EN | MSC_CMDAT_READ; 1049 cmdat |= MSC_CMDAT_DATA_EN | MSC_CMDAT_READ;
1093#endif 1050#endif
1094 events = MMC_EVENT_RX_DATA_DONE; 1051 events = SD_EVENT_RX_DATA_DONE;
1095 break; 1052 break;
1096 1053
1097 case 6: 1054 case 6:
1098 if (num_6 < 2) 1055 if (num_6 < 2)
1099 { 1056 {
1100#if defined(MMC_DMA_ENABLE) 1057#if defined(SD_DMA_ENABLE)
1101 cmdat |= 1058 cmdat |=
1102 MSC_CMDAT_DATA_EN | MSC_CMDAT_READ | 1059 MSC_CMDAT_DATA_EN | MSC_CMDAT_READ |
1103 MSC_CMDAT_DMA_EN; 1060 MSC_CMDAT_DMA_EN;
1104#else 1061#else
1105 cmdat |= MSC_CMDAT_DATA_EN | MSC_CMDAT_READ; 1062 cmdat |= MSC_CMDAT_DATA_EN | MSC_CMDAT_READ;
1106#endif 1063#endif
1107 events = MMC_EVENT_RX_DATA_DONE; 1064 events = SD_EVENT_RX_DATA_DONE;
1108 } 1065 }
1109 break; 1066 break;
1110 1067
1111 case MMC_WRITE_DAT_UNTIL_STOP: 1068 case SD_WRITE_DAT_UNTIL_STOP:
1112 case MMC_WRITE_BLOCK: 1069 case SD_WRITE_BLOCK:
1113 case MMC_WRITE_MULTIPLE_BLOCK: 1070 case SD_WRITE_MULTIPLE_BLOCK:
1114 case MMC_PROGRAM_CID: 1071 case SD_PROGRAM_CID:
1115 case MMC_PROGRAM_CSD: 1072 case SD_PROGRAM_CSD:
1116 case MMC_SEND_WRITE_PROT: 1073 case SD_LOCK_UNLOCK:
1117 case MMC_GEN_CMD: 1074#if defined(SD_DMA_ENABLE)
1118 case MMC_LOCK_UNLOCK:
1119#if defined(MMC_DMA_ENABLE)
1120 cmdat |= 1075 cmdat |=
1121 MSC_CMDAT_DATA_EN | MSC_CMDAT_WRITE | MSC_CMDAT_DMA_EN; 1076 MSC_CMDAT_DATA_EN | MSC_CMDAT_WRITE | MSC_CMDAT_DMA_EN;
1122#else 1077#else
1123 cmdat |= MSC_CMDAT_DATA_EN | MSC_CMDAT_WRITE; 1078 cmdat |= MSC_CMDAT_DATA_EN | MSC_CMDAT_WRITE;
1124#endif 1079#endif
1125 events = MMC_EVENT_TX_DATA_DONE | MMC_EVENT_PROG_DONE; 1080 events = SD_EVENT_TX_DATA_DONE | SD_EVENT_PROG_DONE;
1126 break; 1081 break;
1127 1082
1128 case MMC_STOP_TRANSMISSION: 1083 case SD_STOP_TRANSMISSION:
1129 events = MMC_EVENT_PROG_DONE; 1084 events = SD_EVENT_PROG_DONE;
1130 break; 1085 break;
1131 1086
1132 /* ac - no data transfer */ 1087 /* ac - no data transfer */
@@ -1167,8 +1122,8 @@ static int jz_mmc_exec_cmd(struct mmc_request *request)
1167 } 1122 }
1168 1123
1169 /* Set command index */ 1124 /* Set command index */
1170 if (request->cmd == MMC_CIM_RESET) 1125 if (request->cmd == SD_CIM_RESET)
1171 REG_MSC_CMD = MMC_GO_IDLE_STATE; 1126 REG_MSC_CMD = SD_GO_IDLE_STATE;
1172 else 1127 else
1173 REG_MSC_CMD = request->cmd; 1128 REG_MSC_CMD = request->cmd;
1174 1129
@@ -1176,7 +1131,7 @@ static int jz_mmc_exec_cmd(struct mmc_request *request)
1176 REG_MSC_ARG = request->arg; 1131 REG_MSC_ARG = request->arg;
1177 1132
1178 /* Set block length and nob */ 1133 /* Set block length and nob */
1179 if (request->cmd == SEND_SCR) 1134 if (request->cmd == SD_SEND_SCR)
1180 { /* get SCR from DataFIFO */ 1135 { /* get SCR from DataFIFO */
1181 REG_MSC_BLKLEN = 8; 1136 REG_MSC_BLKLEN = 8;
1182 REG_MSC_NOB = 1; 1137 REG_MSC_NOB = 1;
@@ -1193,8 +1148,8 @@ static int jz_mmc_exec_cmd(struct mmc_request *request)
1193 DEBUG("Send cmd %d cmdat: %x arg: %x resp %d", request->cmd, 1148 DEBUG("Send cmd %d cmdat: %x arg: %x resp %d", request->cmd,
1194 cmdat, request->arg, request->rtype); 1149 cmdat, request->arg, request->rtype);
1195 1150
1196 /* Start MMC/SD clock and send command to card */ 1151 /* Start SD clock and send command to card */
1197 jz_mmc_start_clock(); 1152 jz_sd_start_clock();
1198 1153
1199 /* Wait for command completion */ 1154 /* Wait for command completion */
1200 //__intc_unmask_irq(IRQ_MSC); 1155 //__intc_unmask_irq(IRQ_MSC);
@@ -1203,48 +1158,48 @@ static int jz_mmc_exec_cmd(struct mmc_request *request)
1203 1158
1204 1159
1205 if (timeout == 0) 1160 if (timeout == 0)
1206 return MMC_ERROR_TIMEOUT; 1161 return SD_ERROR_TIMEOUT;
1207 1162
1208 REG_MSC_IREG = MSC_IREG_END_CMD_RES; /* clear flag */ 1163 REG_MSC_IREG = MSC_IREG_END_CMD_RES; /* clear flag */
1209 1164
1210 /* Check for status */ 1165 /* Check for status */
1211 retval = jz_mmc_check_status(request); 1166 retval = jz_sd_check_status(request);
1212 if (retval) 1167 if (retval)
1213 return retval; 1168 return retval;
1214 1169
1215 /* Complete command with no response */ 1170 /* Complete command with no response */
1216 if (request->rtype == RESPONSE_NONE) 1171 if (request->rtype == RESPONSE_NONE)
1217 return MMC_NO_ERROR; 1172 return SD_NO_ERROR;
1218 1173
1219 /* Get response */ 1174 /* Get response */
1220 jz_mmc_get_response(request); 1175 jz_sd_get_response(request);
1221 1176
1222 /* Start data operation */ 1177 /* Start data operation */
1223 if (events & (MMC_EVENT_RX_DATA_DONE | MMC_EVENT_TX_DATA_DONE)) 1178 if (events & (SD_EVENT_RX_DATA_DONE | SD_EVENT_TX_DATA_DONE))
1224 { 1179 {
1225 if (events & MMC_EVENT_RX_DATA_DONE) 1180 if (events & SD_EVENT_RX_DATA_DONE)
1226 { 1181 {
1227 if (request->cmd == SEND_SCR) 1182 if (request->cmd == SD_SEND_SCR)
1228 { 1183 {
1229 /* SD card returns SCR register as data. 1184 /* SD card returns SCR register as data.
1230 MMC core expect it in the response buffer, 1185 SD core expect it in the response buffer,
1231 after normal response. */ 1186 after normal response. */
1232 request->buffer = 1187 request->buffer =
1233 (unsigned char *) ((unsigned int) request->response + 5); 1188 (unsigned char *) ((unsigned int) request->response + 5);
1234 } 1189 }
1235#ifdef MMC_DMA_ENABLE 1190#ifdef SD_DMA_ENABLE
1236 jz_mmc_receive_data_dma(request); 1191 jz_sd_receive_data_dma(request);
1237#else 1192#else
1238 jz_mmc_receive_data(request); 1193 jz_sd_receive_data(request);
1239#endif 1194#endif
1240 } 1195 }
1241 1196
1242 if (events & MMC_EVENT_TX_DATA_DONE) 1197 if (events & SD_EVENT_TX_DATA_DONE)
1243 { 1198 {
1244#ifdef MMC_DMA_ENABLE 1199#ifdef SD_DMA_ENABLE
1245 jz_mmc_transmit_data_dma(request); 1200 jz_sd_transmit_data_dma(request);
1246#else 1201#else
1247 jz_mmc_transmit_data(request); 1202 jz_sd_transmit_data(request);
1248#endif 1203#endif
1249 } 1204 }
1250 //__intc_unmask_irq(IRQ_MSC); 1205 //__intc_unmask_irq(IRQ_MSC);
@@ -1255,7 +1210,7 @@ static int jz_mmc_exec_cmd(struct mmc_request *request)
1255 } 1210 }
1256 1211
1257 /* Wait for Prog Done event */ 1212 /* Wait for Prog Done event */
1258 if (events & MMC_EVENT_PROG_DONE) 1213 if (events & SD_EVENT_PROG_DONE)
1259 { 1214 {
1260 //__intc_unmask_irq(IRQ_MSC); 1215 //__intc_unmask_irq(IRQ_MSC);
1261 //wakeup_wait(&sd_wakeup, 100); 1216 //wakeup_wait(&sd_wakeup, 100);
@@ -1265,22 +1220,22 @@ static int jz_mmc_exec_cmd(struct mmc_request *request)
1265 1220
1266 /* Command completed */ 1221 /* Command completed */
1267 1222
1268 return MMC_NO_ERROR; /* return successfully */ 1223 return SD_NO_ERROR; /* return successfully */
1269} 1224}
1270 1225
1271/******************************************************************************************************************* 1226/*******************************************************************************************************************
1272** Name: int mmc_chkcard() 1227** Name: int sd_chkcard()
1273** Function: check whether card is insert entirely 1228** Function: check whether card is insert entirely
1274** Input: NULL 1229** Input: NULL
1275** Output: 1: insert entirely 0: not insert entirely 1230** Output: 1: insert entirely 0: not insert entirely
1276********************************************************************************************************************/ 1231********************************************************************************************************************/
1277static int jz_mmc_chkcard(void) 1232static int jz_sd_chkcard(void)
1278{ 1233{
1279 return (MMC_INSERT_STATUS() == 0 ? 1 : 0); 1234 return (SD_INSERT_STATUS() == 0 ? 1 : 0);
1280} 1235}
1281 1236
1282#if MMC_DMA_INTERRUPT 1237#if SD_DMA_INTERRUPT
1283static void jz_mmc_tx_handler(unsigned int arg) 1238static void jz_sd_tx_handler(unsigned int arg)
1284{ 1239{
1285 if (__dmac_channel_address_error_detected(arg)) 1240 if (__dmac_channel_address_error_detected(arg))
1286 { 1241 {
@@ -1291,11 +1246,11 @@ static void jz_mmc_tx_handler(unsigned int arg)
1291 { 1246 {
1292 1247
1293 __dmac_channel_clear_transmit_end(arg); 1248 __dmac_channel_clear_transmit_end(arg);
1294 OSSemPost(mmc_dma_tx_sem); 1249 OSSemPost(sd_dma_tx_sem);
1295 } 1250 }
1296} 1251}
1297 1252
1298static void jz_mmc_rx_handler(unsigned int arg) 1253static void jz_sd_rx_handler(unsigned int arg)
1299{ 1254{
1300 if (__dmac_channel_address_error_detected(arg)) 1255 if (__dmac_channel_address_error_detected(arg))
1301 { 1256 {
@@ -1305,7 +1260,7 @@ static void jz_mmc_rx_handler(unsigned int arg)
1305 if (__dmac_channel_transmit_end_detected(arg)) 1260 if (__dmac_channel_transmit_end_detected(arg))
1306 { 1261 {
1307 __dmac_channel_clear_transmit_end(arg); 1262 __dmac_channel_clear_transmit_end(arg);
1308 OSSemPost(mmc_dma_rx_sem); 1263 OSSemPost(sd_dma_rx_sem);
1309 } 1264 }
1310} 1265}
1311#endif 1266#endif
@@ -1318,39 +1273,39 @@ void MSC(void)
1318} 1273}
1319 1274
1320/******************************************************************************************************************* 1275/*******************************************************************************************************************
1321** Name: void mmc_hardware_init() 1276** Name: void sd_hardware_init()
1322** Function: initialize the hardware condiction that access sd card 1277** Function: initialize the hardware condiction that access sd card
1323** Input: NULL 1278** Input: NULL
1324** Output: NULL 1279** Output: NULL
1325********************************************************************************************************************/ 1280********************************************************************************************************************/
1326static void jz_mmc_hardware_init(void) 1281static void jz_sd_hardware_init(void)
1327{ 1282{
1328 __cpm_start_msc(); /* enable mmc clock */ 1283 __cpm_start_msc(); /* enable mmc clock */
1329 mmc_init_gpio(); /* init GPIO */ 1284 mmc_init_gpio(); /* init GPIO */
1330#ifdef MMC_POWER_ON 1285#ifdef SD_POWER_ON
1331 MMC_POWER_ON(); /* turn on power of card */ 1286 SD_POWER_ON(); /* turn on power of card */
1332#endif 1287#endif
1333 MMC_RESET(); /* reset mmc/sd controller */ 1288 SD_RESET(); /* reset mmc/sd controller */
1334 MMC_IRQ_MASK(); /* mask all IRQs */ 1289 SD_IRQ_MASK(); /* mask all IRQs */
1335 jz_mmc_stop_clock(); /* stop MMC/SD clock */ 1290 jz_sd_stop_clock(); /* stop SD clock */
1336#ifdef MMC_DMA_ENABLE 1291#ifdef SD_DMA_ENABLE
1337// __cpm_start_dmac(); 1292// __cpm_start_dmac();
1338// __dmac_enable_module(); 1293// __dmac_enable_module();
1339// REG_DMAC_DMACR = DMAC_DMACR_DME; 1294// REG_DMAC_DMACR = DMAC_DMACR_DME;
1340#if MMC_DMA_INTERRUPT 1295#if SD_DMA_INTERRUPT
1341 mmc_dma_rx_sem = OSSemCreate(0); 1296 sd_dma_rx_sem = OSSemCreate(0);
1342 mmc_dma_tx_sem = OSSemCreate(0); 1297 sd_dma_tx_sem = OSSemCreate(0);
1343 request_irq(IRQ_DMA_0 + RX_DMA_CHANNEL, jz_mmc_rx_handler, 1298 request_irq(IRQ_DMA_0 + RX_DMA_CHANNEL, jz_sd_rx_handler,
1344 RX_DMA_CHANNEL); 1299 RX_DMA_CHANNEL);
1345 request_irq(IRQ_DMA_0 + TX_DMA_CHANNEL, jz_mmc_tx_handler, 1300 request_irq(IRQ_DMA_0 + TX_DMA_CHANNEL, jz_sd_tx_handler,
1346 TX_DMA_CHANNEL); 1301 TX_DMA_CHANNEL);
1347#endif 1302#endif
1348#endif 1303#endif
1349} 1304}
1350 1305
1351static int mmc_send_cmd(struct mmc_request *request, int cmd, unsigned int arg, 1306static int sd_send_cmd(struct sd_request *request, int cmd, unsigned int arg,
1352 unsigned short nob, unsigned short block_len, 1307 unsigned short nob, unsigned short block_len,
1353 enum mmc_rsp_t rtype, unsigned char* buffer) 1308 enum sd_rsp_t rtype, unsigned char* buffer)
1354{ 1309{
1355 request->cmd = cmd; 1310 request->cmd = cmd;
1356 request->arg = arg; 1311 request->arg = arg;
@@ -1360,13 +1315,13 @@ static int mmc_send_cmd(struct mmc_request *request, int cmd, unsigned int arg,
1360 request->buffer = buffer; 1315 request->buffer = buffer;
1361 request->cnt = nob * block_len; 1316 request->cnt = nob * block_len;
1362 1317
1363 return jz_mmc_exec_cmd(request); 1318 return jz_sd_exec_cmd(request);
1364} 1319}
1365 1320
1366static void mmc_simple_cmd(struct mmc_request *request, int cmd, unsigned int arg, 1321static void sd_simple_cmd(struct sd_request *request, int cmd, unsigned int arg,
1367 enum mmc_rsp_t rtype) 1322 enum sd_rsp_t rtype)
1368{ 1323{
1369 mmc_send_cmd(request, cmd, arg, 0, 0, rtype, NULL); 1324 sd_send_cmd(request, cmd, arg, 0, 0, rtype, NULL);
1370} 1325}
1371 1326
1372#define KBPS 1 1327#define KBPS 1
@@ -1375,172 +1330,154 @@ static unsigned int ts_exp[] = { 100*KBPS, 1*MBPS, 10*MBPS, 100*MBPS, 0, 0, 0, 0
1375static unsigned int ts_mul[] = { 0, 1000, 1200, 1300, 1500, 2000, 2500, 3000, 1330static unsigned int ts_mul[] = { 0, 1000, 1200, 1300, 1500, 2000, 2500, 3000,
1376 3500, 4000, 4500, 5000, 5500, 6000, 7000, 8000 }; 1331 3500, 4000, 4500, 5000, 5500, 6000, 7000, 8000 };
1377 1332
1378unsigned int mmc_tran_speed(unsigned char ts) 1333unsigned int sd_tran_speed(unsigned char ts)
1379{ 1334{
1380 unsigned int rate = ts_exp[(ts & 0x7)] * ts_mul[(ts & 0x78) >> 3]; 1335 unsigned int rate = ts_exp[(ts & 0x7)] * ts_mul[(ts & 0x78) >> 3];
1381 1336
1382 if (rate <= 0) 1337 if (rate <= 0)
1383 { 1338 {
1384 DEBUG("mmc_tran_speed: error - unrecognized speed 0x%02x", ts); 1339 DEBUG("sd_tran_speed: error - unrecognized speed 0x%02x", ts);
1385 return 1; 1340 return 1;
1386 } 1341 }
1387 1342
1388 return rate; 1343 return rate;
1389} 1344}
1390 1345
1391static void mmc_configure_card(void) 1346static void sd_configure_card(void)
1392{ 1347{
1393 unsigned int rate; 1348 unsigned int rate;
1394 1349
1395 /* Get card info */ 1350 /* Get card info */
1396 if (sd2_0) 1351 if (sd2_0)
1397 mmcinfo.block_num = (mmcinfo.csd.c_size + 1) << 10; 1352 sdinfo.block_num = (sdinfo.csd.c_size + 1) << 10;
1398 else 1353 else
1399 mmcinfo.block_num = (mmcinfo.csd.c_size + 1) * (1 << (mmcinfo.csd.c_size_mult + 2)); 1354 sdinfo.block_num = (sdinfo.csd.c_size + 1) * (1 << (sdinfo.csd.c_size_mult + 2));
1400 1355
1401 mmcinfo.block_len = 1 << mmcinfo.csd.read_bl_len; 1356 sdinfo.block_len = 1 << sdinfo.csd.read_bl_len;
1402 1357
1403 /* Fix the clock rate */ 1358 /* Fix the clock rate */
1404 rate = mmc_tran_speed(mmcinfo.csd.tran_speed); 1359 rate = sd_tran_speed(sdinfo.csd.tran_speed);
1405 if (rate < MMC_CLOCK_SLOW) 1360 if (rate < MMC_CLOCK_SLOW)
1406 rate = MMC_CLOCK_SLOW; 1361 rate = MMC_CLOCK_SLOW;
1407 if (rate > SD_CLOCK_FAST) 1362 if (rate > SD_CLOCK_FAST)
1408 rate = SD_CLOCK_FAST; 1363 rate = SD_CLOCK_FAST;
1409 1364
1410 DEBUG("mmc_configure_card: block_len=%d block_num=%d rate=%d", mmcinfo.block_len, mmcinfo.block_num, rate); 1365 DEBUG("sd_configure_card: block_len=%d block_num=%d rate=%d", sdinfo.block_len, sdinfo.block_num, rate);
1411 1366
1412 jz_mmc_set_clock(1, rate); 1367 jz_sd_set_clock(1, rate);
1413} 1368}
1414 1369
1415#define MMC_INIT_DOING 0 1370#define SD_INIT_DOING 0
1416#define MMC_INIT_PASSED 1 1371#define SD_INIT_PASSED 1
1417#define MMC_INIT_FAILED 2 1372#define SD_INIT_FAILED 2
1418 1373
1419static int mmc_init_card_state(struct mmc_request *request) 1374static int sd_init_card_state(struct sd_request *request)
1420{ 1375{
1421 struct mmc_response_r1 r1; 1376 struct sd_response_r1 r1;
1422 struct mmc_response_r3 r3; 1377 struct sd_response_r3 r3;
1423 int retval; 1378 int retval;
1424 int ocr = 0x40300000; 1379 int ocr = 0x40300000;
1425 int limit_41 = 0; 1380 int limit_41 = 0;
1426 1381
1427 switch (request->cmd) 1382 switch (request->cmd)
1428 { 1383 {
1429 case MMC_GO_IDLE_STATE: /* No response to parse */ 1384 case SD_GO_IDLE_STATE: /* No response to parse */
1430 mmc_simple_cmd(request, SD_SEND_IF_COND, 0x1AA, RESPONSE_R1); 1385 sd_simple_cmd(request, SD_SEND_IF_COND, 0x1AA, RESPONSE_R1);
1431 break; 1386 break;
1432 1387
1433 case SD_SEND_IF_COND: 1388 case SD_SEND_IF_COND:
1434 retval = mmc_unpack_r1(request, &r1); 1389 retval = sd_unpack_r1(request, &r1);
1435 mmc_simple_cmd(request, MMC_APP_CMD, 0, RESPONSE_R1); 1390 sd_simple_cmd(request, SD_APP_CMD, 0, RESPONSE_R1);
1436 break; 1391 break;
1437 1392
1438 case MMC_APP_CMD: 1393 case SD_APP_CMD:
1439 retval = mmc_unpack_r1(request, &r1); 1394 retval = sd_unpack_r1(request, &r1);
1440 if (retval & (limit_41 < 100)) 1395 if (retval & (limit_41 < 100))
1441 { 1396 {
1442 DEBUG("mmc_init_card_state: unable to MMC_APP_CMD error=%d", 1397 DEBUG("sd_init_card_state: unable to SD_APP_CMD error=%d",
1443 retval); 1398 retval);
1444 limit_41++; 1399 limit_41++;
1445 mmc_simple_cmd(request, SD_SEND_OP_COND, ocr, RESPONSE_R3); 1400 sd_simple_cmd(request, SD_APP_OP_COND, ocr, RESPONSE_R3);
1446 } else if (limit_41 < 100) { 1401 } else if (limit_41 < 100) {
1447 limit_41++; 1402 limit_41++;
1448 mmc_simple_cmd(request, SD_SEND_OP_COND, ocr, RESPONSE_R3); 1403 sd_simple_cmd(request, SD_APP_OP_COND, ocr, RESPONSE_R3);
1449 } else{ 1404 } else{
1450 /* reset the card to idle*/ 1405 /* reset the card to idle*/
1451 mmc_simple_cmd(request, MMC_GO_IDLE_STATE, 0, RESPONSE_NONE); 1406 sd_simple_cmd(request, SD_GO_IDLE_STATE, 0, RESPONSE_NONE);
1452 } 1407 }
1453 break; 1408 break;
1454 1409
1455 case SD_SEND_OP_COND: 1410 case SD_APP_OP_COND:
1456 retval = mmc_unpack_r3(request, &r3); 1411 retval = sd_unpack_r3(request, &r3);
1457 if (retval) 1412 if (retval)
1458 { 1413 {
1459 /* Try MMC card */
1460 mmc_simple_cmd(request, MMC_SEND_OP_COND, MMC_OCR_ARG, RESPONSE_R3);
1461 break; 1414 break;
1462 } 1415 }
1463 1416
1464 DEBUG("mmc_init_card_state: read ocr value = 0x%08x", r3.ocr); 1417 DEBUG("sd_init_card_state: read ocr value = 0x%08x", r3.ocr);
1465 mmcinfo.ocr = r3.ocr; 1418 sdinfo.ocr = r3.ocr;
1466 1419
1467 if(!(r3.ocr & MMC_CARD_BUSY || ocr == 0)){ 1420 if(!(r3.ocr & SD_CARD_BUSY || ocr == 0)){
1468 udelay(10000); 1421 udelay(10000);
1469 mmc_simple_cmd(request, MMC_APP_CMD, 0, RESPONSE_R1); 1422 sd_simple_cmd(request, SD_APP_CMD, 0, RESPONSE_R1);
1470 } 1423 }
1471 else 1424 else
1472 { 1425 {
1473 /* Set the data bus width to 4 bits */ 1426 /* Set the data bus width to 4 bits */
1474 use_4bit = 1; 1427 use_4bit = 1;
1475 mmc_simple_cmd(request, MMC_ALL_SEND_CID, 0, RESPONSE_R2_CID); 1428 sd_simple_cmd(request, SD_ALL_SEND_CID, 0, RESPONSE_R2_CID);
1476 } 1429 }
1477 break; 1430 break;
1478 1431
1479 case MMC_SEND_OP_COND: 1432 case SD_ALL_SEND_CID:
1480 retval = mmc_unpack_r3(request, &r3); 1433 retval = sd_unpack_cid( request, &sdinfo.cid );
1481 if (retval)
1482 {
1483 DEBUG("mmc_init_card_state: failed SEND_OP_COND error=%d",
1484 retval);
1485 return MMC_INIT_FAILED;
1486 }
1487
1488 DEBUG("mmc_init_card_state: read ocr value = 0x%08x", r3.ocr);
1489 if (!(r3.ocr & MMC_CARD_BUSY))
1490 mmc_simple_cmd(request, MMC_SEND_OP_COND, MMC_OCR_ARG, RESPONSE_R3);
1491 else
1492 mmc_simple_cmd(request, MMC_ALL_SEND_CID, 0, RESPONSE_R2_CID);
1493 break;
1494
1495 case MMC_ALL_SEND_CID:
1496 retval = mmc_unpack_cid( request, &mmcinfo.cid );
1497 1434
1498 if ( retval && (retval != MMC_ERROR_CRC)) { 1435 if ( retval && (retval != SD_ERROR_CRC)) {
1499 DEBUG("mmc_init_card_state: unable to ALL_SEND_CID error=%d", 1436 DEBUG("sd_init_card_state: unable to ALL_SEND_CID error=%d",
1500 retval); 1437 retval);
1501 return MMC_INIT_FAILED; 1438 return SD_INIT_FAILED;
1502 } 1439 }
1503 mmc_simple_cmd(request, MMC_SET_RELATIVE_ADDR, 0, RESPONSE_R6); 1440 sd_simple_cmd(request, SD_SEND_RELATIVE_ADDR, 0, RESPONSE_R6);
1504 break; 1441 break;
1505 1442
1506 case MMC_SET_RELATIVE_ADDR: 1443 case SD_SEND_RELATIVE_ADDR:
1507 retval = mmc_unpack_r6(request, &r1, &mmcinfo.rca); 1444 retval = sd_unpack_r6(request, &r1, &sdinfo.rca);
1508 mmcinfo.rca = mmcinfo.rca << 16; 1445 sdinfo.rca = sdinfo.rca << 16;
1509 DEBUG("mmc_init_card_state: Get RCA from SD: 0x%04x Status: %x", mmcinfo.rca, r1.status); 1446 DEBUG("sd_init_card_state: Get RCA from SD: 0x%04x Status: %x", sdinfo.rca, r1.status);
1510 if (retval) 1447 if (retval)
1511 { 1448 {
1512 DEBUG("mmc_init_card_state: unable to SET_RELATIVE_ADDR error=%d", 1449 DEBUG("sd_init_card_state: unable to SET_RELATIVE_ADDR error=%d",
1513 retval); 1450 retval);
1514 return MMC_INIT_FAILED; 1451 return SD_INIT_FAILED;
1515 } 1452 }
1516 1453
1517 mmc_simple_cmd(request, MMC_SEND_CSD, mmcinfo.rca, RESPONSE_R2_CSD); 1454 sd_simple_cmd(request, SD_SEND_CSD, sdinfo.rca, RESPONSE_R2_CSD);
1518 break; 1455 break;
1519 1456
1520 case MMC_SEND_CSD: 1457 case SD_SEND_CSD:
1521 retval = mmc_unpack_csd(request, &mmcinfo.csd); 1458 retval = sd_unpack_csd(request, &sdinfo.csd);
1522 1459
1523 DEBUG("SD card is ready"); 1460 DEBUG("SD card is ready");
1524 1461
1525 /*FIXME:ignore CRC error for CMD2/CMD9/CMD10 */ 1462 /*FIXME:ignore CRC error for CMD2/CMD9/CMD10 */
1526 if (retval && (retval != MMC_ERROR_CRC)) 1463 if (retval && (retval != SD_ERROR_CRC))
1527 { 1464 {
1528 DEBUG("mmc_init_card_state: unable to SEND_CSD error=%d", 1465 DEBUG("sd_init_card_state: unable to SEND_CSD error=%d",
1529 retval); 1466 retval);
1530 return MMC_INIT_FAILED; 1467 return SD_INIT_FAILED;
1531 } 1468 }
1532 mmc_configure_card(); 1469 sd_configure_card();
1533 return MMC_INIT_PASSED; 1470 return SD_INIT_PASSED;
1534 1471
1535 default: 1472 default:
1536 DEBUG("mmc_init_card_state: error! Illegal last cmd %d", request->cmd); 1473 DEBUG("sd_init_card_state: error! Illegal last cmd %d", request->cmd);
1537 return MMC_INIT_FAILED; 1474 return SD_INIT_FAILED;
1538 } 1475 }
1539 1476
1540 return MMC_INIT_DOING; 1477 return SD_INIT_DOING;
1541} 1478}
1542 1479
1543static int mmc_sd_switch(struct mmc_request *request, int mode, int group, 1480static int sd_sd_switch(struct sd_request *request, int mode, int group,
1544 unsigned char value, unsigned char * resp) 1481 unsigned char value, unsigned char * resp)
1545{ 1482{
1546 unsigned int arg; 1483 unsigned int arg;
@@ -1550,7 +1487,7 @@ static int mmc_sd_switch(struct mmc_request *request, int mode, int group,
1550 arg = (mode << 31 | 0x00FFFFFF); 1487 arg = (mode << 31 | 0x00FFFFFF);
1551 arg &= ~(0xF << (group * 4)); 1488 arg &= ~(0xF << (group * 4));
1552 arg |= value << (group * 4); 1489 arg |= value << (group * 4);
1553 mmc_send_cmd(request, 6, arg, 1, 64, RESPONSE_R1, resp); 1490 sd_send_cmd(request, 6, arg, 1, 64, RESPONSE_R1, resp);
1554 1491
1555 return 0; 1492 return 0;
1556} 1493}
@@ -1558,12 +1495,12 @@ static int mmc_sd_switch(struct mmc_request *request, int mode, int group,
1558/* 1495/*
1559 * Fetches and decodes switch information 1496 * Fetches and decodes switch information
1560 */ 1497 */
1561static int mmc_read_switch(struct mmc_request *request) 1498static int sd_read_switch(struct sd_request *request)
1562{ 1499{
1563 unsigned int status[64 / 4]; 1500 unsigned int status[64 / 4];
1564 1501
1565 memset((unsigned char *)status, 0, 64); 1502 memset((unsigned char *)status, 0, 64);
1566 mmc_sd_switch(request, 0, 0, 1, (unsigned char*) status); 1503 sd_sd_switch(request, 0, 0, 1, (unsigned char*) status);
1567 1504
1568 if (((unsigned char *)status)[13] & 0x02) 1505 if (((unsigned char *)status)[13] & 0x02)
1569 return 0; 1506 return 0;
@@ -1574,43 +1511,43 @@ static int mmc_read_switch(struct mmc_request *request)
1574/* 1511/*
1575 * Test if the card supports high-speed mode and, if so, switch to it. 1512 * Test if the card supports high-speed mode and, if so, switch to it.
1576 */ 1513 */
1577static int mmc_switch_hs(struct mmc_request *request) 1514static int sd_switch_hs(struct sd_request *request)
1578{ 1515{
1579 unsigned int status[64 / 4]; 1516 unsigned int status[64 / 4];
1580 1517
1581 mmc_sd_switch(request, 1, 0, 1, (unsigned char*) status); 1518 sd_sd_switch(request, 1, 0, 1, (unsigned char*) status);
1582 return 0; 1519 return 0;
1583} 1520}
1584 1521
1585int mmc_select_card(void) 1522int sd_select_card(void)
1586{ 1523{
1587 struct mmc_request request; 1524 struct sd_request request;
1588 struct mmc_response_r1 r1; 1525 struct sd_response_r1 r1;
1589 int retval; 1526 int retval;
1590 1527
1591 mmc_simple_cmd(&request, MMC_SELECT_CARD, mmcinfo.rca, 1528 sd_simple_cmd(&request, SD_SELECT_CARD, sdinfo.rca,
1592 RESPONSE_R1B); 1529 RESPONSE_R1B);
1593 retval = mmc_unpack_r1(&request, &r1); 1530 retval = sd_unpack_r1(&request, &r1);
1594 if (retval) 1531 if (retval)
1595 return retval; 1532 return retval;
1596 1533
1597 if (sd2_0) 1534 if (sd2_0)
1598 { 1535 {
1599 retval = mmc_read_switch(&request); 1536 retval = sd_read_switch(&request);
1600 if (!retval) 1537 if (!retval)
1601 { 1538 {
1602 mmc_switch_hs(&request); 1539 sd_switch_hs(&request);
1603 jz_mmc_set_clock(1, SD_CLOCK_HIGH); 1540 jz_sd_set_clock(1, SD_CLOCK_HIGH);
1604 } 1541 }
1605 } 1542 }
1606 num_6 = 3; 1543 num_6 = 3;
1607 mmc_simple_cmd(&request, MMC_APP_CMD, mmcinfo.rca, 1544 sd_simple_cmd(&request, SD_APP_CMD, sdinfo.rca,
1608 RESPONSE_R1); 1545 RESPONSE_R1);
1609 retval = mmc_unpack_r1(&request, &r1); 1546 retval = sd_unpack_r1(&request, &r1);
1610 if (retval) 1547 if (retval)
1611 return retval; 1548 return retval;
1612 mmc_simple_cmd(&request, SET_BUS_WIDTH, 2, RESPONSE_R1); 1549 sd_simple_cmd(&request, SD_SET_BUS_WIDTH, 2, RESPONSE_R1);
1613 retval = mmc_unpack_r1(&request, &r1); 1550 retval = sd_unpack_r1(&request, &r1);
1614 if (retval) 1551 if (retval)
1615 return retval; 1552 return retval;
1616 1553
@@ -1621,29 +1558,29 @@ int sd_init(void)
1621{ 1558{
1622 int retval; 1559 int retval;
1623 static bool inited = false; 1560 static bool inited = false;
1624 struct mmc_request init_req; 1561 struct sd_request init_req;
1625 if(!inited) 1562 if(!inited)
1626 { 1563 {
1627 jz_mmc_hardware_init(); 1564 jz_sd_hardware_init();
1628 wakeup_init(&sd_wakeup); 1565 wakeup_init(&sd_wakeup);
1629 num_6 = 0; 1566 num_6 = 0;
1630 inited = true; 1567 inited = true;
1631 } 1568 }
1632 1569
1633 mmc_simple_cmd(&init_req, MMC_CIM_RESET, 0, RESPONSE_NONE); 1570 sd_simple_cmd(&init_req, SD_CIM_RESET, 0, RESPONSE_NONE);
1634 mmc_simple_cmd(&init_req, SD_GO_IDLE_STATE, 0, RESPONSE_NONE); 1571 sd_simple_cmd(&init_req, SD_GO_IDLE_STATE, 0, RESPONSE_NONE);
1635 1572
1636 while ((retval = mmc_init_card_state(&init_req)) == MMC_INIT_DOING); 1573 while ((retval = sd_init_card_state(&init_req)) == SD_INIT_DOING);
1637 1574
1638 if (retval == MMC_INIT_PASSED) 1575 if (retval == SD_INIT_PASSED)
1639 return mmc_select_card(); 1576 return sd_select_card();
1640 else 1577 else
1641 return -1; 1578 return -1;
1642} 1579}
1643 1580
1644bool card_detect_target(void) 1581bool card_detect_target(void)
1645{ 1582{
1646 return (jz_mmc_chkcard() == 1); 1583 return (jz_sd_chkcard() == 1);
1647} 1584}
1648 1585
1649#ifdef HAVE_HOTSWAP 1586#ifdef HAVE_HOTSWAP
@@ -1673,11 +1610,11 @@ tCardInfo* card_get_info_target(int card_no)
1673 1,10,100,1000,10000,100000,1000000,10000000,100000000,1000000000 }; 1610 1,10,100,1000,10000,100000,1000000,10000000,100000000,1000000000 };
1674 1611
1675 card.initialized = true; 1612 card.initialized = true;
1676 card.ocr = mmcinfo.ocr; 1613 card.ocr = sdinfo.ocr;
1677 for(i=0; i<4; i++) 1614 for(i=0; i<4; i++)
1678 card.csd[i] = ((unsigned long*)&mmcinfo.csd)[i]; 1615 card.csd[i] = ((unsigned long*)&sdinfo.csd)[i];
1679 for(i=0; i<4; i++) 1616 for(i=0; i<4; i++)
1680 card.cid[i] = ((unsigned long*)&mmcinfo.cid)[i]; 1617 card.cid[i] = ((unsigned long*)&sdinfo.cid)[i];
1681 temp = card_extract_bits(card.csd, 98, 3); 1618 temp = card_extract_bits(card.csd, 98, 3);
1682 card.speed = sd_mantissa[card_extract_bits(card.csd, 102, 4)] 1619 card.speed = sd_mantissa[card_extract_bits(card.csd, 102, 4)]
1683 * sd_exponent[temp > 2 ? 7 : temp + 4]; 1620 * sd_exponent[temp > 2 ? 7 : temp + 4];
@@ -1685,8 +1622,8 @@ tCardInfo* card_get_info_target(int card_no)
1685 temp = card_extract_bits(card.csd, 114, 3); 1622 temp = card_extract_bits(card.csd, 114, 3);
1686 card.taac = sd_mantissa[card_extract_bits(card.csd, 118, 4)] 1623 card.taac = sd_mantissa[card_extract_bits(card.csd, 118, 4)]
1687 * sd_exponent[temp] / 10; 1624 * sd_exponent[temp] / 10;
1688 card.numblocks = mmcinfo.block_num; 1625 card.numblocks = sdinfo.block_num;
1689 card.blocksize = mmcinfo.block_len; 1626 card.blocksize = sdinfo.block_len;
1690 1627
1691 return &card; 1628 return &card;
1692} 1629}
@@ -1698,42 +1635,42 @@ int sd_read_sectors(IF_MV2(int drive,) unsigned long start, int count, void* buf
1698#endif 1635#endif
1699 led(true); 1636 led(true);
1700 1637
1701 struct mmc_request request; 1638 struct sd_request request;
1702 struct mmc_response_r1 r1; 1639 struct sd_response_r1 r1;
1703 int retval; 1640 int retval;
1704 1641
1705 if (!card_detect_target() || count == 0 || start > mmcinfo.block_num) 1642 if (!card_detect_target() || count == 0 || start > sdinfo.block_num)
1706 return -1; 1643 return -1;
1707 1644
1708 mmc_simple_cmd(&request, MMC_SEND_STATUS, mmcinfo.rca, RESPONSE_R1); 1645 sd_simple_cmd(&request, SD_SEND_STATUS, sdinfo.rca, RESPONSE_R1);
1709 retval = mmc_unpack_r1(&request, &r1); 1646 retval = sd_unpack_r1(&request, &r1);
1710 if (retval && (retval != MMC_ERROR_STATE_MISMATCH)) 1647 if (retval && (retval != SD_ERROR_STATE_MISMATCH))
1711 return retval; 1648 return retval;
1712 1649
1713 mmc_simple_cmd(&request, MMC_SET_BLOCKLEN, SD_BLOCK_SIZE, RESPONSE_R1); 1650 sd_simple_cmd(&request, SD_SET_BLOCKLEN, SD_BLOCK_SIZE, RESPONSE_R1);
1714 if ((retval = mmc_unpack_r1(&request, &r1))) 1651 if ((retval = sd_unpack_r1(&request, &r1)))
1715 return retval; 1652 return retval;
1716 1653
1717 if (sd2_0) 1654 if (sd2_0)
1718 { 1655 {
1719 mmc_send_cmd(&request, MMC_READ_MULTIPLE_BLOCK, start, 1656 sd_send_cmd(&request, SD_READ_MULTIPLE_BLOCK, start,
1720 count, SD_BLOCK_SIZE, RESPONSE_R1, buf); 1657 count, SD_BLOCK_SIZE, RESPONSE_R1, buf);
1721 if ((retval = mmc_unpack_r1(&request, &r1))) 1658 if ((retval = sd_unpack_r1(&request, &r1)))
1722 return retval; 1659 return retval;
1723 } 1660 }
1724 else 1661 else
1725 { 1662 {
1726 mmc_send_cmd(&request, MMC_READ_MULTIPLE_BLOCK, 1663 sd_send_cmd(&request, SD_READ_MULTIPLE_BLOCK,
1727 start * SD_BLOCK_SIZE, count, 1664 start * SD_BLOCK_SIZE, count,
1728 SD_BLOCK_SIZE, RESPONSE_R1, buf); 1665 SD_BLOCK_SIZE, RESPONSE_R1, buf);
1729 if ((retval = mmc_unpack_r1(&request, &r1))) 1666 if ((retval = sd_unpack_r1(&request, &r1)))
1730 return retval; 1667 return retval;
1731 } 1668 }
1732 1669
1733 last_disk_activity = current_tick; 1670 last_disk_activity = current_tick;
1734 1671
1735 mmc_simple_cmd(&request, MMC_STOP_TRANSMISSION, 0, RESPONSE_R1B); 1672 sd_simple_cmd(&request, SD_STOP_TRANSMISSION, 0, RESPONSE_R1B);
1736 if ((retval = mmc_unpack_r1(&request, &r1))) 1673 if ((retval = sd_unpack_r1(&request, &r1)))
1737 return retval; 1674 return retval;
1738 1675
1739 led(false); 1676 led(false);
@@ -1748,40 +1685,40 @@ int sd_write_sectors(IF_MV2(int drive,) unsigned long start, int count, const vo
1748#endif 1685#endif
1749 led(true); 1686 led(true);
1750 1687
1751 struct mmc_request request; 1688 struct sd_request request;
1752 struct mmc_response_r1 r1; 1689 struct sd_response_r1 r1;
1753 int retval; 1690 int retval;
1754 1691
1755 if (!card_detect_target() || count == 0 || start > mmcinfo.block_num) 1692 if (!card_detect_target() || count == 0 || start > sdinfo.block_num)
1756 return -1; 1693 return -1;
1757 1694
1758 mmc_simple_cmd(&request, MMC_SEND_STATUS, mmcinfo.rca, RESPONSE_R1); 1695 sd_simple_cmd(&request, SD_SEND_STATUS, sdinfo.rca, RESPONSE_R1);
1759 retval = mmc_unpack_r1(&request, &r1); 1696 retval = sd_unpack_r1(&request, &r1);
1760 if (retval && (retval != MMC_ERROR_STATE_MISMATCH)) 1697 if (retval && (retval != SD_ERROR_STATE_MISMATCH))
1761 return retval; 1698 return retval;
1762 1699
1763 mmc_simple_cmd(&request, MMC_SET_BLOCKLEN, SD_BLOCK_SIZE, RESPONSE_R1); 1700 sd_simple_cmd(&request, SD_SET_BLOCKLEN, SD_BLOCK_SIZE, RESPONSE_R1);
1764 if ((retval = mmc_unpack_r1(&request, &r1))) 1701 if ((retval = sd_unpack_r1(&request, &r1)))
1765 return retval; 1702 return retval;
1766 1703
1767 if (sd2_0) 1704 if (sd2_0)
1768 { 1705 {
1769 mmc_send_cmd(&request, MMC_WRITE_MULTIPLE_BLOCK, start, 1706 sd_send_cmd(&request, SD_WRITE_MULTIPLE_BLOCK, start,
1770 count, SD_BLOCK_SIZE, RESPONSE_R1, 1707 count, SD_BLOCK_SIZE, RESPONSE_R1,
1771 (void*)buf); 1708 (void*)buf);
1772 if ((retval = mmc_unpack_r1(&request, &r1))) 1709 if ((retval = sd_unpack_r1(&request, &r1)))
1773 return retval; 1710 return retval;
1774 } 1711 }
1775 else 1712 else
1776 { 1713 {
1777 mmc_send_cmd(&request, MMC_WRITE_MULTIPLE_BLOCK, 1714 sd_send_cmd(&request, SD_WRITE_MULTIPLE_BLOCK,
1778 start * SD_BLOCK_SIZE, count, 1715 start * SD_BLOCK_SIZE, count,
1779 SD_BLOCK_SIZE, RESPONSE_R1, (void*)buf); 1716 SD_BLOCK_SIZE, RESPONSE_R1, (void*)buf);
1780 if ((retval = mmc_unpack_r1(&request, &r1))) 1717 if ((retval = sd_unpack_r1(&request, &r1)))
1781 return retval; 1718 return retval;
1782 } 1719 }
1783 mmc_simple_cmd(&request, MMC_STOP_TRANSMISSION, 0, RESPONSE_R1B); 1720 sd_simple_cmd(&request, SD_STOP_TRANSMISSION, 0, RESPONSE_R1B);
1784 if ((retval = mmc_unpack_r1(&request, &r1))) 1721 if ((retval = sd_unpack_r1(&request, &r1)))
1785 return retval; 1722 return retval;
1786 1723
1787 led(false); 1724 led(false);
@@ -1823,7 +1760,7 @@ bool sd_present(IF_MV_NONVOID(int drive))
1823#ifdef HAVE_MULTIVOLUME 1760#ifdef HAVE_MULTIVOLUME
1824 (void)drive; 1761 (void)drive;
1825#endif 1762#endif
1826 return (mmcinfo.block_num > 0 && card_detect_target()); 1763 return (sdinfo.block_num > 0 && card_detect_target());
1827} 1764}
1828 1765
1829#ifdef STORAGE_GET_INFO 1766#ifdef STORAGE_GET_INFO
@@ -1839,7 +1776,7 @@ void sd_get_info(IF_MV2(int drive,) struct storage_info *info)
1839 info->product="SD Storage"; 1776 info->product="SD Storage";
1840 1777
1841 /* blocks count */ 1778 /* blocks count */
1842 info->num_sectors = mmcinfo.block_num; 1779 info->num_sectors = sdinfo.block_num;
1843 info->sector_size = mmcinfo.block_len; 1780 info->sector_size = sdinfo.block_len;
1844} 1781}
1845#endif 1782#endif