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authorMichael Sparmann <theseven@rockbox.org>2009-10-17 22:32:46 +0000
committerMichael Sparmann <theseven@rockbox.org>2009-10-17 22:32:46 +0000
commit8f1709f434e88546f556e8971312b8e2162dbca7 (patch)
tree05148949c37368ab8edb211674cf42aed8731903
parent47e06dfe9e9565fbbed55d295ee757c9b58e8394 (diff)
downloadrockbox-8f1709f434e88546f556e8971312b8e2162dbca7.tar.gz
rockbox-8f1709f434e88546f556e8971312b8e2162dbca7.zip
Adjust iPod Nano 2G CPU speed to 192MHz, which measurements show it to be. Timers will be more accurate now.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23237 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/export/config-ipodnano2g.h2
-rw-r--r--firmware/export/s5l8700.h3
-rw-r--r--firmware/target/arm/s5l8700/kernel-s5l8700.c6
3 files changed, 6 insertions, 5 deletions
diff --git a/firmware/export/config-ipodnano2g.h b/firmware/export/config-ipodnano2g.h
index e733aa95e3..25e9eff3f0 100644
--- a/firmware/export/config-ipodnano2g.h
+++ b/firmware/export/config-ipodnano2g.h
@@ -147,7 +147,7 @@
147#define FLASH_SIZE 0x400000 147#define FLASH_SIZE 0x400000
148 148
149/* Define this to the CPU frequency */ 149/* Define this to the CPU frequency */
150#define CPU_FREQ 200000000 150#define CPU_FREQ 192000000
151 151
152/* Define this if you have ATA power-off control */ 152/* Define this if you have ATA power-off control */
153//#define HAVE_ATA_POWER_OFF 153//#define HAVE_ATA_POWER_OFF
diff --git a/firmware/export/s5l8700.h b/firmware/export/s5l8700.h
index f08abee8ff..fe1d9ea7b5 100644
--- a/firmware/export/s5l8700.h
+++ b/firmware/export/s5l8700.h
@@ -25,7 +25,7 @@
25#define REG16_PTR_T volatile uint16_t * 25#define REG16_PTR_T volatile uint16_t *
26#define REG32_PTR_T volatile uint32_t * 26#define REG32_PTR_T volatile uint32_t *
27 27
28#define TIMER_FREQ 50000000L 28#define TIMER_FREQ 48000000L
29 29
30/* 04. CALMADM2E */ 30/* 04. CALMADM2E */
31 31
@@ -132,6 +132,7 @@
132#define INTMSK_TIMERC (1<<5) 132#define INTMSK_TIMERC (1<<5)
133#define INTMSK_TIMERD (1<<5) 133#define INTMSK_TIMERD (1<<5)
134#define INTMSK_ECC (1<<19) 134#define INTMSK_ECC (1<<19)
135#define INTMSK_USB_OTG (1<<16)
135#else 136#else
136#define INTMSK_TIMERA (1<<5) 137#define INTMSK_TIMERA (1<<5)
137#define INTMSK_TIMERB (1<<7) 138#define INTMSK_TIMERB (1<<7)
diff --git a/firmware/target/arm/s5l8700/kernel-s5l8700.c b/firmware/target/arm/s5l8700/kernel-s5l8700.c
index 61466af970..b7028ebd1f 100644
--- a/firmware/target/arm/s5l8700/kernel-s5l8700.c
+++ b/firmware/target/arm/s5l8700/kernel-s5l8700.c
@@ -24,7 +24,7 @@
24 24
25/* S5L8700 driver for the kernel timer 25/* S5L8700 driver for the kernel timer
26 26
27 Timer B is configured as a 10 kHz timer (assuming PCLK = 100 MHz) 27 Timer B is configured as a 10 kHz timer (assuming PCLK = 48 MHz)
28 */ 28 */
29 29
30void INT_TIMERB(void) 30void INT_TIMERB(void)
@@ -37,14 +37,14 @@ void INT_TIMERB(void)
37 37
38void tick_start(unsigned int interval_in_ms) 38void tick_start(unsigned int interval_in_ms)
39{ 39{
40 int cycles = 5 * interval_in_ms; 40 int cycles = 10 * interval_in_ms;
41 41
42 /* enable timer clock */ 42 /* enable timer clock */
43 PWRCON &= ~(1 << 4); 43 PWRCON &= ~(1 << 4);
44 44
45 /* configure timer for 10 kHz */ 45 /* configure timer for 10 kHz */
46 TBCMD = (1 << 1); /* TB_CLR */ 46 TBCMD = (1 << 1); /* TB_CLR */
47 TBPRE = 625 - 1; /* prescaler */ 47 TBPRE = 300 - 1; /* prescaler */
48 TBCON = (0 << 13) | /* TB_INT1_EN */ 48 TBCON = (0 << 13) | /* TB_INT1_EN */
49 (1 << 12) | /* TB_INT0_EN */ 49 (1 << 12) | /* TB_INT0_EN */
50 (0 << 11) | /* TB_START */ 50 (0 << 11) | /* TB_START */