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authorAmaury Pouly <amaury.pouly@gmail.com>2013-09-13 14:35:41 +0200
committerAmaury Pouly <amaury.pouly@gmail.com>2013-09-18 13:17:54 +0200
commit8f122e00919e351f260e08103dd7ed4d9f7f32ba (patch)
treeddcd025867bbb4ac60bc7a08ea9dcfe8db42f6e9
parentb4c1bb021489412f6156bf859002f11052c8d0a9 (diff)
downloadrockbox-8f122e00919e351f260e08103dd7ed4d9f7f32ba.tar.gz
rockbox-8f122e00919e351f260e08103dd7ed4d9f7f32ba.zip
imxtools: add pin map and decoding tool
Also add the tool which was used to generate the map on wiki. Change-Id: I54f3474028b5fa75348564437ec1b46ba20f071b
Diffstat
-rw-r--r--utils/imxtools/misc/Makefile23
-rw-r--r--utils/imxtools/misc/io_pins.c88
-rw-r--r--utils/imxtools/misc/map.h716
-rw-r--r--utils/imxtools/misc/wiki_gen.c100
4 files changed, 927 insertions, 0 deletions
diff --git a/utils/imxtools/misc/Makefile b/utils/imxtools/misc/Makefile
new file mode 100644
index 0000000000..ee4dadd953
--- /dev/null
+++ b/utils/imxtools/misc/Makefile
@@ -0,0 +1,23 @@
1DEFINES=
2CC=gcc
3LD=gcc
4CFLAGS=-O3 -g -std=c99 -W -Wall $(DEFINES)
5LDFLAGS=
6BINS=io_pins wiki_gen
7
8all: $(BINS)
9
10%.o: %.c
11 $(CC) $(CFLAGS) -c -o $@ $<
12
13io_pins: io_pins.o
14 $(LD) -o $@ $^ $(LDFLAGS)
15
16wiki_gen: wiki_gen.o
17 $(LD) -o $@ $^ $(LDFLAGS)
18
19clean:
20 rm -fr *.o
21
22veryclean:
23 rm -rf $(BINS)
diff --git a/utils/imxtools/misc/io_pins.c b/utils/imxtools/misc/io_pins.c
new file mode 100644
index 0000000000..37e0331141
--- /dev/null
+++ b/utils/imxtools/misc/io_pins.c
@@ -0,0 +1,88 @@
1#include <stdio.h>
2#include <stdlib.h>
3#include <stdbool.h>
4#include <stdint.h>
5#include <string.h>
6
7#include "map.h"
8
9bool read_number(const char *str, uint32_t *value)
10{
11 char *end;
12 long int ret = strtol(str, &end, 0);
13 if((str + strlen(str)) != end)
14 return false;
15 if(ret < 0)
16 return false;
17 *value = ret;
18 return true;
19}
20
21int main(int argc, char **argv)
22{
23 if(argc != 6)
24 {
25 printf("usage: %s <soc> <ver> <mux> <clr mask> <set mask>\n", argv[0]);
26 printf(" where <soc> is stmp3700 or imx233\n");
27 printf(" where <ver> is bga169 or lqfp128\n");
28 printf(" where <mux> is between 0 and 7");
29 printf(" where <mask> is a number or ~number\n");
30 return 1;
31 }
32
33 const char *soc = argv[1];
34 const char *ver = argv[2];
35 const char *s_mux = argv[3];
36 const char *s_clr_mask = argv[4];
37 const char *s_set_mask = argv[5];
38 uint32_t mux, clr_mask, set_mask;
39
40 if(!read_number(s_mux, &mux) || mux >= NR_BANKS * 2)
41 {
42 printf("invalid mux number\n");
43 return 1;
44 }
45 if(!read_number(s_clr_mask, &clr_mask))
46 {
47 printf("invalid clear mask\n");
48 return 2;
49 }
50 if(!read_number(s_set_mask, &set_mask))
51 {
52 printf("invalid set mask\n");
53 return 3;
54 }
55
56 struct bank_map_t *map = NULL;
57 for(unsigned i = 0; i < NR_SOCS; i++)
58 if(strcmp(soc, socs[i].soc) == 0 && strcmp(ver, socs[i].ver) == 0)
59 map = socs[i].map;
60 if(map == NULL)
61 {
62 printf("no valid map found\n");
63 return 4;
64 }
65
66 if(clr_mask & set_mask)
67 printf("warning: set and clear mask intersect!\n");
68 unsigned bank = mux / 2;
69 unsigned offset = 16 * (mux % 2);
70 for(unsigned i = 0; i < 16; i++)
71 {
72 unsigned pin = offset + i;
73 uint32_t pin_shift = 2 * i;
74 uint32_t set_fn = (set_mask >> pin_shift) & 3;
75 uint32_t clr_fn = (clr_mask >> pin_shift) & 3;
76 if(set_fn == 0 && clr_fn == 0)
77 continue;
78 bool partial_mask = (set_fn | clr_fn) != 3;
79
80 printf("B%dP%02d => %s (select = %d)", bank, pin,
81 map[bank].pins[pin].function[set_fn].name, set_fn);
82 if(partial_mask)
83 printf(" (warning: partial mask)");
84 printf("\n");
85 }
86
87 return 0;
88}
diff --git a/utils/imxtools/misc/map.h b/utils/imxtools/misc/map.h
new file mode 100644
index 0000000000..b94875ff6d
--- /dev/null
+++ b/utils/imxtools/misc/map.h
@@ -0,0 +1,716 @@
1#include <stdint.h>
2
3#define NR_BANKS 4
4#define NR_FUNCTIONS 4
5#define NR_PINS 32
6
7struct pin_function_desc_t
8{
9 const char *name;
10 unsigned group;
11 unsigned block;
12};
13
14struct pin_desc_t
15{
16 struct pin_function_desc_t function[NR_FUNCTIONS];
17};
18
19struct bank_map_t
20{
21 struct pin_desc_t *pins;
22};
23
24struct soc_t
25{
26 const char *soc;
27 const char *ver;
28 struct bank_map_t *map;
29};
30
31#define BGA169 bga169
32#define LQFP100 lqfp100
33
34#define IMX233 imx233
35#define STMP3700 stmp3700
36#define STMP3600 stmp3600
37
38#define BANK(soc, ver, bank) soc##_##ver##_bank##bank
39
40#define PIN_GROUP_EMI 0
41#define PIN_GROUP_GPIO 1
42#define PIN_GROUP_I2C 2
43#define PIN_GROUP_JTAG 3
44#define PIN_GROUP_PWM 4
45#define PIN_GROUP_SPDIF 5
46#define PIN_GROUP_TIMROT 6
47#define PIN_GROUP_AUART 7
48#define PIN_GROUP_ETM 8
49#define PIN_GROUP_GPMI 9
50#define PIN_GROUP_IrDA 10
51#define PIN_GROUP_LCD 11
52#define PIN_GROUP_SAIF 12
53#define PIN_GROUP_SSP 13
54#define PIN_GROUP_DUART 14
55#define PIN_GROUP_USB 15
56#define PIN_GROUP_NONE 16
57
58#define PIN_NO_BLOCK (unsigned)(-1)
59
60#define _STR(x) #x
61#define STR(x) _STR(x)
62
63#define PIN_GROUP_PREFIX_EMI "emi_"
64#define PIN_GROUP_PREFIX_GPIO ""
65#define PIN_GROUP_PREFIX_I2C "i2c_"
66#define PIN_GROUP_PREFIX_JTAG "jtag_"
67#define PIN_GROUP_PREFIX_PWM "pwm"
68#define PIN_GROUP_PREFIX_SPDIF "spdif"
69#define PIN_GROUP_PREFIX_TIMROT "timrot"
70#define PIN_GROUP_PREFIX_AUART "auart"
71#define PIN_GROUP_PREFIX_ETM "etm_"
72#define PIN_GROUP_PREFIX_GPMI "gpmi_"
73#define PIN_GROUP_PREFIX_IrDA "ir_"
74#define PIN_GROUP_PREFIX_LCD "lcd_"
75#define PIN_GROUP_PREFIX_SAIF "saif"
76#define PIN_GROUP_PREFIX_SSP "ssp"
77#define PIN_GROUP_PREFIX_DUART "duart_"
78#define PIN_GROUP_PREFIX_USB "usb_"
79#define PIN_GROUP_PREFIX_NONE ""
80
81#define R(group,name,block) {PIN_GROUP_PREFIX_##group name, PIN_GROUP_##group, block}
82#define Q(group,block,name) R(group,STR(block)"_"name, block)
83#define P(group,name) R(group,name,PIN_NO_BLOCK)
84
85#define IO P(GPIO,"gpio")
86#define RES {NULL,PIN_GROUP_NONE,PIN_NO_BLOCK}
87#define DIS P(GPIO,"disabled")
88
89struct pin_desc_t BANK(IMX233,BGA169,0)[NR_PINS] =
90{
91 {{P(GPMI,"d0"), P(LCD,"d8"), Q(SSP,2,"d0"), IO}}, /* B0P00 */
92 {{P(GPMI,"d1"), P(LCD,"d9"), Q(SSP,2,"d1"), IO}}, /* B0P01 */
93 {{P(GPMI,"d2"), P(LCD,"d10"), Q(SSP,2,"d2"), IO}}, /* B0P02 */
94 {{P(GPMI,"d3"), P(LCD,"d11"), Q(SSP,2,"d3"), IO}}, /* B0P03 */
95 {{P(GPMI,"d4"), P(LCD,"d12"), Q(SSP,2,"d4"), IO}}, /* B0P04 */
96 {{P(GPMI,"d5"), P(LCD,"d13"), Q(SSP,2,"d5"), IO}}, /* B0P05 */
97 {{P(GPMI,"d6"), P(LCD,"d14"), Q(SSP,2,"d6"), IO}}, /* B0P06 */
98 {{P(GPMI,"d7"), P(LCD,"d15"), Q(SSP,2,"d7"), IO}}, /* B0P07 */
99 {{P(GPMI,"d8"), P(LCD,"d18"), Q(SSP,1,"d4"), IO}}, /* B0P08 */
100 {{P(GPMI,"d9"), P(LCD,"d19"), Q(SSP,1,"d5"), IO}}, /* B0P09 */
101 {{P(GPMI,"d10"), P(LCD,"d20"), Q(SSP,1,"d6"), IO}}, /* B0P10 */
102 {{P(GPMI,"d11"), P(LCD,"d21"), Q(SSP,1,"d7"), IO}}, /* B0P11 */
103 {{P(GPMI,"d12"), P(LCD,"d22"), RES, IO}}, /* B0P12 */
104 {{P(GPMI,"d13"), P(LCD,"d23"), RES, IO}}, /* B0P13 */
105 {{P(GPMI,"d14"), Q(AUART,2,"rx"), RES, IO}}, /* B0P14 */
106 {{P(GPMI,"d15"), Q(AUART,2,"tx"), P(GPMI,"ce3n"), IO}}, /* B0P15 */
107 {{P(GPMI,"cle"), P(LCD,"d16"), RES, IO}}, /* B0P16 */
108 {{P(GPMI,"ale"), P(LCD,"d17"), RES, IO}}, /* B0P17 */
109 {{P(GPMI,"ce2n"), P(GPMI,"a2"), RES, IO}}, /* B0P18 */
110 {{P(GPMI,"rb0"), RES, Q(SSP,2,"det"), IO}}, /* B0P19 */
111 {{P(GPMI,"rb1"), RES, Q(SSP,2,"cmd"), IO}}, /* B0P20 */
112 {{P(GPMI,"rb2"), RES, RES, IO}}, /* B0P21 */
113 {{P(GPMI,"rb3"), RES, RES, IO}}, /* B0P22 */
114 {{P(GPMI,"wpn"), RES, RES, IO}}, /* B0P23 */
115 {{P(GPMI,"wrn"), RES, Q(SSP,2,"sck"), IO}}, /* B0P24 */
116 {{P(GPMI,"rdn"), RES, RES, IO}}, /* B0P25 */
117 {{Q(AUART,1,"cts"), RES, Q(SSP,1,"d4"), IO}}, /* B0P26 */
118 {{Q(AUART,1,"rts"), P(IrDA,"clk"), Q(SSP,1,"d5"), IO}}, /* B0P27 */
119 {{Q(AUART,1,"rx"), P(IrDA,"in_data"), Q(SSP,1,"d6"), IO}}, /* B0P28 */
120 {{Q(AUART,1,"tx"), P(IrDA,"out_data"), Q(SSP,1,"d7"), IO}}, /* B0P29 */
121 {{P(I2C,"clk"), P(GPMI,"rb2"), Q(AUART,1,"tx"), IO}}, /* B0P30 */
122 {{P(I2C,"sd"), P(GPMI,"ce2n"), Q(AUART,1,"rx"), IO}}, /* B0P31 */
123};
124
125struct pin_desc_t BANK(IMX233,BGA169,1)[NR_PINS] =
126{
127 {{P(LCD,"d0"), P(ETM,"da8"), RES, IO}}, /* B1P00 */
128 {{P(LCD,"d1"), P(ETM,"da9"), RES, IO}}, /* B1P01 */
129 {{P(LCD,"d2"), P(ETM,"da10"), RES, IO}}, /* B1P02 */
130 {{P(LCD,"d3"), P(ETM,"da11"), RES, IO}}, /* B1P03 */
131 {{P(LCD,"d4"), P(ETM,"da12"), RES, IO}}, /* B1P04 */
132 {{P(LCD,"d5"), P(ETM,"da13"), RES, IO}}, /* B1P05 */
133 {{P(LCD,"d6"), P(ETM,"da14"), RES, IO}}, /* B1P06 */
134 {{P(LCD,"d7"), P(ETM,"da15"), RES, IO}}, /* B1P07 */
135 {{P(LCD,"d8"), P(ETM,"da0"), Q(SAIF,2,"d0"), IO}}, /* B1P08 */
136 {{P(LCD,"d9"), P(ETM,"da1"), Q(SAIF,1,"d0"), IO}}, /* B1P09 */
137 {{P(LCD,"d10"), P(ETM,"da2"), P(SAIF,"bitclk"), IO}}, /* B1P10 */
138 {{P(LCD,"d11"), P(ETM,"da3"), P(SAIF,"lrclk"), IO}}, /* B1P11 */
139 {{P(LCD,"d12"), P(ETM,"da4"), Q(SAIF,2,"d1"), IO}}, /* B1P12 */
140 {{P(LCD,"d13"), P(ETM,"da5"), Q(SAIF,2,"d2"), IO}}, /* B1P13 */
141 {{P(LCD,"d14"), P(ETM,"da6"), Q(SAIF,1,"d2"), IO}}, /* B1P14 */
142 {{P(LCD,"d15"), P(ETM,"da7"), Q(SAIF,1,"d1"), IO}}, /* B1P15 */
143 {{P(LCD,"d16"), RES, Q(SAIF,1,"alt_bitclk"), IO}}, /* B1P16 */
144 {{P(LCD,"d17"), RES, RES, IO}}, /* B1P17 */
145 {{P(LCD,"reset"), P(ETM,"tctl"), P(GPMI,"ce3n"), IO}}, /* B1P18 */
146 {{P(LCD,"rs"), P(ETM,"tclk"), RES, IO}}, /* B1P19 */
147 {{P(LCD,"wr"), RES, RES, IO}}, /* B1P20 */
148 {{P(LCD,"cs"), RES, RES, IO}}, /* B1P21 */
149 {{P(LCD,"dotclk"), P(GPMI,"rb3"), RES, IO}}, /* B1P22 */
150 {{P(LCD,"enable"), P(I2C,"clk"), RES, IO}}, /* B1P23 */
151 {{P(LCD,"hsync"), P(I2C,"sd"), RES, IO}}, /* B1P24 */
152 {{P(LCD,"vsync"), P(LCD,"busy"), RES, IO}}, /* B1P25 */
153 {{P(PWM,"0"), P(TIMROT,"1"), P(DUART,"rx"), IO}}, /* B1P26 */
154 {{P(PWM,"1"), P(TIMROT,"2"), P(DUART,"tx"), IO}}, /* B1P27 */
155 {{P(PWM,"2"), P(GPMI,"rb3"), RES, IO}}, /* B1P28 */
156 {{P(PWM,"3"), P(ETM,"tctl"), Q(AUART,1,"cts"), IO}}, /* B1P29 */
157 {{P(PWM,"4"), P(ETM,"tclk"), Q(AUART,1,"rts"), IO}}, /* B1P30 */
158 {{RES, RES, RES, RES}}, /* B1P31 */
159};
160
161struct pin_desc_t BANK(IMX233,BGA169,2)[NR_PINS] =
162{
163 {{Q(SSP,1,"cmd"), RES, P(JTAG,"tdo"), IO}}, /* B2P00 */
164 {{Q(SSP,1,"det"), P(GPMI,"ce3n"), P(USB,"otg_id"), IO}}, /* B2P01 */
165 {{Q(SSP,1,"d0"), RES, P(JTAG,"tdi"), IO}}, /* B2P02 */
166 {{Q(SSP,1,"d1"), P(I2C,"clk"), P(JTAG,"tck"), IO}}, /* B2P03 */
167 {{Q(SSP,1,"d2"), P(I2C,"sd"), P(JTAG,"rtck"), IO}}, /* B2P04 */
168 {{Q(SSP,1,"d3"), RES, P(JTAG,"tms"), IO}}, /* B2P05 */
169 {{Q(SSP,1,"sck"), RES, P(JTAG,"trst_n"), IO}}, /* B2P06 */
170 {{P(TIMROT,"1"), Q(AUART,2,"rts"), P(SPDIF,""), IO}}, /* B2P07 */
171 {{P(TIMROT,"2"), Q(AUART,2,"cts"), P(GPMI,"ce3n"), IO}}, /* B2P08 */
172 {{P(EMI,"a00"), RES, RES, IO}}, /* B2P09 */
173 {{P(EMI,"a01"), RES, RES, IO}}, /* B2P10 */
174 {{P(EMI,"a02"), RES, RES, IO}}, /* B2P11 */
175 {{P(EMI,"a03"), RES, RES, IO}}, /* B2P12 */
176 {{P(EMI,"a04"), RES, RES, IO}}, /* B2P13 */
177 {{P(EMI,"a05"), RES, RES, IO}}, /* B2P14 */
178 {{P(EMI,"a06"), RES, RES, IO}}, /* B2P15 */
179 {{P(EMI,"a07"), RES, RES, IO}}, /* B2P16 */
180 {{P(EMI,"a08"), RES, RES, IO}}, /* B2P17 */
181 {{P(EMI,"a09"), RES, RES, IO}}, /* B2P18 */
182 {{P(EMI,"a10"), RES, RES, IO}}, /* B2P19 */
183 {{P(EMI,"a11"), RES, RES, IO}}, /* B2P20 */
184 {{P(EMI,"a12"), RES, RES, IO}}, /* B2P21 */
185 {{P(EMI,"ba0"), RES, RES, IO}}, /* B2P22 */
186 {{P(EMI,"ba1"), RES, RES, IO}}, /* B2P23 */
187 {{P(EMI,"casn"), RES, RES, IO}}, /* B2P24 */
188 {{P(EMI,"ce0n"), RES, RES, IO}}, /* B2P25 */
189 {{P(EMI,"ce1n"), RES, RES, IO}}, /* B2P26 */
190 {{P(GPMI,"ce1n"), RES, RES, IO}}, /* B2P27 */
191 {{P(GPMI,"ce0n"), RES, RES, IO}}, /* B2P28 */
192 {{P(EMI,"cke"), RES, RES, IO}}, /* B2P29 */
193 {{P(EMI,"rasn"), RES, RES, IO}}, /* B2P30 */
194 {{P(EMI,"wen"), RES, RES, IO}}, /* B2P31 */
195};
196
197struct pin_desc_t BANK(IMX233,BGA169,3)[NR_PINS] =
198{
199 {{P(EMI,"d0"), RES, RES, DIS}}, /* B3P00 */
200 {{P(EMI,"d1"), RES, RES, DIS}}, /* B3P01 */
201 {{P(EMI,"d2"), RES, RES, DIS}}, /* B3P02 */
202 {{P(EMI,"d3"), RES, RES, DIS}}, /* B3P03 */
203 {{P(EMI,"d4"), RES, RES, DIS}}, /* B3P04 */
204 {{P(EMI,"d5"), RES, RES, DIS}}, /* B3P05 */
205 {{P(EMI,"d6"), RES, RES, DIS}}, /* B3P06 */
206 {{P(EMI,"d7"), RES, RES, DIS}}, /* B3P07 */
207 {{P(EMI,"d8"), RES, RES, DIS}}, /* B3P08 */
208 {{P(EMI,"d9"), RES, RES, DIS}}, /* B3P09 */
209 {{P(EMI,"d10"), RES, RES, DIS}}, /* B3P10 */
210 {{P(EMI,"d11"), RES, RES, DIS}}, /* B3P11 */
211 {{P(EMI,"d12"), RES, RES, DIS}}, /* B3P12 */
212 {{P(EMI,"d13"), RES, RES, DIS}}, /* B3P13 */
213 {{P(EMI,"d14"), RES, RES, DIS}}, /* B3P14 */
214 {{P(EMI,"d15"), RES, RES, DIS}}, /* B3P15 */
215 {{P(EMI,"dqm0"), RES, RES, DIS}}, /* B3P16 */
216 {{P(EMI,"dqm1"), RES, RES, DIS}}, /* B3P17 */
217 {{P(EMI,"dqs0"), RES, RES, DIS}}, /* B3P18 */
218 {{P(EMI,"dqs1"), RES, RES, DIS}}, /* B3P19 */
219 {{P(EMI,"clk"), RES, RES, DIS}}, /* B3P20 */
220 {{P(EMI,"clkn"), RES, RES, DIS}}, /* B3P21 */
221 {{RES, RES, RES, RES}}, /* B3P22 */
222 {{RES, RES, RES, RES}}, /* B3P23 */
223 {{RES, RES, RES, RES}}, /* B3P24 */
224 {{RES, RES, RES, RES}}, /* B3P25 */
225 {{RES, RES, RES, RES}}, /* B3P26 */
226 {{RES, RES, RES, RES}}, /* B3P27 */
227 {{RES, RES, RES, RES}}, /* B3P28 */
228 {{RES, RES, RES, RES}}, /* B3P29 */
229 {{RES, RES, RES, RES}}, /* B3P30 */
230 {{RES, RES, RES, RES}}, /* B3P31 */
231};
232
233struct pin_desc_t BANK(STMP3700,BGA169,0)[NR_PINS] =
234{
235 {{P(GPMI,"d0"), RES, RES, IO}}, /* B0P00 */
236 {{P(GPMI,"d1"), RES, Q(SSP,2,"d1"), IO}}, /* B0P01 */
237 {{P(GPMI,"d2"), RES, Q(SSP,2,"d2"), IO}}, /* B0P02 */
238 {{P(GPMI,"d3"), RES, Q(SSP,2,"d3"), IO}}, /* B0P03 */
239 {{P(GPMI,"d4"), RES, RES, IO}}, /* B0P04 */
240 {{P(GPMI,"d5"), RES, RES, IO}}, /* B0P05 */
241 {{P(GPMI,"d6"), RES, RES, IO}}, /* B0P06 */
242 {{P(GPMI,"d7"), RES, RES, IO}}, /* B0P07 */
243 {{P(GPMI,"d8"), P(EMI,"a15"), RES, IO}}, /* B0P08 */
244 {{P(GPMI,"d9"), P(EMI,"a16"), RES, IO}}, /* B0P09 */
245 {{P(GPMI,"d10"), P(EMI,"a17"), RES, IO}}, /* B0P10 */
246 {{P(GPMI,"d11"), P(EMI,"a18"), P(GPMI,"ce0n"), IO}}, /* B0P11 */
247 {{P(GPMI,"d12"), P(EMI,"a19"), P(GPMI,"ce1n"), IO}}, /* B0P12 */
248 {{P(GPMI,"d13"), P(EMI,"a20"), P(GPMI,"ce2n"), IO}}, /* B0P13 */
249 {{P(GPMI,"d14"), P(EMI,"a21"), P(GPMI,"ce3n"), IO}}, /* B0P14 */
250 {{P(GPMI,"d15"), P(EMI,"a22"), RES, IO}}, /* B0P15 */
251 {{P(GPMI,"a0"), P(EMI,"a23"), RES, IO}}, /* B0P16 */
252 {{P(GPMI,"a1"), P(EMI,"a24"), RES, IO}}, /* B0P17 */
253 {{P(GPMI,"a2"), P(EMI,"a25"), P(IrDA,"dout"), IO}}, /* B0P18 */
254 {{P(GPMI,"rb0"), RES, Q(SSP,2,"det"), IO}}, /* B0P19 */
255 {{P(GPMI,"rb2"), Q(AUART,2,"rx"), Q(SSP,2,"cmd"), IO}}, /* B0P20 */
256 {{P(GPMI,"rb3"), P(EMI,"oen"), P(IrDA,"din"), IO}}, /* B0P21 */
257 {{P(GPMI,"resetn"), P(EMI,"rstn"), P(JTAG,"trst_n"), IO}}, /* B0P22 */
258 {{P(GPMI,"irq"), Q(AUART,2,"tx"), Q(SSP,2,"sck"), IO}}, /* B0P23 */
259 {{P(GPMI,"wrn"), RES, RES, IO}}, /* B0P24 */
260 {{P(GPMI,"rdn"), RES, RES, IO}}, /* B0P25 */
261 {{Q(AUART,2,"cts"), RES, Q(SSP,1,"d4"), IO}}, /* B0P26 */
262 {{Q(AUART,2,"rts"), P(IrDA,"clk"), Q(SSP,1,"d5"), IO}}, /* B0P27 */
263 {{Q(AUART,2,"rx"), P(IrDA,"din"), Q(SSP,1,"d6"), IO}}, /* B0P28 */
264 {{Q(AUART,2,"tx"), P(IrDA,"dout"), Q(SSP,1,"d7"), IO}}, /* B0P29 */
265 {{RES, RES, RES, RES}}, /* B0P30 */
266 {{RES, RES, RES, RES}}, /* B0P31 */
267};
268
269struct pin_desc_t BANK(STMP3700,BGA169,1)[NR_PINS] =
270{
271 {{P(LCD,"d0"), P(ETM,"da0"), RES, IO}}, /* B1P00 */
272 {{P(LCD,"d1"), P(ETM,"da1"), RES, IO}}, /* B1P01 */
273 {{P(LCD,"d2"), P(ETM,"da2"), RES, IO}}, /* B1P02 */
274 {{P(LCD,"d3"), P(ETM,"da3"), RES, IO}}, /* B1P03 */
275 {{P(LCD,"d4"), P(ETM,"da4"), RES, IO}}, /* B1P04 */
276 {{P(LCD,"d5"), P(ETM,"da5"), RES, IO}}, /* B1P05 */
277 {{P(LCD,"d6"), P(ETM,"da6"), RES, IO}}, /* B1P06 */
278 {{P(LCD,"d7"), P(ETM,"da7"), RES, IO}}, /* B1P07 */
279 {{P(LCD,"d8"), P(ETM,"da0"), Q(SAIF,2,"d0"), IO}}, /* B1P08 */
280 {{P(LCD,"d9"), P(ETM,"da1"), Q(SAIF,1,"d0"), IO}}, /* B1P09 */
281 {{P(LCD,"d10"), P(ETM,"da2"), P(SAIF,"mlclk_bitclk"), IO}}, /* B1P10 */
282 {{P(LCD,"d11"), P(ETM,"da3"), P(SAIF,"lrclk"), IO}}, /* B1P11 */
283 {{P(LCD,"d12"), P(ETM,"da4"), Q(SAIF,2,"d1"), IO}}, /* B1P12 */
284 {{P(LCD,"d13"), P(ETM,"da5"), Q(SAIF,2,"d2"), IO}}, /* B1P13 */
285 {{P(LCD,"d14"), P(ETM,"da6"), Q(SAIF,1,"d2"), IO}}, /* B1P14 */
286 {{P(LCD,"d15"), P(ETM,"da7"), P(LCD,"vsync"), IO}}, /* B1P15 */
287 {{P(LCD,"reset"), RES, RES, IO}}, /* B1P16 */
288 {{P(LCD,"rs"), RES, RES, IO}}, /* B1P17 */
289 {{P(LCD,"wr"), RES, RES, IO}}, /* B1P18 */
290 {{P(LCD,"rd"), RES, RES, IO}}, /* B1P19 */
291 {{P(LCD,"enable"), RES, RES, IO}}, /* B1P20 */
292 {{P(LCD,"busy"), P(LCD,"vsync"), Q(SAIF,1,"d1"), IO}}, /* B1P21 */
293 {{Q(SSP,1,"cmd"), RES, RES, IO}}, /* B1P22 */
294 {{Q(SSP,1,"sck"), RES, RES, IO}}, /* B1P23 */
295 {{Q(SSP,1,"d0"), RES, RES, IO}}, /* B1P24 */
296 {{Q(SSP,1,"d1"), P(GPMI,"ce2n"), P(JTAG,"tclk"), IO}}, /* B1P25 */
297 {{Q(SSP,1,"d2"), Q(AUART,1,"cts"), P(JTAG,"rtclk"), IO}}, /* B1P26 */
298 {{Q(SSP,1,"d3"), Q(AUART,1,"rts"), P(JTAG,"tms"), IO}}, /* B1P27 */
299 {{Q(SSP,1,"det"), P(ETM,"psa2"), P(USB,"otg_id"), IO}}, /* B1P28 */
300 {{RES, RES, RES, RES}}, /* B1P29 */
301 {{RES, RES, RES, RES}}, /* B1P30 */
302 {{RES, RES, RES, RES}}, /* B1P31 */
303};
304
305struct pin_desc_t BANK(STMP3700,BGA169,2)[NR_PINS] =
306{
307 {{P(PWM,"0"), P(ETM,"tsynca"), P(DUART,"rx"), IO}}, /* B2P00 */
308 {{P(PWM,"1"), P(ETM,"psa1"), P(DUART,"tx"), IO}}, /* B2P01 */
309 {{P(PWM,"2"), P(SPDIF,""), P(SAIF,"alt_bitclk"), IO}}, /* B2P02 */
310 {{P(PWM,"3"), P(ETM,"psa0"), Q(AUART,2,"cts"), IO}}, /* B2P03 */
311 {{P(PWM,"4"), P(ETM,"tclk"), Q(AUART,2,"rts"), IO}}, /* B2P04 */
312 {{P(I2C,"scl"), P(GPMI,"rb3"), RES, IO}}, /* B2P05 */
313 {{P(I2C,"sd"), P(GPMI,"ce3n"), RES, IO}}, /* B2P06 */
314 {{P(TIMROT,"1"), Q(AUART,1,"tx"), P(JTAG,"tdo"), IO}}, /* B2P07 */
315 {{P(TIMROT,"2"), Q(AUART,1,"rx"), P(JTAG,"tdi"), IO}}, /* B2P08 */
316 {{P(EMI,"cke"), RES, RES, IO}}, /* B2P09 */
317 {{P(EMI,"rasn"), RES, RES, IO}}, /* B2P10 */
318 {{P(EMI,"casn"), RES, RES, IO}}, /* B2P11 */
319 {{P(EMI,"ce0n"), P(GPMI,"ce2n"), RES, IO}}, /* B2P12 */
320 {{P(EMI,"ce1n"), P(GPMI,"ce3n"), P(IrDA,"clk"), IO}}, /* B2P13 */
321 {{P(EMI,"ce2n"), P(GPMI,"ce1n"), Q(SSP,2,"d0"), IO}}, /* B2P14 */
322 {{P(EMI,"ce3n"), P(GPMI,"ce0n"), RES, IO}}, /* B2P15 */
323 {{P(EMI,"a00"), RES, RES, IO}}, /* B2P16 */
324 {{P(EMI,"a01"), RES, RES, IO}}, /* B2P17 */
325 {{P(EMI,"a02"), RES, RES, IO}}, /* B2P18 */
326 {{P(EMI,"a03"), RES, RES, IO}}, /* B2P19 */
327 {{P(EMI,"a04"), RES, RES, IO}}, /* B2P20 */
328 {{P(EMI,"a05"), RES, RES, IO}}, /* B2P21 */
329 {{P(EMI,"a06"), RES, RES, IO}}, /* B2P22 */
330 {{P(EMI,"a07"), RES, RES, IO}}, /* B2P23 */
331 {{P(EMI,"a08"), RES, RES, IO}}, /* B2P24 */
332 {{P(EMI,"a08"), RES, RES, IO}}, /* B2P25 */
333 {{P(EMI,"a10"), RES, RES, IO}}, /* B2P26 */
334 {{P(EMI,"a11"), RES, RES, IO}}, /* B2P27 */
335 {{P(EMI,"a12"), RES, RES, IO}}, /* B2P28 */
336 {{P(EMI,"a13"), RES, RES, IO}}, /* B2P29 */
337 {{P(EMI,"a14"), RES, RES, IO}}, /* B2P30 */
338 {{P(EMI,"wen"), RES, RES, IO}}, /* B2P31 */
339};
340
341struct pin_desc_t BANK(STMP3700,BGA169,3)[NR_PINS] =
342{
343 {{P(EMI,"d0"), RES, RES, DIS}}, /* B3P00 */
344 {{P(EMI,"d1"), RES, RES, DIS}}, /* B3P01 */
345 {{P(EMI,"d2"), RES, RES, DIS}}, /* B3P02 */
346 {{P(EMI,"d3"), RES, RES, DIS}}, /* B3P03 */
347 {{P(EMI,"d4"), RES, RES, DIS}}, /* B3P04 */
348 {{P(EMI,"d5"), RES, RES, DIS}}, /* B3P05 */
349 {{P(EMI,"d6"), RES, RES, DIS}}, /* B3P06 */
350 {{P(EMI,"d7"), RES, RES, DIS}}, /* B3P07 */
351 {{P(EMI,"d8"), RES, RES, DIS}}, /* B3P08 */
352 {{P(EMI,"d9"), RES, RES, DIS}}, /* B3P09 */
353 {{P(EMI,"d10"), RES, RES, DIS}}, /* B3P10 */
354 {{P(EMI,"d11"), RES, RES, DIS}}, /* B3P11 */
355 {{P(EMI,"d12"), RES, RES, DIS}}, /* B3P12 */
356 {{P(EMI,"d13"), RES, RES, DIS}}, /* B3P13 */
357 {{P(EMI,"d14"), RES, RES, DIS}}, /* B3P14 */
358 {{P(EMI,"d15"), RES, RES, DIS}}, /* B3P15 */
359 {{P(EMI,"dqm0"), RES, RES, DIS}}, /* B3P16 */
360 {{P(EMI,"dqm1"), RES, RES, DIS}}, /* B3P17 */
361 {{P(EMI,"dqs0"), RES, RES, DIS}}, /* B3P18 */
362 {{P(EMI,"dqs1"), RES, RES, DIS}}, /* B3P19 */
363 {{P(EMI,"clk"), RES, RES, DIS}}, /* B3P20 */
364 {{P(EMI,"clkn"), RES, RES, DIS}}, /* B3P21 */
365 {{RES, RES, RES, RES}}, /* B3P22 */
366 {{RES, RES, RES, RES}}, /* B3P23 */
367 {{RES, RES, RES, RES}}, /* B3P24 */
368 {{RES, RES, RES, RES}}, /* B3P25 */
369 {{RES, RES, RES, RES}}, /* B3P26 */
370 {{RES, RES, RES, RES}}, /* B3P27 */
371 {{RES, RES, RES, RES}}, /* B3P28 */
372 {{RES, RES, RES, RES}}, /* B3P29 */
373 {{RES, RES, RES, RES}}, /* B3P30 */
374 {{RES, RES, RES, RES}}, /* B3P31 */
375};
376
377/* B0P{26-29}: might be ssp1_d{4-7} */
378struct pin_desc_t BANK(STMP3700,LQFP100,0)[NR_PINS] =
379{
380 {{RES, RES, RES, RES}}, /* B0P00 */
381 {{RES, RES, Q(SSP,2,"d1"), IO}}, /* B0P01 */
382 {{RES, RES, Q(SSP,2,"d2"), IO}}, /* B0P02 */
383 {{RES, RES, Q(SSP,2,"d3"), IO}}, /* B0P03 */
384 {{RES, RES, Q(SSP,2,"d4"), IO}}, /* B0P04 */
385 {{RES, RES, Q(SSP,2,"d5"), IO}}, /* B0P05 */
386 {{RES, RES, Q(SSP,2,"d6"), IO}}, /* B0P06 */
387 {{RES, RES, Q(SSP,2,"d7"), IO}}, /* B0P07 */
388 {{RES, RES, RES, RES}}, /* B0P08 */
389 {{RES, RES, RES, RES}}, /* B0P09 */
390 {{RES, RES, RES, RES}}, /* B0P10 */
391 {{RES, RES, RES, RES}}, /* B0P11 */
392 {{RES, RES, RES, RES}}, /* B0P12 */
393 {{RES, RES, RES, RES}}, /* B0P13 */
394 {{RES, RES, RES, RES}}, /* B0P14 */
395 {{RES, RES, RES, RES}}, /* B0P15 */
396 {{RES, RES, RES, RES}}, /* B0P16 */
397 {{RES, RES, RES, RES}}, /* B0P17 */
398 {{RES, RES, RES, RES}}, /* B0P18 */
399 {{RES, RES, RES, RES}}, /* B0P19 */
400 {{RES, RES, Q(SSP,2,"cmd"), IO}}, /* B0P20 */
401 {{RES, RES, RES, RES}}, /* B0P21 */
402 {{RES, RES, RES, RES}}, /* B0P22 */
403 {{RES, RES, RES, RES}}, /* B0P23 */
404 {{RES, RES, Q(SSP,2,"sck"), IO}}, /* B0P24 */
405 {{RES, RES, RES, RES}}, /* B0P25 */
406 {{RES, RES, RES, RES}}, /* B0P26 */
407 {{RES, RES, RES, RES}}, /* B0P27 */
408 {{RES, RES, RES, RES}}, /* B0P28 */
409 {{RES, RES, RES, RES}}, /* B0P29 */
410 {{RES, RES, RES, RES}}, /* B0P30 */
411 {{RES, RES, RES, RES}}, /* B0P31 */
412};
413
414/* unsure about precise lcd functions */
415struct pin_desc_t BANK(STMP3700,LQFP100,1)[NR_PINS] =
416{
417 {{P(LCD,"d0"), RES, RES, IO}}, /* B1P00 */
418 {{P(LCD,"d1"), RES, RES, IO}}, /* B1P01 */
419 {{P(LCD,"d2"), RES, RES, IO}}, /* B1P02 */
420 {{P(LCD,"d3"), RES, RES, IO}}, /* B1P03 */
421 {{P(LCD,"d4"), RES, RES, IO}}, /* B1P04 */
422 {{P(LCD,"d5"), RES, RES, IO}}, /* B1P05 */
423 {{P(LCD,"d6"), RES, RES, IO}}, /* B1P06 */
424 {{P(LCD,"d7"), RES, RES, IO}}, /* B1P07 */
425 {{RES, RES, RES, RES}}, /* B1P08 */
426 {{RES, RES, RES, RES}}, /* B1P09 */
427 {{RES, RES, RES, RES}}, /* B1P10 */
428 {{RES, RES, RES, RES}}, /* B1P11 */
429 {{RES, RES, RES, RES}}, /* B1P12 */
430 {{RES, RES, RES, RES}}, /* B1P13 */
431 {{RES, RES, RES, RES}}, /* B1P14 */
432 {{RES, RES, RES, RES}}, /* B1P15 */
433 {{P(LCD,"reset"), RES, RES, IO}}, /* B1P16 */
434 {{P(LCD,"rs"), RES, RES, IO}}, /* B1P17 */
435 {{P(LCD,"wr"), RES, RES, IO}}, /* B1P18 */
436 {{P(LCD,"rs"), RES, RES, IO}}, /* B1P19 */
437 {{P(LCD,"enable"), RES, RES, IO}}, /* B1P20 */
438 {{RES, P(LCD,"busy"), RES, RES}}, /* B1P21 */
439 {{Q(SSP,1,"cmd"), RES, RES, IO}}, /* B1P22 */
440 {{Q(SSP,1,"sck"), RES, RES, IO}}, /* B1P23 */
441 {{Q(SSP,1,"d0"), RES, RES, IO}}, /* B1P24 */
442 {{Q(SSP,1,"d1"), RES, RES, IO}}, /* B1P25 */
443 {{Q(SSP,1,"d2"), RES, RES, IO}}, /* B1P26 */
444 {{Q(SSP,1,"d3"), RES, RES, IO}}, /* B1P27 */
445 {{Q(SSP,1,"det"), RES, RES, IO}}, /* B1P28 */
446 {{RES, RES, RES, RES}}, /* B1P29 */
447 {{RES, RES, RES, RES}}, /* B1P30 */
448 {{RES, RES, RES, RES}}, /* B1P31 */
449};
450
451struct pin_desc_t BANK(STMP3700,LQFP100,2)[NR_PINS] =
452{
453 {{RES, RES, RES, IO}}, /* B2P00 */
454 {{RES, RES, RES, IO}}, /* B2P01 */
455 {{RES, RES, RES, IO}}, /* B2P02 */
456 {{RES, RES, RES, IO}}, /* B2P03 */
457 {{RES, RES, RES, IO}}, /* B2P04 */
458 {{RES, RES, RES, IO}}, /* B2P05 */
459 {{RES, RES, RES, IO}}, /* B2P06 */
460 {{RES, RES, RES, IO}}, /* B2P07 */
461 {{RES, RES, RES, RES}}, /* B2P08 */
462 {{RES, RES, RES, RES}}, /* B2P09 */
463 {{RES, RES, RES, RES}}, /* B2P10 */
464 {{RES, RES, RES, RES}}, /* B2P11 */
465 {{RES, RES, RES, RES}}, /* B2P12 */
466 {{RES, RES, RES, RES}}, /* B2P13 */
467 {{RES, RES, Q(SSP,2,"d0"), IO}}, /* B2P14 */
468 {{RES, RES, RES, RES}}, /* B2P15 */
469 {{RES, RES, RES, RES}}, /* B2P16 */
470 {{RES, RES, RES, RES}}, /* B2P17 */
471 {{RES, RES, RES, RES}}, /* B2P18 */
472 {{RES, RES, RES, RES}}, /* B2P19 */
473 {{RES, RES, RES, RES}}, /* B2P20 */
474 {{RES, RES, RES, RES}}, /* B2P21 */
475 {{RES, RES, RES, RES}}, /* B2P22 */
476 {{RES, RES, RES, RES}}, /* B2P23 */
477 {{RES, RES, RES, RES}}, /* B2P24 */
478 {{RES, RES, RES, RES}}, /* B2P25 */
479 {{RES, RES, RES, RES}}, /* B2P26 */
480 {{RES, RES, RES, RES}}, /* B2P27 */
481 {{RES, RES, RES, RES}}, /* B2P28 */
482 {{RES, RES, RES, RES}}, /* B2P29 */
483 {{RES, RES, RES, RES}}, /* B2P30 */
484 {{RES, RES, RES, RES}}, /* B2P31 */
485};
486
487struct pin_desc_t BANK(STMP3700,LQFP100,3)[NR_PINS] =
488{
489 {{RES, RES, RES, DIS}}, /* B3P00 */
490 {{RES, RES, RES, DIS}}, /* B3P01 */
491 {{RES, RES, RES, DIS}}, /* B3P02 */
492 {{RES, RES, RES, DIS}}, /* B3P03 */
493 {{RES, RES, RES, DIS}}, /* B3P04 */
494 {{RES, RES, RES, DIS}}, /* B3P05 */
495 {{RES, RES, RES, DIS}}, /* B3P06 */
496 {{RES, RES, RES, DIS}}, /* B3P07 */
497 {{RES, RES, RES, DIS}}, /* B3P08 */
498 {{RES, RES, RES, DIS}}, /* B3P09 */
499 {{RES, RES, RES, DIS}}, /* B3P10 */
500 {{RES, RES, RES, DIS}}, /* B3P11 */
501 {{RES, RES, RES, DIS}}, /* B3P12 */
502 {{RES, RES, RES, DIS}}, /* B3P13 */
503 {{RES, RES, RES, DIS}}, /* B3P14 */
504 {{RES, RES, RES, DIS}}, /* B3P15 */
505 {{RES, RES, RES, DIS}}, /* B3P16 */
506 {{RES, RES, RES, DIS}}, /* B3P17 */
507 {{RES, RES, RES, DIS}}, /* B3P18 */
508 {{RES, RES, RES, DIS}}, /* B3P19 */
509 {{RES, RES, RES, DIS}}, /* B3P20 */
510 {{RES, RES, RES, DIS}}, /* B3P21 */
511 {{RES, RES, RES, RES}}, /* B3P22 */
512 {{RES, RES, RES, RES}}, /* B3P23 */
513 {{RES, RES, RES, RES}}, /* B3P24 */
514 {{RES, RES, RES, RES}}, /* B3P25 */
515 {{RES, RES, RES, RES}}, /* B3P26 */
516 {{RES, RES, RES, RES}}, /* B3P27 */
517 {{RES, RES, RES, RES}}, /* B3P28 */
518 {{RES, RES, RES, RES}}, /* B3P29 */
519 {{RES, RES, RES, RES}}, /* B3P30 */
520 {{RES, RES, RES, RES}}, /* B3P31 */
521};
522
523struct pin_desc_t BANK(STMP3600,BGA169,0)[NR_PINS] =
524{
525 {{P(GPMI,"d0"), RES, RES, IO}}, /* B0P00 */
526 {{P(GPMI,"d1"), RES, RES, IO}}, /* B0P01 */
527 {{P(GPMI,"d2"), RES, RES, IO}}, /* B0P02 */
528 {{P(GPMI,"d3"), RES, RES, IO}}, /* B0P03 */
529 {{P(GPMI,"d4"), RES, RES, IO}}, /* B0P04 */
530 {{P(GPMI,"d5"), RES, RES, IO}}, /* B0P05 */
531 {{P(GPMI,"d6"), RES, RES, IO}}, /* B0P06 */
532 {{P(GPMI,"d7"), RES, RES, IO}}, /* B0P07 */
533 {{P(GPMI,"d8"), P(EMI,"a15"), RES, IO}}, /* B0P08 */
534 {{P(GPMI,"d9"), P(EMI,"a16"), RES, IO}}, /* B0P09 */
535 {{P(GPMI,"d10"), P(EMI,"a17"), RES, IO}}, /* B0P10 */
536 {{P(GPMI,"d11"), P(EMI,"a18"), RES, IO}}, /* B0P11 */
537 {{P(GPMI,"d12"), P(EMI,"a19"), P(GPMI,"ce0n"), IO}}, /* B0P12 */
538 {{P(GPMI,"d13"), P(EMI,"a20"), P(GPMI,"ce1n"), IO}}, /* B0P13 */
539 {{P(GPMI,"d14"), P(EMI,"a21"), P(GPMI,"ce2n"), IO}}, /* B0P14 */
540 {{P(GPMI,"d15"), P(EMI,"a22"), P(GPMI,"ce3n"), IO}}, /* B0P15 */
541 {{P(GPMI,"irq"), RES, RES, IO}}, /* B0P16 */
542 {{P(GPMI,"rdn"), RES, RES, IO}}, /* B0P17 */
543 {{P(GPMI,"rdy"), RES, RES, IO}}, /* B0P18 */
544 {{P(GPMI,"rdy3"), P(EMI,"oen"), RES, IO}}, /* B0P19 */
545 {{P(GPMI,"rdy2"), RES, RES, IO}}, /* B0P20 */
546 {{P(GPMI,"wrn"), RES, RES, IO}}, /* B0P21 */
547 {{P(GPMI,"a0"), P(EMI,"a23"), RES, IO}}, /* B0P22 */
548 {{P(GPMI,"a1"), P(EMI,"a24"), RES, IO}}, /* B0P23 */
549 {{P(GPMI,"a2"), P(EMI,"a25"), RES, IO}}, /* B0P24 */
550 {{P(SSP,"det"), RES, P(ETM,"rtck"), IO}}, /* B0P25 */
551 {{P(SSP,"cmd"), RES, RES, IO}}, /* B0P26 */
552 {{P(SSP,"sck"), RES, RES, IO}}, /* B0P27 */
553 {{P(SSP,"d0"), RES, RES, IO}}, /* B0P28 */
554 {{P(SSP,"d1"), RES, RES, IO}}, /* B0P29 */
555 {{P(SSP,"d2"), RES, RES, IO}}, /* B0P30 */
556 {{P(SSP,"d3"), RES, RES, IO}}, /* B0P31 */
557};
558
559struct pin_desc_t BANK(STMP3600,BGA169,1)[NR_PINS] =
560{
561 {{P(LCD,"d0"), P(ETM,"da0"), RES, IO}}, /* B1P00 */
562 {{P(LCD,"d1"), P(ETM,"da1"), RES, IO}}, /* B1P01 */
563 {{P(LCD,"d2"), P(ETM,"da2"), RES, IO}}, /* B1P02 */
564 {{P(LCD,"d3"), P(ETM,"da3"), RES, IO}}, /* B1P03 */
565 {{P(LCD,"d4"), P(ETM,"da4"), RES, IO}}, /* B1P04 */
566 {{P(LCD,"d5"), P(ETM,"da5"), RES, IO}}, /* B1P05 */
567 {{P(LCD,"d6"), P(ETM,"da6"), RES, IO}}, /* B1P06 */
568 {{P(LCD,"d7"), P(ETM,"da7"), RES, IO}}, /* B1P07 */
569 {{P(LCD,"d8"), P(ETM,"db0"), RES, IO}}, /* B1P08 */
570 {{P(LCD,"d9"), P(ETM,"db1"), RES, IO}}, /* B1P09 */
571 {{P(LCD,"d10"), P(ETM,"db2"), RES, IO}}, /* B1P10 */
572 {{P(LCD,"d11"), P(ETM,"db3"), RES, IO}}, /* B1P11 */
573 {{P(LCD,"d12"), P(ETM,"db4"), RES, IO}}, /* B1P12 */
574 {{P(LCD,"d13"), P(ETM,"db5"), RES, IO}}, /* B1P13 */
575 {{P(LCD,"d14"), P(ETM,"db6"), RES, IO}}, /* B1P14 */
576 {{P(LCD,"d15"), P(ETM,"db7"), P(ETM,"rtck"), IO}}, /* B1P15 */
577 {{P(LCD,"reset"), P(ETM,"psa1"), RES, IO}}, /* B1P16 */
578 {{P(LCD,"rs"), P(ETM,"psa0"), RES, IO}}, /* B1P17 */
579 {{P(LCD,"wr"), P(ETM,"psa2"), RES, IO}}, /* B1P18 */
580 {{P(LCD,"cs"), P(ETM,"tclk"), RES, IO}}, /* B1P19 */
581 {{P(GPMI,"resetn"), P(EMI,"reset"), RES, IO}}, /* B1P20 */
582 {{P(LCD,"busy"), RES, RES, IO}}, /* B1P21 */
583 {{P(AUART,"cts"), RES, RES, IO}}, /* B1P22 */
584 {{P(AUART,"rts"), RES, P(IrDA,"clk"), IO}}, /* B1P23 */
585 {{P(AUART,"rx"), RES, RES, IO}}, /* B1P24 */
586 {{P(AUART,"tx"), RES, RES, IO}}, /* B1P25 */
587 {{RES, RES, RES, IO}}, /* B1P26 */
588 {{RES, RES, RES, IO}}, /* B1P27 */
589 {{RES, RES, RES, IO}}, /* B1P28 */
590 {{RES, RES, RES, IO}}, /* B1P29 */
591 {{RES, RES, RES, IO}}, /* B1P30 */
592 {{RES, RES, RES, IO}}, /* B1P31 */
593};
594
595struct pin_desc_t BANK(STMP3600,BGA169,2)[NR_PINS] =
596{
597 {{P(EMI,"d0"), RES, RES, IO}}, /* B2P00 */
598 {{P(EMI,"d1"), RES, RES, IO}}, /* B2P01 */
599 {{P(EMI,"d2"), RES, RES, IO}}, /* B2P02 */
600 {{P(EMI,"d3"), RES, RES, IO}}, /* B2P03 */
601 {{P(EMI,"d4"), RES, RES, IO}}, /* B2P04 */
602 {{P(EMI,"d5"), RES, RES, IO}}, /* B2P05 */
603 {{P(EMI,"d6"), RES, RES, IO}}, /* B2P06 */
604 {{P(EMI,"d7"), RES, RES, IO}}, /* B2P07 */
605 {{P(EMI,"d8"), RES, RES, IO}}, /* B2P08 */
606 {{P(EMI,"d9"), RES, RES, IO}}, /* B2P09 */
607 {{P(EMI,"d10"), RES, RES, IO}}, /* B2P10 */
608 {{P(EMI,"d11"), RES, RES, IO}}, /* B2P11 */
609 {{P(EMI,"d12"), RES, RES, IO}}, /* B2P12 */
610 {{P(EMI,"d13"), RES, RES, IO}}, /* B2P13 */
611 {{P(EMI,"d14"), RES, RES, IO}}, /* B2P14 */
612 {{P(EMI,"d15"), RES, RES, IO}}, /* B2P15 */
613 {{P(EMI,"a0"), RES, RES, IO}}, /* B2P16 */
614 {{P(EMI,"a1"), RES, RES, IO}}, /* B2P17 */
615 {{P(EMI,"a2"), RES, RES, IO}}, /* B2P18 */
616 {{P(EMI,"a3"), RES, RES, IO}}, /* B2P19 */
617 {{P(EMI,"a4"), RES, RES, IO}}, /* B2P20 */
618 {{P(EMI,"a5"), RES, RES, IO}}, /* B2P21 */
619 {{P(EMI,"a6"), RES, RES, IO}}, /* B2P22 */
620 {{P(EMI,"a7"), RES, RES, IO}}, /* B2P23 */
621 {{P(EMI,"a8"), RES, RES, IO}}, /* B2P24 */
622 {{P(EMI,"a9"), RES, RES, IO}}, /* B2P25 */
623 {{P(EMI,"a10"), RES, RES, IO}}, /* B2P26 */
624 {{P(EMI,"a11"), RES, RES, IO}}, /* B2P27 */
625 {{P(EMI,"a12"), RES, RES, IO}}, /* B2P28 */
626 {{P(EMI,"a13"), RES, RES, IO}}, /* B2P29 */
627 {{P(EMI,"a14"), RES, RES, IO}}, /* B2P30 */
628 {{P(EMI,"rasn"), RES, RES, IO}}, /* B2P31 */
629};
630
631struct pin_desc_t BANK(STMP3600,BGA169,3)[NR_PINS] =
632{
633 {{P(EMI,"ce0n"), P(GPMI,"ce0n"), RES, IO}}, /* B3P00 */
634 {{P(EMI,"ce1n"), P(GPMI,"ce1n"), RES, IO}}, /* B3P01 */
635 {{P(EMI,"ce2n"), P(GPMI,"ce2n"), RES, IO}}, /* B3P02 */
636 {{P(EMI,"ce3n"), P(GPMI,"ce3n"), RES, IO}}, /* B3P03 */
637 {{P(EMI,"clk"), RES, RES, IO}}, /* B3P04 */
638 {{P(EMI,"cke"), RES, RES, IO}}, /* B3P05 */
639 {{P(EMI,"casn"), RES, RES, IO}}, /* B3P06 */
640 {{P(EMI,"dqm0"), RES, RES, IO}}, /* B3P07 */
641 {{P(EMI,"dqm1"), RES, RES, IO}}, /* B3P08 */
642 {{P(EMI,"wen"), RES, RES, IO}}, /* B3P09 */
643 {{P(PWM,"0"), P(ETM,"tsynca"), P(DUART,"rx"), IO}}, /* B3P10 */
644 {{P(PWM,"1"), P(ETM,"tsyncb"), P(DUART,"tx"), IO}}, /* B3P11 */
645 {{P(PWM,"2"), P(ETM,"psb2"), P(ETM,"rtclk"), IO}}, /* B3P12 */
646 {{P(PWM,"3"), P(ETM,"psb0"), P(SPDIF,""), IO}}, /* B3P13 */
647 {{P(PWM,"4"), P(ETM,"psb1"), RES, IO}}, /* B3P14 */
648 {{P(TIMROT,"rotarya"), RES, RES, IO}}, /* B3P15 */
649 {{P(TIMROT,"rotaryb"), RES, RES, IO}}, /* B3P16 */
650 {{P(I2C,"scl"), RES, RES, IO}}, /* B3P17 */
651 {{P(I2C,"sda"), RES, RES, IO}}, /* B3P18 */
652 {{RES, RES, RES, IO}}, /* B3P19 */
653 {{RES, RES, RES, IO}}, /* B3P20 */
654 {{RES, RES, RES, IO}}, /* B3P21 */
655 {{RES, RES, RES, IO}}, /* B3P22 */
656 {{RES, RES, RES, IO}}, /* B3P23 */
657 {{RES, RES, RES, IO}}, /* B3P24 */
658 {{RES, RES, RES, IO}}, /* B3P25 */
659 {{RES, RES, RES, IO}}, /* B3P26 */
660 {{RES, RES, RES, IO}}, /* B3P27 */
661 {{RES, RES, RES, IO}}, /* B3P28 */
662 {{RES, RES, RES, IO}}, /* B3P29 */
663 {{RES, RES, RES, IO}}, /* B3P30 */
664 {{RES, RES, RES, IO}}, /* B3P31 */
665};
666
667#define SOC(soc, ver) soc##_##ver
668
669struct bank_map_t SOC(IMX233,BGA169)[NR_BANKS] =
670{
671 {BANK(IMX233,BGA169,0)},
672 {BANK(IMX233,BGA169,1)},
673 {BANK(IMX233,BGA169,2)},
674 {BANK(IMX233,BGA169,3)},
675};
676
677struct bank_map_t SOC(STMP3700,BGA169)[NR_BANKS] =
678{
679 {BANK(STMP3700,BGA169,0)},
680 {BANK(STMP3700,BGA169,1)},
681 {BANK(STMP3700,BGA169,2)},
682 {BANK(STMP3700,BGA169,3)},
683};
684
685struct bank_map_t SOC(STMP3700,LQFP100)[NR_BANKS] =
686{
687 {BANK(STMP3700,LQFP100,0)},
688 {BANK(STMP3700,LQFP100,1)},
689 {BANK(STMP3700,LQFP100,2)},
690 {BANK(STMP3700,LQFP100,3)},
691};
692
693struct bank_map_t SOC(STMP3600,BGA169)[NR_BANKS] =
694{
695 {BANK(STMP3600,BGA169,0)},
696 {BANK(STMP3600,BGA169,1)},
697 {BANK(STMP3600,BGA169,2)},
698 {BANK(STMP3600,BGA169,3)},
699};
700
701#undef P
702#undef Q
703#undef R
704#undef IO
705#undef DIS
706#undef RES
707
708struct soc_t socs [] =
709{
710 {"imx233", "bga169", SOC(IMX233,BGA169)},
711 {"stmp3700", "bga169", SOC(STMP3700,BGA169)},
712 {"stmp3700", "lqfp100", SOC(STMP3700,LQFP100)},
713 {"stmp3600", "bga169", SOC(STMP3600,BGA169)},
714};
715
716#define NR_SOCS (sizeof(socs) / sizeof(socs[0])) \ No newline at end of file
diff --git a/utils/imxtools/misc/wiki_gen.c b/utils/imxtools/misc/wiki_gen.c
new file mode 100644
index 0000000000..8341c21712
--- /dev/null
+++ b/utils/imxtools/misc/wiki_gen.c
@@ -0,0 +1,100 @@
1#include <stdio.h>
2#include <stdlib.h>
3#include <stdbool.h>
4#include <stdint.h>
5#include <string.h>
6
7#include "map.h"
8
9const char *pin_group_color(unsigned group, unsigned block)
10{
11 (void)block;
12 switch(group)
13 {
14 case PIN_GROUP_EMI: return "RED";
15 case PIN_GROUP_GPIO: return "TEAL";
16 case PIN_GROUP_I2C: return "PURPLE";
17 case PIN_GROUP_JTAG: return "RED";
18 case PIN_GROUP_PWM: return "OLIVE";
19 case PIN_GROUP_SPDIF: return "OLIVE";
20 case PIN_GROUP_TIMROT: return "PINK";
21 case PIN_GROUP_AUART: return "GREEN";
22 case PIN_GROUP_ETM: return "RED";
23 case PIN_GROUP_GPMI: return "ORANGE";
24 case PIN_GROUP_IrDA: return "OLIVE";
25 case PIN_GROUP_LCD: return "TEAL";
26 case PIN_GROUP_SAIF: return "ORANGE";
27 case PIN_GROUP_SSP: return "PURPLE";
28 case PIN_GROUP_DUART: return "GRAY";
29 case PIN_GROUP_USB: return "LIME";
30 case PIN_GROUP_NONE: return NULL;
31 default: return NULL;
32 }
33}
34
35int main(int argc, char **argv)
36{
37 if(argc != 3)
38 {
39 printf("usage: %s <soc> <ver>\n", argv[0]);
40 printf(" where <soc> is stmp3700 or imx233\n");
41 printf(" where <ver> is bga169 or lqfp128\n");
42 return 1;
43 }
44
45 const char *soc = argv[1];
46 const char *ver = argv[2];
47
48 struct bank_map_t *map = NULL;
49 for(unsigned i = 0; i < NR_SOCS; i++)
50 if(strcmp(soc, socs[i].soc) == 0 && strcmp(ver, socs[i].ver) == 0)
51 map = socs[i].map;
52 if(map == NULL)
53 {
54 printf("no valid map found\n");
55 return 4;
56 }
57
58 for(unsigned bank = 0; bank < NR_BANKS; bank++)
59 {
60 for(unsigned offset = 0; offset < 2; offset ++)
61 {
62 printf("| *Bank %d* |", bank);
63 for(unsigned count = 0; count < 16; count++)
64 printf(" *%d* ||", offset * 16 + 15 - count);
65 printf("\n");
66 printf("| *Mux Reg %d* |", bank * 2 + offset);
67 for(unsigned count = 0; count < 32; count++)
68 printf(" *%d* |", 31 - count);
69 printf("\n");
70
71 for(unsigned function = 0; function < NR_FUNCTIONS; function++)
72 {
73 printf("| *select = %d* |", function);
74 for(unsigned count = 0; count < 16; count++)
75 {
76 unsigned pin_nr = offset * 16 + 15 - count;
77 struct pin_function_desc_t *desc = &map[bank].pins[pin_nr].function[function];
78 const char *color = pin_group_color(desc->group, desc->block);
79 printf(" ");
80 if(color)
81 printf("%%%s%%", color);
82 if(desc->name)
83 printf("%s", desc->name);
84 if(color)
85 printf("%%ENDCOLOR%%");
86 printf(" ||");
87 }
88 printf("\n");
89 }
90
91 printf("| |");
92 for(unsigned count = 0; count < 16; count++)
93 printf("||");
94 printf("\n");
95 }
96 }
97
98 return 0;
99}
100
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-24 01:26:04 +0000