summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAmaury Pouly <amaury.pouly@gmail.com>2012-12-26 21:23:59 +0100
committerAmaury Pouly <amaury.pouly@gmail.com>2012-12-26 21:26:33 +0100
commit8ecbcad3d13d41ef9cff6d20149df1645f63aae0 (patch)
tree6fae782c63811ae1bf5882e9768b23fa12dd1556
parente3fbced28323e21c8826adaf66521111e754d017 (diff)
downloadrockbox-8ecbcad3d13d41ef9cff6d20149df1645f63aae0.tar.gz
rockbox-8ecbcad3d13d41ef9cff6d20149df1645f63aae0.zip
imx233: use tick insteaf of msec to collect statistics
The current code uses the msec irq to collect statistics and detect irq storms (debug). But this irq is triggered 1000 times per sec and we don't need that accuracy. This commit removes the msec irq and use the tick timer instead which is triggered only 100 times per second. Change-Id: If14b9503c89a3af370ef322678f10e35fafb4b8a
-rw-r--r--firmware/target/arm/imx233/icoll-imx233.c16
-rw-r--r--firmware/target/arm/imx233/kernel-imx233.c10
-rw-r--r--firmware/target/arm/imx233/kernel-imx233.h10
3 files changed, 18 insertions, 18 deletions
diff --git a/firmware/target/arm/imx233/icoll-imx233.c b/firmware/target/arm/imx233/icoll-imx233.c
index 4e0d525da3..8f8e3c0c9a 100644
--- a/firmware/target/arm/imx233/icoll-imx233.c
+++ b/firmware/target/arm/imx233/icoll-imx233.c
@@ -21,6 +21,7 @@
21 21
22#include "icoll-imx233.h" 22#include "icoll-imx233.h"
23#include "rtc-imx233.h" 23#include "rtc-imx233.h"
24#include "kernel-imx233.h"
24#include "string.h" 25#include "string.h"
25 26
26#define default_interrupt(name) \ 27#define default_interrupt(name) \
@@ -61,6 +62,7 @@ default_interrupt(INT_ADC_DMA);
61default_interrupt(INT_ADC_ERROR); 62default_interrupt(INT_ADC_ERROR);
62default_interrupt(INT_DCP); 63default_interrupt(INT_DCP);
63default_interrupt(INT_TOUCH_DETECT); 64default_interrupt(INT_TOUCH_DETECT);
65default_interrupt(INT_RTC_1MSEC);
64 66
65void INT_RTC_1MSEC(void); 67void INT_RTC_1MSEC(void);
66 68
@@ -102,8 +104,8 @@ static isr_t isr_table[INT_SRC_NR_SOURCES] =
102 [INT_SRC_RTC_1MSEC] = INT_RTC_1MSEC, 104 [INT_SRC_RTC_1MSEC] = INT_RTC_1MSEC,
103}; 105};
104 106
105#define IRQ_STORM_DELAY 1000 /* ms */ 107#define IRQ_STORM_DELAY 100 /* ms */
106#define IRQ_STORM_THRESHOLD 100000 /* allows irq / delay */ 108#define IRQ_STORM_THRESHOLD 10000 /* allows irq / delay */
107 109
108static uint32_t irq_count_old[INT_SRC_NR_SOURCES]; 110static uint32_t irq_count_old[INT_SRC_NR_SOURCES];
109static uint32_t irq_count[INT_SRC_NR_SOURCES]; 111static uint32_t irq_count[INT_SRC_NR_SOURCES];
@@ -116,16 +118,15 @@ struct imx233_icoll_irq_info_t imx233_icoll_get_irq_info(int src)
116 return info; 118 return info;
117} 119}
118 120
119void INT_RTC_1MSEC(void) 121static void do_irq_stat(void)
120{ 122{
121 static unsigned counter = 0; 123 static unsigned counter = 0;
122 if(counter++ >= IRQ_STORM_DELAY) 124 if(counter++ >= HZ)
123 { 125 {
124 counter = 0; 126 counter = 0;
125 memcpy(irq_count_old, irq_count, sizeof(irq_count)); 127 memcpy(irq_count_old, irq_count, sizeof(irq_count));
126 memset(irq_count, 0, sizeof(irq_count)); 128 memset(irq_count, 0, sizeof(irq_count));
127 } 129 }
128 imx233_rtc_clear_msec_irq();
129} 130}
130 131
131static void UIRQ(void) 132static void UIRQ(void)
@@ -140,6 +141,8 @@ void irq_handler(void)
140 int irq_nr = (HW_ICOLL_VECTOR - HW_ICOLL_VBASE) / 4; 141 int irq_nr = (HW_ICOLL_VECTOR - HW_ICOLL_VBASE) / 4;
141 if(irq_count[irq_nr]++ > IRQ_STORM_THRESHOLD) 142 if(irq_count[irq_nr]++ > IRQ_STORM_THRESHOLD)
142 panicf("IRQ %d: storm detected", irq_nr); 143 panicf("IRQ %d: storm detected", irq_nr);
144 if(irq_nr == INT_SRC_TIMER(TICK_TIMER_NR))
145 do_irq_stat();
143 (*(isr_t *)HW_ICOLL_VECTOR)(); 146 (*(isr_t *)HW_ICOLL_VECTOR)();
144 /* acknowledge completion of IRQ (all use the same priority 0) */ 147 /* acknowledge completion of IRQ (all use the same priority 0) */
145 HW_ICOLL_LEVELACK = HW_ICOLL_LEVELACK__LEVEL0; 148 HW_ICOLL_LEVELACK = HW_ICOLL_LEVELACK__LEVEL0;
@@ -170,8 +173,5 @@ void imx233_icoll_init(void)
170 HW_ICOLL_VBASE = (uint32_t)&isr_table; 173 HW_ICOLL_VBASE = (uint32_t)&isr_table;
171 /* enable final irq bit */ 174 /* enable final irq bit */
172 __REG_SET(HW_ICOLL_CTRL) = HW_ICOLL_CTRL__IRQ_FINAL_ENABLE; 175 __REG_SET(HW_ICOLL_CTRL) = HW_ICOLL_CTRL__IRQ_FINAL_ENABLE;
173
174 imx233_rtc_enable_msec_irq(true);
175 imx233_icoll_enable_interrupt(INT_SRC_RTC_1MSEC, true);
176} 176}
177 177
diff --git a/firmware/target/arm/imx233/kernel-imx233.c b/firmware/target/arm/imx233/kernel-imx233.c
index 8e1e122277..752db68149 100644
--- a/firmware/target/arm/imx233/kernel-imx233.c
+++ b/firmware/target/arm/imx233/kernel-imx233.c
@@ -23,16 +23,6 @@
23#include "clkctrl-imx233.h" 23#include "clkctrl-imx233.h"
24#include "kernel-imx233.h" 24#include "kernel-imx233.h"
25 25
26#ifdef SANSA_FUZEPLUS
27#define TICK_TIMER_NR 0
28#elif defined(CREATIVE_ZENXFI2)
29#define TICK_TIMER_NR 0
30#elif defined(CREATIVE_ZENXFI3)
31#define TICK_TIMER_NR 0
32#else
33#error Select tick timer !
34#endif
35
36static void tick_timer(void) 26static void tick_timer(void)
37{ 27{
38 /* Run through the list of tick tasks */ 28 /* Run through the list of tick tasks */
diff --git a/firmware/target/arm/imx233/kernel-imx233.h b/firmware/target/arm/imx233/kernel-imx233.h
index 960f3f2431..1c176cb09e 100644
--- a/firmware/target/arm/imx233/kernel-imx233.h
+++ b/firmware/target/arm/imx233/kernel-imx233.h
@@ -23,6 +23,16 @@
23 23
24#include "kernel.h" 24#include "kernel.h"
25 25
26#ifdef SANSA_FUZEPLUS
27#define TICK_TIMER_NR 0
28#elif defined(CREATIVE_ZENXFI2)
29#define TICK_TIMER_NR 0
30#elif defined(CREATIVE_ZENXFI3)
31#define TICK_TIMER_NR 0
32#else
33#error Select tick timer !
34#endif
35
26/* The i.MX233 uses in several places virtual channels to multiplex the work. 36/* The i.MX233 uses in several places virtual channels to multiplex the work.
27 * To arbiter the use of the different channels, we use a simple channel arbiter 37 * To arbiter the use of the different channels, we use a simple channel arbiter
28 * based on a semaphore to count the number of channels in use, and a bitmask 38 * based on a semaphore to count the number of channels in use, and a bitmask