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| author | Marcin Bukat <marcin.bukat@gmail.com> | 2017-09-15 21:38:57 +0200 |
|---|---|---|
| committer | Marcin Bukat <marcin.bukat@gmail.com> | 2017-09-15 21:44:59 +0200 |
| commit | 8b744571c0fa6a2805334a1de6f139db6c119393 (patch) | |
| tree | 44a5a0ba3e39404e38bb380266e59ff8a48122bf | |
| parent | c6d5cd74a866901eb8f6e69e642f617e5810e0c6 (diff) | |
| download | rockbox-8b744571c0fa6a2805334a1de6f139db6c119393.tar.gz rockbox-8b744571c0fa6a2805334a1de6f139db6c119393.zip | |
ATJ hwstub: Add cache coherency
All the hard work was done by pamaury. I simply added proper
defines.
Change-Id: Ib374eea7cd20f35518ad8a68d771c57c54ae01ca
| -rw-r--r-- | utils/hwstub/stub/atj213x/target-config.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/utils/hwstub/stub/atj213x/target-config.h b/utils/hwstub/stub/atj213x/target-config.h index 081cccc581..5d489044ca 100644 --- a/utils/hwstub/stub/atj213x/target-config.h +++ b/utils/hwstub/stub/atj213x/target-config.h | |||
| @@ -3,6 +3,13 @@ | |||
| 3 | #define IRAM_SIZE 0x18000 | 3 | #define IRAM_SIZE 0x18000 |
| 4 | #define DRAM_ORIG 0x80000000 /* KSEG1 cached unmapped */ | 4 | #define DRAM_ORIG 0x80000000 /* KSEG1 cached unmapped */ |
| 5 | #define DRAM_SIZE 0x800000 | 5 | #define DRAM_SIZE 0x800000 |
| 6 | #define DCACHE_SIZE 0x4000 /* 16 kB */ | ||
| 7 | #define DCACHE_LINE_SIZE 0x10 /* 16 B */ | ||
| 8 | #define ICACHE_SIZE 0x4000 /* 16 kB */ | ||
| 9 | #define ICACHE_LINE_SIZE 0x10 /* 61 B */ | ||
| 10 | /* we need to flush caches before executing */ | ||
| 11 | #define CONFIG_FLUSH_CACHES | ||
| 12 | |||
| 6 | #define CPU_MIPS | 13 | #define CPU_MIPS |
| 7 | 14 | ||
| 8 | /* something provides define | 15 | /* something provides define |