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author | Michael Sevakis <jethead71@rockbox.org> | 2010-04-09 03:24:17 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2010-04-09 03:24:17 +0000 |
commit | 86545174b98c576d75adacf1f1ae9e65ebfedd9b (patch) | |
tree | e7cea42c705bd4424c66022de446ebab9cc6c305 | |
parent | 011b0fa66a6be6184333684c484c88cf13b196af (diff) | |
download | rockbox-86545174b98c576d75adacf1f1ae9e65ebfedd9b.tar.gz rockbox-86545174b98c576d75adacf1f1ae9e65ebfedd9b.zip |
Gigabeat S: A little more housekeeping. Move source clock frequencies to config. header and name them per ref. manual designations.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25549 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/export/config/gigabeats.h | 4 | ||||
-rw-r--r-- | firmware/target/arm/imx31/ccm-imx31.c | 4 | ||||
-rw-r--r-- | firmware/target/arm/imx31/ccm-imx31.h | 3 |
3 files changed, 6 insertions, 5 deletions
diff --git a/firmware/export/config/gigabeats.h b/firmware/export/config/gigabeats.h index 5b1fe0526e..ed8624b505 100644 --- a/firmware/export/config/gigabeats.h +++ b/firmware/export/config/gigabeats.h | |||
@@ -8,6 +8,10 @@ | |||
8 | 8 | ||
9 | #define MODEL_NAME "Toshiba Gigabeat S" | 9 | #define MODEL_NAME "Toshiba Gigabeat S" |
10 | 10 | ||
11 | /* System source clock frequencies (Hz) */ | ||
12 | #define CONFIG_CKIL_FREQ 32768 /* RTC Crystal, Tuner */ | ||
13 | #define CONFIG_CKIH_FREQ 27000000 /* PLL Reference */ | ||
14 | |||
11 | /* For Rolo and boot loader */ | 15 | /* For Rolo and boot loader */ |
12 | #define MODEL_NUMBER 21 | 16 | #define MODEL_NUMBER 21 |
13 | 17 | ||
diff --git a/firmware/target/arm/imx31/ccm-imx31.c b/firmware/target/arm/imx31/ccm-imx31.c index 272f00aca9..0d166e5dbf 100644 --- a/firmware/target/arm/imx31/ccm-imx31.c +++ b/firmware/target/arm/imx31/ccm-imx31.c | |||
@@ -49,9 +49,9 @@ void ccm_module_clock_gating(enum IMX31_CG_LIST cg, enum IMX31_CG_MODES mode) | |||
49 | unsigned int ccm_get_pll_ref_clk(void) | 49 | unsigned int ccm_get_pll_ref_clk(void) |
50 | { | 50 | { |
51 | if ((CCM_CCMR & (3 << 1)) == (1 << 1)) | 51 | if ((CCM_CCMR & (3 << 1)) == (1 << 1)) |
52 | return CONFIG_CLK32_FREQ * 1024; | 52 | return CONFIG_CKIL_FREQ * 1024; |
53 | else | 53 | else |
54 | return CONFIG_HCLK_FREQ; | 54 | return CONFIG_CKIH_FREQ; |
55 | } | 55 | } |
56 | 56 | ||
57 | /* Return PLL frequency in HZ */ | 57 | /* Return PLL frequency in HZ */ |
diff --git a/firmware/target/arm/imx31/ccm-imx31.h b/firmware/target/arm/imx31/ccm-imx31.h index e1057a9618..e95891255d 100644 --- a/firmware/target/arm/imx31/ccm-imx31.h +++ b/firmware/target/arm/imx31/ccm-imx31.h | |||
@@ -93,9 +93,6 @@ enum IMX31_PLLS | |||
93 | NUM_PLLS, | 93 | NUM_PLLS, |
94 | }; | 94 | }; |
95 | 95 | ||
96 | #define CONFIG_CLK32_FREQ 32768 | ||
97 | #define CONFIG_HCLK_FREQ 27000000 | ||
98 | |||
99 | /* Get the PLL reference clock frequency in HZ */ | 96 | /* Get the PLL reference clock frequency in HZ */ |
100 | unsigned int ccm_get_pll_ref_clk(void); | 97 | unsigned int ccm_get_pll_ref_clk(void); |
101 | 98 | ||