diff options
author | Michael Sevakis <jethead71@rockbox.org> | 2010-06-22 04:00:34 +0000 |
---|---|---|
committer | Michael Sevakis <jethead71@rockbox.org> | 2010-06-22 04:00:34 +0000 |
commit | 831707d99191cfd7ed7d72725821bc2d9844baed (patch) | |
tree | 5a2bfbded1c8b0bec56629bd931bf3186adc44b3 | |
parent | 94c23e167c3f652b900b5f670f4cf3658247edb0 (diff) | |
download | rockbox-831707d99191cfd7ed7d72725821bc2d9844baed.tar.gz rockbox-831707d99191cfd7ed7d72725821bc2d9844baed.zip |
lv24020lp tuner: On PP targets (c200/e200), use the atomic GPIO bitwise macros for the interface since it shares GPIOH with the clickwheel interrupt.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27038 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/drivers/tuner/lv24020lp.c | 46 | ||||
-rw-r--r-- | firmware/target/arm/sandisk/power-c200_e200.c | 20 |
2 files changed, 37 insertions, 29 deletions
diff --git a/firmware/drivers/tuner/lv24020lp.c b/firmware/drivers/tuner/lv24020lp.c index 75796a5d7b..a53d93bf65 100644 --- a/firmware/drivers/tuner/lv24020lp.c +++ b/firmware/drivers/tuner/lv24020lp.c | |||
@@ -67,24 +67,31 @@ static int fd_log = -1; | |||
67 | /** tuner register defines **/ | 67 | /** tuner register defines **/ |
68 | 68 | ||
69 | #if defined(SANSA_E200) || defined(SANSA_C200) | 69 | #if defined(SANSA_E200) || defined(SANSA_C200) |
70 | #define TUNER_GPIO_OUTPUT_EN GPIOH_OUTPUT_EN | 70 | #define TUNER_GPIO_INPUT_VAL GPIOH_INPUT_VAL |
71 | #define TUNER_GPIO_OUTPUT_VAL GPIOH_OUTPUT_VAL | 71 | #define TUNER_GPIO_OUTPUT_EN_SET(mask) GPIO_SET_BITWISE(GPIOH_OUTPUT_EN, mask) |
72 | #define TUNER_GPIO_INPUT_VAL GPIOH_INPUT_VAL | 72 | #define TUNER_GPIO_OUTPUT_EN_CLEAR(mask) GPIO_CLEAR_BITWISE(GPIOH_OUTPUT_EN, mask) |
73 | #define TUNER_GPIO_OUTPUT_VAL_SET(mask) GPIO_SET_BITWISE(GPIOH_OUTPUT_VAL, mask) | ||
74 | #define TUNER_GPIO_OUTPUT_VAL_CLEAR(mask) GPIO_CLEAR_BITWISE(GPIOH_OUTPUT_VAL, mask) | ||
73 | #define FM_NRW_PIN 3 | 75 | #define FM_NRW_PIN 3 |
74 | #define FM_CLOCK_PIN 4 | 76 | #define FM_CLOCK_PIN 4 |
75 | #define FM_DATA_PIN 5 | 77 | #define FM_DATA_PIN 5 |
76 | 78 | ||
77 | #elif defined(IAUDIO_7) | 79 | #elif defined(IAUDIO_7) |
78 | #define TUNER_GPIO_OUTPUT_EN GPIOA_DIR | 80 | #define TUNER_GPIO_INPUT_VAL GPIOA |
79 | #define TUNER_GPIO_OUTPUT_VAL GPIOA | 81 | #define TUNER_GPIO_OUTPUT_EN_SET(mask) (GPIOA_DIR |= (mask)) |
80 | #define TUNER_GPIO_INPUT_VAL GPIOA | 82 | #define TUNER_GPIO_OUTPUT_EN_CLEAR(mask) (GPIOA_DIR &= ~(mask)) |
83 | #define TUNER_GPIO_OUTPUT_VAL_SET(mask) (GPIOA |= (mask)) | ||
84 | #define TUNER_GPIO_OUTPUT_VAL_CLEAR(mask) (GPIOA &= ~(mask)) | ||
81 | #define FM_CLOCK_PIN 5 | 85 | #define FM_CLOCK_PIN 5 |
82 | #define FM_DATA_PIN 6 | 86 | #define FM_DATA_PIN 6 |
83 | #define FM_NRW_PIN 7 | 87 | #define FM_NRW_PIN 7 |
88 | |||
84 | #elif defined(COWON_D2) | 89 | #elif defined(COWON_D2) |
85 | #define TUNER_GPIO_OUTPUT_EN GPIOC_DIR | 90 | #define TUNER_GPIO_INPUT_VAL GPIOC |
86 | #define TUNER_GPIO_OUTPUT_VAL GPIOC | 91 | #define TUNER_GPIO_OUTPUT_EN_SET(mask) (GPIOC_DIR |= (mask)) |
87 | #define TUNER_GPIO_INPUT_VAL GPIOC | 92 | #define TUNER_GPIO_OUTPUT_EN_CLEAR(mask) (GPIOC_DIR &= ~(mask)) |
93 | #define TUNER_GPIO_OUTPUT_VAL_SET(mask) (GPIOC |= (mask)) | ||
94 | #define TUNER_GPIO_OUTPUT_VAL_CLEAR(mask) (GPIOC &= ~(mask)) | ||
88 | #define FM_NRW_PIN 31 | 95 | #define FM_NRW_PIN 31 |
89 | #define FM_CLOCK_PIN 29 | 96 | #define FM_CLOCK_PIN 29 |
90 | #define FM_DATA_PIN 30 | 97 | #define FM_DATA_PIN 30 |
@@ -291,16 +298,17 @@ static void lv24020lp_send_byte(unsigned int byte) | |||
291 | 298 | ||
292 | for (i = 0; i < 8; i++) | 299 | for (i = 0; i < 8; i++) |
293 | { | 300 | { |
294 | TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN); | 301 | TUNER_GPIO_OUTPUT_VAL_CLEAR(1 << FM_CLOCK_PIN); |
302 | |||
295 | 303 | ||
296 | if (byte & 1) | 304 | if (byte & 1) |
297 | TUNER_GPIO_OUTPUT_VAL |= (1 << FM_DATA_PIN); | 305 | TUNER_GPIO_OUTPUT_VAL_SET(1 << FM_DATA_PIN); |
298 | else | 306 | else |
299 | TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_DATA_PIN); | 307 | TUNER_GPIO_OUTPUT_VAL_CLEAR(1 << FM_DATA_PIN); |
300 | 308 | ||
301 | udelay(FM_CLK_DELAY); | 309 | udelay(FM_CLK_DELAY); |
302 | 310 | ||
303 | TUNER_GPIO_OUTPUT_VAL |= (1 << FM_CLOCK_PIN); | 311 | TUNER_GPIO_OUTPUT_VAL_SET(1 << FM_CLOCK_PIN); |
304 | udelay(FM_CLK_DELAY); | 312 | udelay(FM_CLK_DELAY); |
305 | 313 | ||
306 | byte >>= 1; | 314 | byte >>= 1; |
@@ -311,8 +319,8 @@ static void lv24020lp_send_byte(unsigned int byte) | |||
311 | static void lv24020lp_end_write(void) | 319 | static void lv24020lp_end_write(void) |
312 | { | 320 | { |
313 | /* switch back to read mode */ | 321 | /* switch back to read mode */ |
314 | TUNER_GPIO_OUTPUT_EN &= ~(1 << FM_DATA_PIN); | 322 | TUNER_GPIO_OUTPUT_EN_CLEAR(1 << FM_DATA_PIN); |
315 | TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_NRW_PIN); | 323 | TUNER_GPIO_OUTPUT_VAL_CLEAR(1 << FM_NRW_PIN); |
316 | udelay(FM_CLK_DELAY); | 324 | udelay(FM_CLK_DELAY); |
317 | } | 325 | } |
318 | 326 | ||
@@ -326,8 +334,8 @@ static unsigned int lv24020lp_begin_write(unsigned int address) | |||
326 | for (;;) | 334 | for (;;) |
327 | { | 335 | { |
328 | /* Prepare 3-wire bus pins for write cycle */ | 336 | /* Prepare 3-wire bus pins for write cycle */ |
329 | TUNER_GPIO_OUTPUT_VAL |= (1 << FM_NRW_PIN); | 337 | TUNER_GPIO_OUTPUT_VAL_SET(1 << FM_NRW_PIN); |
330 | TUNER_GPIO_OUTPUT_EN |= (1 << FM_DATA_PIN); | 338 | TUNER_GPIO_OUTPUT_EN_SET(1 << FM_DATA_PIN); |
331 | udelay(FM_CLK_DELAY); | 339 | udelay(FM_CLK_DELAY); |
332 | 340 | ||
333 | /* current block == register block? */ | 341 | /* current block == register block? */ |
@@ -418,13 +426,13 @@ static unsigned int lv24020lp_read(unsigned int address) | |||
418 | toread = 0; | 426 | toread = 0; |
419 | for (i = 0; i < 8; i++) | 427 | for (i = 0; i < 8; i++) |
420 | { | 428 | { |
421 | TUNER_GPIO_OUTPUT_VAL &= ~(1 << FM_CLOCK_PIN); | 429 | TUNER_GPIO_OUTPUT_VAL_CLEAR(1 << FM_CLOCK_PIN); |
422 | udelay(FM_CLK_DELAY); | 430 | udelay(FM_CLK_DELAY); |
423 | 431 | ||
424 | if (TUNER_GPIO_INPUT_VAL & (1 << FM_DATA_PIN)) | 432 | if (TUNER_GPIO_INPUT_VAL & (1 << FM_DATA_PIN)) |
425 | toread |= (1 << i); | 433 | toread |= (1 << i); |
426 | 434 | ||
427 | TUNER_GPIO_OUTPUT_VAL |= (1 << FM_CLOCK_PIN); | 435 | TUNER_GPIO_OUTPUT_VAL_SET(1 << FM_CLOCK_PIN); |
428 | udelay(FM_CLK_DELAY); | 436 | udelay(FM_CLK_DELAY); |
429 | } | 437 | } |
430 | 438 | ||
diff --git a/firmware/target/arm/sandisk/power-c200_e200.c b/firmware/target/arm/sandisk/power-c200_e200.c index cc9d16f466..6637111ec8 100644 --- a/firmware/target/arm/sandisk/power-c200_e200.c +++ b/firmware/target/arm/sandisk/power-c200_e200.c | |||
@@ -107,18 +107,18 @@ bool tuner_power(bool status) | |||
107 | in host read mode: */ | 107 | in host read mode: */ |
108 | 108 | ||
109 | /* 1. Set direction of the DATA-line to input-mode. */ | 109 | /* 1. Set direction of the DATA-line to input-mode. */ |
110 | GPIOH_OUTPUT_EN &= ~(1 << 5); | 110 | GPIO_CLEAR_BITWISE(GPIOH_OUTPUT_EN, 1 << 5); |
111 | GPIOH_ENABLE |= (1 << 5); | 111 | GPIO_SET_BITWISE(GPIOH_ENABLE, 1 << 5); |
112 | 112 | ||
113 | /* 2. Drive NR_W low */ | 113 | /* 2. Drive NR_W low */ |
114 | GPIOH_OUTPUT_VAL &= ~(1 << 3); | 114 | GPIO_CLEAR_BITWISE(GPIOH_OUTPUT_VAL, 1 << 3); |
115 | GPIOH_OUTPUT_EN |= (1 << 3); | 115 | GPIO_SET_BITWISE(GPIOH_OUTPUT_EN, 1 << 3); |
116 | GPIOH_ENABLE |= (1 << 3); | 116 | GPIO_SET_BITWISE(GPIOH_ENABLE, 1 << 3); |
117 | 117 | ||
118 | /* 3. Drive CLOCK high */ | 118 | /* 3. Drive CLOCK high */ |
119 | GPIOH_OUTPUT_VAL |= (1 << 4); | 119 | GPIO_SET_BITWISE(GPIOH_OUTPUT_VAL, 1 << 4); |
120 | GPIOH_OUTPUT_EN |= (1 << 4); | 120 | GPIO_SET_BITWISE(GPIOH_OUTPUT_EN, 1 << 4); |
121 | GPIOH_ENABLE |= (1 << 4); | 121 | GPIO_SET_BITWISE(GPIOH_ENABLE, 1 << 4); |
122 | 122 | ||
123 | lv24020lp_power(true); | 123 | lv24020lp_power(true); |
124 | } | 124 | } |
@@ -127,8 +127,8 @@ bool tuner_power(bool status) | |||
127 | lv24020lp_power(false); | 127 | lv24020lp_power(false); |
128 | 128 | ||
129 | /* set all as inputs */ | 129 | /* set all as inputs */ |
130 | GPIOH_OUTPUT_EN &= ~((1 << 5) | (1 << 3) | (1 << 4)); | 130 | GPIO_CLEAR_BITWISE(GPIOH_OUTPUT_EN, (1 << 5) | (1 << 3) | (1 << 4)); |
131 | GPIOH_ENABLE &= ~((1 << 3) | (1 << 4)); | 131 | GPIO_CLEAR_BITWISE(GPIOH_ENABLE, (1 << 3) | (1 << 4)); |
132 | 132 | ||
133 | /* turn off mystery amplification device */ | 133 | /* turn off mystery amplification device */ |
134 | #if defined (SANSA_E200) | 134 | #if defined (SANSA_E200) |