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authorRafaël Carré <rafael.carre@gmail.com>2010-05-26 16:03:01 +0000
committerRafaël Carré <rafael.carre@gmail.com>2010-05-26 16:03:01 +0000
commit7ad50c6f5935cbde4c96e742b90ce629dd325217 (patch)
tree3aea33c0b0b57bc1f07ef607c095d429fcd02142
parentf0f5a6419ab788edfdee23009a4095a68106206d (diff)
downloadrockbox-7ad50c6f5935cbde4c96e742b90ce629dd325217.tar.gz
rockbox-7ad50c6f5935cbde4c96e742b90ce629dd325217.zip
as3525: write irq/fiq handlers in C
Declare VIC registers holding function pointers as volatile pointers to function pointers and access them directly without casting UIRQ() is an IRQ handler too, even if it doesn't return git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26313 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/export/as3525.h6
-rw-r--r--firmware/target/arm/as3525/system-as3525.c26
2 files changed, 11 insertions, 21 deletions
diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h
index a58a0ae0ad..6b0e85f9c5 100644
--- a/firmware/export/as3525.h
+++ b/firmware/export/as3525.h
@@ -441,9 +441,9 @@ CE lines
441#define VIC_SOFT_INT (*(volatile unsigned long*)(VIC_BASE+0x18)) 441#define VIC_SOFT_INT (*(volatile unsigned long*)(VIC_BASE+0x18))
442#define VIC_SOFT_INT_CLEAR (*(volatile unsigned long*)(VIC_BASE+0x1C)) 442#define VIC_SOFT_INT_CLEAR (*(volatile unsigned long*)(VIC_BASE+0x1C))
443#define VIC_PROTECTION (*(volatile unsigned long*)(VIC_BASE+0x20)) 443#define VIC_PROTECTION (*(volatile unsigned long*)(VIC_BASE+0x20))
444#define VIC_VECT_ADDR (*(volatile unsigned long*)(VIC_BASE+0x30)) 444#define VIC_VECT_ADDR ((void (* volatile *) (void)) (VIC_BASE+0x30))
445#define VIC_DEF_VECT_ADDR (*(volatile unsigned long*)(VIC_BASE+0x34)) 445#define VIC_DEF_VECT_ADDR ((void (* volatile *) (void)) (VIC_BASE+0x34))
446#define VIC_VECT_ADDRS ((volatile unsigned long*)(VIC_BASE+0x100)) 446#define VIC_VECT_ADDRS ((void (* volatile *) (void)) (VIC_BASE+0x100))
447#define VIC_VECT_CNTLS ((volatile unsigned long*)(VIC_BASE+0x200)) 447#define VIC_VECT_CNTLS ((volatile unsigned long*)(VIC_BASE+0x200))
448 448
449/* Interrupt sources (for vectors setup) */ 449/* Interrupt sources (for vectors setup) */
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index 6a4c7a1264..5eae1a35b3 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -38,8 +38,9 @@
38#define default_interrupt(name) \ 38#define default_interrupt(name) \
39 extern __attribute__((weak,alias("UIRQ"))) void name (void) 39 extern __attribute__((weak,alias("UIRQ"))) void name (void)
40 40
41void irq_handler(void) __attribute__((interrupt ("IRQ"), naked)); 41static void UIRQ (void) __attribute__((interrupt ("IRQ")));
42void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked)); 42void irq_handler(void) __attribute__((interrupt ("IRQ")));
43void fiq_handler(void) __attribute__((interrupt ("FIQ")));
43 44
44default_interrupt(INT_WATCHDOG); 45default_interrupt(INT_WATCHDOG);
45default_interrupt(INT_TIMER1); 46default_interrupt(INT_TIMER1);
@@ -136,8 +137,6 @@ struct vec_int_src vec_int_srcs[] =
136 137
137static void setup_vic(void) 138static void setup_vic(void)
138{ 139{
139 volatile unsigned long *vic_vect_addrs = VIC_VECT_ADDRS;
140 volatile unsigned long *vic_vect_cntls = VIC_VECT_CNTLS;
141 const unsigned int n = sizeof(vec_int_srcs)/sizeof(vec_int_srcs[0]); 140 const unsigned int n = sizeof(vec_int_srcs)/sizeof(vec_int_srcs[0]);
142 unsigned int i; 141 unsigned int i;
143 142
@@ -145,12 +144,12 @@ static void setup_vic(void)
145 VIC_INT_EN_CLEAR = 0xffffffff; /* disable all interrupt lines */ 144 VIC_INT_EN_CLEAR = 0xffffffff; /* disable all interrupt lines */
146 VIC_INT_SELECT = 0; /* only IRQ, no FIQ */ 145 VIC_INT_SELECT = 0; /* only IRQ, no FIQ */
147 146
148 VIC_DEF_VECT_ADDR = (unsigned long)UIRQ; 147 *VIC_DEF_VECT_ADDR = UIRQ;
149 148
150 for(i = 0; i < n; i++) 149 for(i = 0; i < n; i++)
151 { 150 {
152 vic_vect_addrs[i] = (unsigned long)vec_int_srcs[i].isr; 151 VIC_VECT_ADDRS[i] = vec_int_srcs[i].isr;
153 vic_vect_cntls[i] = (1<<5) | vec_int_srcs[i].source; 152 VIC_VECT_CNTLS[i] = (1<<5) | vec_int_srcs[i].source;
154 } 153 }
155} 154}
156 155
@@ -168,21 +167,12 @@ void INT_GPIOA(void)
168 167
169void irq_handler(void) 168void irq_handler(void)
170{ 169{
171 asm volatile( "stmfd sp!, {r0-r5,ip,lr} \n" /* Store context */ 170 (*VIC_VECT_ADDR)(); /* call the isr */
172 "ldr r5, =0xC6010030 \n" /* VIC_VECT_ADDR */ 171 *VIC_VECT_ADDR = (void*)VIC_VECT_ADDR; /* any write will ack the irq */
173 "mov lr, pc \n" /* Return from ISR */
174 "ldr pc, [r5] \n" /* execute ISR */
175 "str r0, [r5] \n" /* Ack interrupt */
176 "ldmfd sp!, {r0-r5,ip,lr} \n" /* Restore context */
177 "subs pc, lr, #4 \n" /* Return from IRQ */
178 );
179} 172}
180 173
181void fiq_handler(void) 174void fiq_handler(void)
182{ 175{
183 asm volatile (
184 "subs pc, lr, #4 \r\n"
185 );
186} 176}
187 177
188#if defined(SANSA_C200V2) 178#if defined(SANSA_C200V2)