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author | Catalin Patulea <cat@vv.carleton.ca> | 2007-09-25 04:46:23 +0000 |
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committer | Catalin Patulea <cat@vv.carleton.ca> | 2007-09-25 04:46:23 +0000 |
commit | 7790fded36db45ec456d390389de82eafe79bb02 (patch) | |
tree | 40977766a1d1c666b360e0a477abfa931b25dc74 | |
parent | 2a0ae89c26c4b7220072f6aa87df6f919f6bf08d (diff) | |
download | rockbox-7790fded36db45ec456d390389de82eafe79bb02.tar.gz rockbox-7790fded36db45ec456d390389de82eafe79bb02.zip |
m:robe 500i port: Fix tab style (tab -> 4 spaces) in system-mr500.c
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14854 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/target/arm/olympus/mrobe-500/system-mr500.c | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/firmware/target/arm/olympus/mrobe-500/system-mr500.c b/firmware/target/arm/olympus/mrobe-500/system-mr500.c index 913850ddb8..fad2d4331e 100644 --- a/firmware/target/arm/olympus/mrobe-500/system-mr500.c +++ b/firmware/target/arm/olympus/mrobe-500/system-mr500.c | |||
@@ -141,40 +141,40 @@ void system_reboot(void) | |||
141 | 141 | ||
142 | void enable_interrupts (void) | 142 | void enable_interrupts (void) |
143 | { | 143 | { |
144 | asm volatile ("msr cpsr_c, #0x13" ); | 144 | asm volatile ("msr cpsr_c, #0x13" ); |
145 | } | 145 | } |
146 | 146 | ||
147 | void system_init(void) | 147 | void system_init(void) |
148 | { | 148 | { |
149 | /* taken from linux/arch/arm/mach-itdm320-20/irq.c */ | 149 | /* taken from linux/arch/arm/mach-itdm320-20/irq.c */ |
150 | 150 | ||
151 | /* Clearing all FIQs and IRQs. */ | 151 | /* Clearing all FIQs and IRQs. */ |
152 | IO_INTC_IRQ0 = 0xFFFF; | 152 | IO_INTC_IRQ0 = 0xFFFF; |
153 | IO_INTC_IRQ1 = 0xFFFF; | 153 | IO_INTC_IRQ1 = 0xFFFF; |
154 | IO_INTC_IRQ2 = 0xFFFF; | 154 | IO_INTC_IRQ2 = 0xFFFF; |
155 | 155 | ||
156 | IO_INTC_FIQ0 = 0xFFFF; | 156 | IO_INTC_FIQ0 = 0xFFFF; |
157 | IO_INTC_FIQ1 = 0xFFFF; | 157 | IO_INTC_FIQ1 = 0xFFFF; |
158 | IO_INTC_FIQ2 = 0xFFFF; | 158 | IO_INTC_FIQ2 = 0xFFFF; |
159 | 159 | ||
160 | /* Masking all Interrupts. */ | 160 | /* Masking all Interrupts. */ |
161 | IO_INTC_EINT0 = 0; | 161 | IO_INTC_EINT0 = 0; |
162 | IO_INTC_EINT1 = 0; | 162 | IO_INTC_EINT1 = 0; |
163 | IO_INTC_EINT2 = 0; | 163 | IO_INTC_EINT2 = 0; |
164 | 164 | ||
165 | /* Setting INTC to all IRQs. */ | 165 | /* Setting INTC to all IRQs. */ |
166 | IO_INTC_FISEL0 = 0; | 166 | IO_INTC_FISEL0 = 0; |
167 | IO_INTC_FISEL1 = 0; | 167 | IO_INTC_FISEL1 = 0; |
168 | IO_INTC_FISEL2 = 0; | 168 | IO_INTC_FISEL2 = 0; |
169 | 169 | ||
170 | IO_INTC_ENTRY_TBA0 = | 170 | IO_INTC_ENTRY_TBA0 = |
171 | IO_INTC_ENTRY_TBA1 = 0; | 171 | IO_INTC_ENTRY_TBA1 = 0; |
172 | 172 | ||
173 | /* set GIO26 (reset pin) to output and low */ | 173 | /* set GIO26 (reset pin) to output and low */ |
174 | IO_GIO_BITCLR1=(1<<10); | 174 | IO_GIO_BITCLR1=(1<<10); |
175 | IO_GIO_DIR1&=~(1<<10); | 175 | IO_GIO_DIR1&=~(1<<10); |
176 | 176 | ||
177 | enable_interrupts(); | 177 | enable_interrupts(); |
178 | } | 178 | } |
179 | 179 | ||
180 | int system_memory_guard(int newmode) | 180 | int system_memory_guard(int newmode) |