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authorAmaury Pouly <amaury.pouly@gmail.com>2014-06-22 12:56:47 +0200
committerAmaury Pouly <amaury.pouly@gmail.com>2014-06-24 18:07:56 +0200
commit761f59c9e3be0ffd77d2dc1b8095a3b877badeda (patch)
treecc3345dc5134a95f7dc3d1b2906ca6af05c9df8b
parent55c5c7ea669a60980fa9d17055b74cbca7be3f58 (diff)
downloadrockbox-761f59c9e3be0ffd77d2dc1b8095a3b877badeda.tar.gz
rockbox-761f59c9e3be0ffd77d2dc1b8095a3b877badeda.zip
zen/zenxfi: don't switch emi on cpu change to avoid screen flicker
On those targets, since the LCDIF cannot recover from underflow, changing the EMI frequency kills one frame and cause flicker. Change-Id: Id3c130636bcfddcc6c54896602699fbaa1636ab4
-rw-r--r--firmware/target/arm/imx233/system-imx233.c18
1 files changed, 14 insertions, 4 deletions
diff --git a/firmware/target/arm/imx233/system-imx233.c b/firmware/target/arm/imx233/system-imx233.c
index 3cac826319..f34eab66e2 100644
--- a/firmware/target/arm/imx233/system-imx233.c
+++ b/firmware/target/arm/imx233/system-imx233.c
@@ -263,17 +263,27 @@ struct cpufreq_profile_t
263 int arm_cache_timings; 263 int arm_cache_timings;
264}; 264};
265 265
266/* Some devices don't handle very well memory frequency changes, so avoid them
267 * by running at highest speed at all time */
268#if defined(CREATIVE_ZEN) || defined(CREATIVE_ZENXFI)
269#define EMIFREQ_NORMAL IMX233_EMIFREQ_130_MHz
270#define EMIFREQ_MAX IMX233_EMIFREQ_130_MHz
271#else /* weird targets */
272#define EMIFREQ_NORMAL IMX233_EMIFREQ_64_MHz
273#define EMIFREQ_MAX IMX233_EMIFREQ_130_MHz
274#endif
275
266#if IMX233_SUBTARGET >= 3700 276#if IMX233_SUBTARGET >= 3700
267static struct cpufreq_profile_t cpu_profiles[] = 277static struct cpufreq_profile_t cpu_profiles[] =
268{ 278{
269 /* clk_p@454.74 MHz, clk_h@151.58 MHz, clk_emi@130.91 MHz, VDDD@1.550 V */ 279 /* clk_p@454.74 MHz, clk_h@151.58 MHz, clk_emi@130.91 MHz, VDDD@1.550 V */
270 {IMX233_CPUFREQ_454_MHz, 1550, 1450, 3, 1, 19, IMX233_EMIFREQ_130_MHz, 0}, 280 {IMX233_CPUFREQ_454_MHz, 1550, 1450, 3, 1, 19, EMIFREQ_MAX, 0},
271 /* clk_p@320.00 MHz, clk_h@106.66 MHz, clk_emi@130.91 MHz, VDDD@1.450 V */ 281 /* clk_p@320.00 MHz, clk_h@106.66 MHz, clk_emi@130.91 MHz, VDDD@1.450 V */
272 {IMX233_CPUFREQ_320_MHz, 1450, 1350, 3, 1, 27, IMX233_EMIFREQ_130_MHz, 0}, 282 {IMX233_CPUFREQ_320_MHz, 1450, 1350, 3, 1, 27, EMIFREQ_MAX, 0},
273 /* clk_p@261.82 MHz, clk_h@130.91 MHz, clk_emi@130.91 MHz, VDDD@1.275 V */ 283 /* clk_p@261.82 MHz, clk_h@130.91 MHz, clk_emi@130.91 MHz, VDDD@1.275 V */
274 {IMX233_CPUFREQ_261_MHz, 1275, 1175, 2, 1, 33, IMX233_EMIFREQ_130_MHz, 0}, 284 {IMX233_CPUFREQ_261_MHz, 1275, 1175, 2, 1, 33, EMIFREQ_MAX, 0},
275 /* clk_p@64 MHz, clk_h@64 MHz, clk_emi@64 MHz, VDDD@1.050 V */ 285 /* clk_p@64 MHz, clk_h@64 MHz, clk_emi@64 MHz, VDDD@1.050 V */
276 {IMX233_CPUFREQ_64_MHz, 1050, 975, 1, 5, 27, IMX233_EMIFREQ_64_MHz, 3}, 286 {IMX233_CPUFREQ_64_MHz, 1050, 975, 1, 5, 27, EMIFREQ_NORMAL, 3},
277 /* dummy */ 287 /* dummy */
278 {0, 0, 0, 0, 0, 0, 0, 0} 288 {0, 0, 0, 0, 0, 0, 0, 0}
279}; 289};