iPod Classic/6G: PCM support for all CS42L55 rates

pcm_dma_apply_settings(): sets the configured PCM frequency,
all native CS42L55 sample rates are available.

Change-Id: I2fcd5581457a669c3044516804cb64fb972218d0

2 files changed, 14 insertions, 6 deletions

diff --git a/firmware/export/s5l8702.h b/firmware/export/s5l8702.h
index 278bd1b0e8..b7da971b49 100644
--- a/firmware/export/s5l8702.h
+++ b/firmware/export/s5l8702.h
@@ -807,7 +807,7 @@ struct dma_lli
 #define I2SRXCOM            (*((volatile uint32_t*)(0x3CA00034)))
 #define I2SRXDB             (*((volatile uint32_t*)(0x3CA00038)))
 #define I2SSTATUS           (*((volatile uint32_t*)(0x3CA0003C)))
-#define I2S40               (*((volatile uint32_t*)(0x3CA00040)))
+#define I2SCLKDIV           (*((volatile uint32_t*)(0x3CA00040)))
 
 
 /////CLOCK GATES/////
diff --git a/firmware/target/arm/s5l8702/pcm-s5l8702.c b/firmware/target/arm/s5l8702/pcm-s5l8702.c
index 1974c47d51..cbfe6ea007 100644
--- a/firmware/target/arm/s5l8702/pcm-s5l8702.c
+++ b/firmware/target/arm/s5l8702/pcm-s5l8702.c
@@ -139,16 +139,28 @@ void pcm_play_dma_pause(bool pause)
     else  I2STXCOM &= ~1;
 }
 
+/* MCLK = 12MHz (MCLKDIV2=1), [CS42L55 DS, s4.8] */
+#define MCLK_FREQ     12000000
+
+/* set the configured PCM frequency */
+void pcm_dma_apply_settings(void)
+{
+    /* configure I2S clock ratio */
+    I2SCLKDIV = MCLK_FREQ / hw_freq_sampr[pcm_fsel];
+    /* select CS42L55 sample rate */
+    audiohw_set_frequency(pcm_fsel);
+}
+
 void pcm_play_dma_init(void)
 {
     PWRCON(0) &= ~(1 << 4);
     PWRCON(1) &= ~(1 << 7);
-    I2S40 = 0x110;
     I2STXCON = 0xb100019;
     I2SCLKCON = 1;
     VIC0INTENABLE = 1 << IRQ_DMAC0;
 
     audiohw_preinit();
+    pcm_dma_apply_settings();
 }
 
 void pcm_play_dma_postinit(void)
@@ -156,10 +168,6 @@ void pcm_play_dma_postinit(void)
     audiohw_postinit();
 }
 
-void pcm_dma_apply_settings(void)
-{
-}
-
 size_t pcm_get_bytes_waiting(void)
 {
     int bytes = pcm_remaining;