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authorRafaël Carré <rafael.carre@gmail.com>2010-05-31 14:42:27 +0000
committerRafaël Carré <rafael.carre@gmail.com>2010-05-31 14:42:27 +0000
commit74cee6297c87d9f94ff9d68ca19ba39fc7cc6ae6 (patch)
treeef8121a16c8451df69b319ea5cde296bc9292c51
parent09cc3e604d79fca8ca8bb6add2895732926880d9 (diff)
downloadrockbox-74cee6297c87d9f94ff9d68ca19ba39fc7cc6ae6.tar.gz
rockbox-74cee6297c87d9f94ff9d68ca19ba39fc7cc6ae6.zip
rolo: use BX for ARM branches
This is equivalent to mov pc Remove an instruction from the asm() for PP cop restart : use register constraint git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26431 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/rolo.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/firmware/rolo.c b/firmware/rolo.c
index 69166785ad..078a4e9827 100644
--- a/firmware/rolo.c
+++ b/firmware/rolo.c
@@ -90,9 +90,8 @@ void rolo_restart_cop(void)
90 cpu_reply = 2; 90 cpu_reply = 2;
91 91
92 asm volatile( 92 asm volatile(
93 "mov r0, %0 \n" 93 "bx %0 \n"
94 "mov pc, r0 \n" 94 : : "r"(DRAM_START)
95 : : "I"(DRAM_START)
96 ); 95 );
97} 96}
98#endif /* NUM_CORES > 1 */ 97#endif /* NUM_CORES > 1 */
@@ -168,7 +167,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
168#endif 167#endif
169 168
170 asm volatile( 169 asm volatile(
171 "mov pc, %0 \n" 170 "bx %0 \n"
172 : : "r"(DRAM_START) 171 : : "r"(DRAM_START)
173 ); 172 );
174 173
@@ -178,7 +177,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
178 cpucache_invalidate(); 177 cpucache_invalidate();
179#endif 178#endif
180 asm volatile( 179 asm volatile(
181 "mov pc, %0 \n" 180 "bx %0 \n"
182 : : "r"(dest) 181 : : "r"(dest)
183 ); 182 );
184#elif defined(CPU_MIPS) 183#elif defined(CPU_MIPS)