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author | Karl Kurbjun <kkurbjun@gmail.com> | 2008-05-02 03:27:17 +0000 |
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committer | Karl Kurbjun <kkurbjun@gmail.com> | 2008-05-02 03:27:17 +0000 |
commit | 6c6a2ed9108a2937c644042b35c72ffc38f5ecce (patch) | |
tree | 5f3be81798f49d28a861905abc1335215e41642e | |
parent | a74d15025e24593962b9d02ee8dc67d497f8e42e (diff) | |
download | rockbox-6c6a2ed9108a2937c644042b35c72ffc38f5ecce.tar.gz rockbox-6c6a2ed9108a2937c644042b35c72ffc38f5ecce.zip |
Working ROLO for the Gigabeat F/X
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17304 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/rolo.c | 6 | ||||
-rw-r--r-- | firmware/target/arm/s3c2440/app.lds | 5 |
2 files changed, 8 insertions, 3 deletions
diff --git a/firmware/rolo.c b/firmware/rolo.c index a76a8925b0..1b29affb25 100644 --- a/firmware/rolo.c +++ b/firmware/rolo.c | |||
@@ -41,7 +41,7 @@ | |||
41 | #endif | 41 | #endif |
42 | 42 | ||
43 | #if !defined(IRIVER_IFP7XX_SERIES) && \ | 43 | #if !defined(IRIVER_IFP7XX_SERIES) && \ |
44 | (CONFIG_CPU != PP5002) && (CONFIG_CPU != S3C2440) | 44 | (CONFIG_CPU != PP5002) |
45 | /* FIX: this doesn't work on iFP, 3rd Gen ipods */ | 45 | /* FIX: this doesn't work on iFP, 3rd Gen ipods */ |
46 | 46 | ||
47 | #define IRQ0_EDGE_TRIGGER 0x80 | 47 | #define IRQ0_EDGE_TRIGGER 0x80 |
@@ -168,7 +168,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest, | |||
168 | "mov pc, r0 \n" | 168 | "mov pc, r0 \n" |
169 | ); | 169 | ); |
170 | 170 | ||
171 | #elif defined(CPU_TCC780X) || (CONFIG_CPU==IMX31L) | 171 | #elif defined(CPU_TCC780X) || (CONFIG_CPU==IMX31L) || (CONFIG_CPU == S3C2440) |
172 | /* Flush and invalidate caches */ | 172 | /* Flush and invalidate caches */ |
173 | invalidate_icache(); | 173 | invalidate_icache(); |
174 | 174 | ||
@@ -226,7 +226,7 @@ int rolo_load(const char* filename) | |||
226 | length = filesize(fd) - FIRMWARE_OFFSET_FILE_DATA; | 226 | length = filesize(fd) - FIRMWARE_OFFSET_FILE_DATA; |
227 | 227 | ||
228 | #if defined(CPU_COLDFIRE) || defined(CPU_PP) || (CONFIG_CPU==DM320) \ | 228 | #if defined(CPU_COLDFIRE) || defined(CPU_PP) || (CONFIG_CPU==DM320) \ |
229 | || defined(CPU_TCC780X) || (CONFIG_CPU==IMX31L) | 229 | || defined(CPU_TCC780X) || (CONFIG_CPU==IMX31L) || (CONFIG_CPU == S3C2440) |
230 | /* Read and save checksum */ | 230 | /* Read and save checksum */ |
231 | lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET); | 231 | lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET); |
232 | if (read(fd, &file_checksum, 4) != 4) { | 232 | if (read(fd, &file_checksum, 4) != 4) { |
diff --git a/firmware/target/arm/s3c2440/app.lds b/firmware/target/arm/s3c2440/app.lds index e999ef0760..7321df8af2 100644 --- a/firmware/target/arm/s3c2440/app.lds +++ b/firmware/target/arm/s3c2440/app.lds | |||
@@ -33,6 +33,11 @@ MEMORY | |||
33 | 33 | ||
34 | SECTIONS | 34 | SECTIONS |
35 | { | 35 | { |
36 | /* This nice little hack is to trick ROLO into loading in a certain place | ||
37 | * CRT0.s takes care of making sure the code is where it needs to be | ||
38 | */ | ||
39 | loadaddress = 0x31000000; | ||
40 | |||
36 | .vectors DRAMORIG : | 41 | .vectors DRAMORIG : |
37 | { | 42 | { |
38 | _vectorstart = .; | 43 | _vectorstart = .; |