summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMichael Sevakis <jethead71@rockbox.org>2010-05-15 04:59:25 +0000
committerMichael Sevakis <jethead71@rockbox.org>2010-05-15 04:59:25 +0000
commit6bb9384b709c1e143bb7444317dde20bf9f5cb7f (patch)
tree42c08cdd47546331075c7610f2a1a52fa6c88103
parentb8a51adb5736e9daf335fcf0015ce99d734bcdca (diff)
downloadrockbox-6bb9384b709c1e143bb7444317dde20bf9f5cb7f.tar.gz
rockbox-6bb9384b709c1e143bb7444317dde20bf9f5cb7f.zip
wm8978: Clean out silly macros. Use 'POS' convention instead for shifted bitfields. Additionally, use volume update latching for all volume settings.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26043 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/drivers/audio/wm8978.c66
-rw-r--r--firmware/export/wm8978.h91
2 files changed, 56 insertions, 101 deletions
diff --git a/firmware/drivers/audio/wm8978.c b/firmware/drivers/audio/wm8978.c
index e93c33b5ec..a2dbf5a8fb 100644
--- a/firmware/drivers/audio/wm8978.c
+++ b/firmware/drivers/audio/wm8978.c
@@ -76,11 +76,11 @@ static uint16_t wmc_regs[WMC_NUM_REGISTERS] =
76 [WMC_GPIO] = 0x000, 76 [WMC_GPIO] = 0x000,
77 [WMC_JACK_DETECT_CONTROL1] = 0x000, 77 [WMC_JACK_DETECT_CONTROL1] = 0x000,
78 [WMC_DAC_CONTROL] = 0x000, 78 [WMC_DAC_CONTROL] = 0x000,
79 [WMC_LEFT_DAC_DIGITAL_VOL] = 0x0ff | WMC_VU, 79 [WMC_LEFT_DAC_DIGITAL_VOL] = 0x0ff, /* Latch left first */
80 [WMC_RIGHT_DAC_DIGITAL_VOL] = 0x0ff | WMC_VU, 80 [WMC_RIGHT_DAC_DIGITAL_VOL] = 0x0ff | WMC_VU,
81 [WMC_JACK_DETECT_CONTROL2] = 0x000, 81 [WMC_JACK_DETECT_CONTROL2] = 0x000,
82 [WMC_ADC_CONTROL] = 0x100, 82 [WMC_ADC_CONTROL] = 0x100,
83 [WMC_LEFT_ADC_DIGITAL_VOL] = 0x0ff | WMC_VU, 83 [WMC_LEFT_ADC_DIGITAL_VOL] = 0x0ff, /* Latch left first */
84 [WMC_RIGHT_ADC_DIGITAL_VOL] = 0x0ff | WMC_VU, 84 [WMC_RIGHT_ADC_DIGITAL_VOL] = 0x0ff | WMC_VU,
85 [WMC_EQ1_LOW_SHELF] = 0x12c, 85 [WMC_EQ1_LOW_SHELF] = 0x12c,
86 [WMC_EQ2_PEAK1] = 0x02c, 86 [WMC_EQ2_PEAK1] = 0x02c,
@@ -104,16 +104,16 @@ static uint16_t wmc_regs[WMC_NUM_REGISTERS] =
104 [WMC_3D_CONTROL] = 0x000, 104 [WMC_3D_CONTROL] = 0x000,
105 [WMC_BEEP_CONTROL] = 0x000, 105 [WMC_BEEP_CONTROL] = 0x000,
106 [WMC_INPUT_CTRL] = 0x033, 106 [WMC_INPUT_CTRL] = 0x033,
107 [WMC_LEFT_INP_PGA_GAIN_CTRL] = 0x010 | WMC_VU | WMC_ZC, 107 [WMC_LEFT_INP_PGA_GAIN_CTRL] = 0x010 | WMC_ZC, /* Latch left first */
108 [WMC_RIGHT_INP_PGA_GAIN_CTRL] = 0x010 | WMC_VU | WMC_ZC, 108 [WMC_RIGHT_INP_PGA_GAIN_CTRL] = 0x010 | WMC_VU | WMC_ZC,
109 [WMC_LEFT_ADC_BOOST_CTRL] = 0x100, 109 [WMC_LEFT_ADC_BOOST_CTRL] = 0x100,
110 [WMC_RIGHT_ADC_BOOST_CTRL] = 0x100, 110 [WMC_RIGHT_ADC_BOOST_CTRL] = 0x100,
111 [WMC_OUTPUT_CTRL] = 0x002, 111 [WMC_OUTPUT_CTRL] = 0x002,
112 [WMC_LEFT_MIXER_CTRL] = 0x001, 112 [WMC_LEFT_MIXER_CTRL] = 0x001,
113 [WMC_RIGHT_MIXER_CTRL] = 0x001, 113 [WMC_RIGHT_MIXER_CTRL] = 0x001,
114 [WMC_LOUT1_HP_VOLUME_CTRL] = 0x039 | WMC_VU | WMC_ZC, 114 [WMC_LOUT1_HP_VOLUME_CTRL] = 0x039 | WMC_ZC, /* Latch left first */
115 [WMC_ROUT1_HP_VOLUME_CTRL] = 0x039 | WMC_VU | WMC_ZC, 115 [WMC_ROUT1_HP_VOLUME_CTRL] = 0x039 | WMC_VU | WMC_ZC,
116 [WMC_LOUT2_SPK_VOLUME_CTRL] = 0x039 | WMC_VU | WMC_ZC, 116 [WMC_LOUT2_SPK_VOLUME_CTRL] = 0x039 | WMC_ZC, /* Latch left first */
117 [WMC_ROUT2_SPK_VOLUME_CTRL] = 0x039 | WMC_VU | WMC_ZC, 117 [WMC_ROUT2_SPK_VOLUME_CTRL] = 0x039 | WMC_VU | WMC_ZC,
118 [WMC_OUT3_MIXER_CTRL] = 0x001, 118 [WMC_OUT3_MIXER_CTRL] = 0x001,
119 [WMC_OUT4_MONO_MIXER_CTRL] = 0x001, 119 [WMC_OUT4_MONO_MIXER_CTRL] = 0x001,
@@ -305,17 +305,17 @@ void audiohw_set_headphone_vol(int vol_l, int vol_r)
305 get_headphone_levels(vol_l, &dac_l, &hp_l, &mix_l, &boost_l); 305 get_headphone_levels(vol_l, &dac_l, &hp_l, &mix_l, &boost_l);
306 get_headphone_levels(vol_r, &dac_r, &hp_r, &mix_r, &boost_r); 306 get_headphone_levels(vol_r, &dac_r, &hp_r, &mix_r, &boost_r);
307 307
308 wmc_write_masked(WMC_LEFT_MIXER_CTRL, WMC_BYPLMIXVOLw(mix_l), 308 wmc_write_masked(WMC_LEFT_MIXER_CTRL, mix_l << WMC_BYPLMIXVOL_POS,
309 WMC_BYPLMIXVOL); 309 WMC_BYPLMIXVOL);
310 wmc_write_masked(WMC_LEFT_ADC_BOOST_CTRL, 310 wmc_write_masked(WMC_LEFT_ADC_BOOST_CTRL,
311 WMC_L2_2BOOSTVOLw(boost_l), WMC_L2_2BOOSTVOL); 311 boost_l << WMC_L2_2BOOSTVOL_POS, WMC_L2_2BOOSTVOL);
312 wmc_write_masked(WMC_LEFT_DAC_DIGITAL_VOL, dac_l, WMC_DVOL); 312 wmc_write_masked(WMC_LEFT_DAC_DIGITAL_VOL, dac_l, WMC_DVOL);
313 wmc_write_masked(WMC_LOUT1_HP_VOLUME_CTRL, hp_l, WMC_AVOL); 313 wmc_write_masked(WMC_LOUT1_HP_VOLUME_CTRL, hp_l, WMC_AVOL);
314 314
315 wmc_write_masked(WMC_RIGHT_MIXER_CTRL, WMC_BYPRMIXVOLw(mix_r), 315 wmc_write_masked(WMC_RIGHT_MIXER_CTRL, mix_r << WMC_BYPRMIXVOL_POS,
316 WMC_BYPRMIXVOL); 316 WMC_BYPRMIXVOL);
317 wmc_write_masked(WMC_RIGHT_ADC_BOOST_CTRL, 317 wmc_write_masked(WMC_RIGHT_ADC_BOOST_CTRL,
318 WMC_R2_2BOOSTVOLw(boost_r), WMC_R2_2BOOSTVOL); 318 boost_r << WMC_R2_2BOOSTVOL_POS, WMC_R2_2BOOSTVOL);
319 wmc_write_masked(WMC_RIGHT_DAC_DIGITAL_VOL, dac_r, WMC_DVOL); 319 wmc_write_masked(WMC_RIGHT_DAC_DIGITAL_VOL, dac_r, WMC_DVOL);
320 wmc_write_masked(WMC_ROUT1_HP_VOLUME_CTRL, hp_r, WMC_AVOL); 320 wmc_write_masked(WMC_ROUT1_HP_VOLUME_CTRL, hp_r, WMC_AVOL);
321 321
@@ -400,10 +400,10 @@ void audiohw_set_frequency(int fsel)
400 { 400 {
401 [HW_FREQ_8] = /* PLL = 65.536MHz */ 401 [HW_FREQ_8] = /* PLL = 65.536MHz */
402 { 402 {
403 .plln = WMC_PLLNw(7) | WMC_PLL_PRESCALE, 403 .plln = 7 | WMC_PLL_PRESCALE,
404 .pllk1 = WMC_PLLK_23_18w(12414886ul >> 18), 404 .pllk1 = 0x2f, /* 12414886 */
405 .pllk2 = WMC_PLLK_17_9w(12414886ul >> 9), 405 .pllk2 = 0x0b7,
406 .pllk3 = WMC_PLLK_8_0w(12414886ul >> 0), 406 .pllk3 = 0x1a6,
407 .mclkdiv = WMC_MCLKDIV_8, /* 2.0480 MHz */ 407 .mclkdiv = WMC_MCLKDIV_8, /* 2.0480 MHz */
408 .filter = WMC_SR_8KHZ, 408 .filter = WMC_SR_8KHZ,
409 }, 409 },
@@ -414,19 +414,19 @@ void audiohw_set_frequency(int fsel)
414 }, 414 },
415 [HW_FREQ_12] = /* PLL = 73.728 MHz */ 415 [HW_FREQ_12] = /* PLL = 73.728 MHz */
416 { 416 {
417 .plln = WMC_PLLNw(8) | WMC_PLL_PRESCALE, 417 .plln = 8 | WMC_PLL_PRESCALE,
418 .pllk1 = WMC_PLLK_23_18w(11869595ul >> 18), 418 .pllk1 = 0x2d, /* 11869595 */
419 .pllk2 = WMC_PLLK_17_9w(11869595ul >> 9), 419 .pllk2 = 0x08e,
420 .pllk3 = WMC_PLLK_8_0w(11869595ul >> 0), 420 .pllk3 = 0x19b,
421 .mclkdiv = WMC_MCLKDIV_6, /* 3.0720 MHz */ 421 .mclkdiv = WMC_MCLKDIV_6, /* 3.0720 MHz */
422 .filter = WMC_SR_12KHZ, 422 .filter = WMC_SR_12KHZ,
423 }, 423 },
424 [HW_FREQ_16] = /* PLL = 65.536MHz */ 424 [HW_FREQ_16] = /* PLL = 65.536MHz */
425 { 425 {
426 .plln = WMC_PLLNw(7) | WMC_PLL_PRESCALE, 426 .plln = 7 | WMC_PLL_PRESCALE,
427 .pllk1 = WMC_PLLK_23_18w(12414886ul >> 18), 427 .pllk1 = 0x2f, /* 12414886 */
428 .pllk2 = WMC_PLLK_17_9w(12414886ul >> 9), 428 .pllk2 = 0x0b7,
429 .pllk3 = WMC_PLLK_8_0w(12414886ul >> 0), 429 .pllk3 = 0x1a6,
430 .mclkdiv = WMC_MCLKDIV_4, /* 4.0960 MHz */ 430 .mclkdiv = WMC_MCLKDIV_4, /* 4.0960 MHz */
431 .filter = WMC_SR_16KHZ, 431 .filter = WMC_SR_16KHZ,
432 }, 432 },
@@ -437,19 +437,19 @@ void audiohw_set_frequency(int fsel)
437 }, 437 },
438 [HW_FREQ_24] = /* PLL = 73.728 MHz */ 438 [HW_FREQ_24] = /* PLL = 73.728 MHz */
439 { 439 {
440 .plln = WMC_PLLNw(8) | WMC_PLL_PRESCALE, 440 .plln = 8 | WMC_PLL_PRESCALE,
441 .pllk1 = WMC_PLLK_23_18w(11869595ul >> 18), 441 .pllk1 = 0x2d, /* 11869595 */
442 .pllk2 = WMC_PLLK_17_9w(11869595ul >> 9), 442 .pllk2 = 0x08e,
443 .pllk3 = WMC_PLLK_8_0w(11869595ul >> 0), 443 .pllk3 = 0x19b,
444 .mclkdiv = WMC_MCLKDIV_3, /* 6.1440 MHz */ 444 .mclkdiv = WMC_MCLKDIV_3, /* 6.1440 MHz */
445 .filter = WMC_SR_24KHZ, 445 .filter = WMC_SR_24KHZ,
446 }, 446 },
447 [HW_FREQ_32] = /* PLL = 65.536MHz */ 447 [HW_FREQ_32] = /* PLL = 65.536MHz */
448 { 448 {
449 .plln = WMC_PLLNw(7) | WMC_PLL_PRESCALE, 449 .plln = 7 | WMC_PLL_PRESCALE,
450 .pllk1 = WMC_PLLK_23_18w(12414886ul >> 18), 450 .pllk1 = 0x2f, /* 12414886 */
451 .pllk2 = WMC_PLLK_17_9w(12414886ul >> 9), 451 .pllk2 = 0x0b7,
452 .pllk3 = WMC_PLLK_8_0w(12414886ul >> 0), 452 .pllk3 = 0x1a6,
453 .mclkdiv = WMC_MCLKDIV_2, /* 8.1920 MHz */ 453 .mclkdiv = WMC_MCLKDIV_2, /* 8.1920 MHz */
454 .filter = WMC_SR_32KHZ, 454 .filter = WMC_SR_32KHZ,
455 }, 455 },
@@ -460,10 +460,10 @@ void audiohw_set_frequency(int fsel)
460 }, 460 },
461 [HW_FREQ_48] = /* PLL = 73.728 MHz */ 461 [HW_FREQ_48] = /* PLL = 73.728 MHz */
462 { 462 {
463 .plln = WMC_PLLNw(8) | WMC_PLL_PRESCALE, 463 .plln = 8 | WMC_PLL_PRESCALE,
464 .pllk1 = WMC_PLLK_23_18w(11869595ul >> 18), 464 .pllk1 = 0x2d, /* 11869595 */
465 .pllk2 = WMC_PLLK_17_9w(11869595ul >> 9), 465 .pllk2 = 0x08e,
466 .pllk3 = WMC_PLLK_8_0w(11869595ul >> 0), 466 .pllk3 = 0x19b,
467 .mclkdiv = WMC_MCLKDIV_1_5, /* 12.2880 MHz */ 467 .mclkdiv = WMC_MCLKDIV_1_5, /* 12.2880 MHz */
468 .filter = WMC_SR_48KHZ, 468 .filter = WMC_SR_48KHZ,
469 }, 469 },
diff --git a/firmware/export/wm8978.h b/firmware/export/wm8978.h
index 5b77d1ae30..270c666a4a 100644
--- a/firmware/export/wm8978.h
+++ b/firmware/export/wm8978.h
@@ -103,13 +103,9 @@ void wmc_clear(unsigned int reg, unsigned int bits);
103 103
104/* Volume masks and macros for digital volumes */ 104/* Volume masks and macros for digital volumes */
105#define WMC_DVOL 0xff 105#define WMC_DVOL 0xff
106#define WMC_DVOLr(x) ((x) & WMC_DVOL)
107#define WMC_DVOLw(x) ((x) & WMC_DVOL)
108 106
109/* Volums masks and macros for analogue volumes */ 107/* Volums masks and macros for analogue volumes */
110#define WMC_AVOL 0x3f 108#define WMC_AVOL 0x3f
111#define WMC_AVOLr(x) ((x) & WMC_AVOL)
112#define WMC_AVOLw(x) ((x) & WMC_AVOL)
113 109
114/* WMC_SOFTWARE_RESET (0x00) */ 110/* WMC_SOFTWARE_RESET (0x00) */
115#define WMC_RESET 111#define WMC_RESET
@@ -274,14 +270,18 @@ void wmc_clear(unsigned int reg, unsigned int bits);
274 /* 0.5dB steps: Mute:0x00, -127dB:0x01...0dB:0xff */ 270 /* 0.5dB steps: Mute:0x00, -127dB:0x01...0dB:0xff */
275 /*Use WMC_DVOL* macros */ 271 /*Use WMC_DVOL* macros */
276 272
277/* Macros for EQ gain and cutoff */ 273/* Gain */
278#define WMC_EQGC 0x1f 274#define WMC_EQG (0x1f << 0)
279#define WMC_EQGCr(x) ((x) & WMC_EQGC) 275
280#define WMC_EQGCw(x) ((x) & WMC_EQGC) 276/* Cutoff/Center */
277#define WMC_EQC (0x3 << 5)
278#define WMC_EQC_POS (5)
279
280/* Bandwidth */
281#define WMC_EQBW (1 << 8)
281 282
282/* WMC_EQ1_LOW_SHELF (0x12) */ 283/* WMC_EQ1_LOW_SHELF (0x12) */
283#define WMC_EQ3DMODE (1 << 8) 284#define WMC_EQ3DMODE (1 << 8)
284#define WMC_EQ1C (3 << 5) /* Cutoff */
285 #define WMC_EQ1C_80HZ (0 << 5) /* 80Hz */ 285 #define WMC_EQ1C_80HZ (0 << 5) /* 80Hz */
286 #define WMC_EQ1C_105HZ (1 << 5) /* 105Hz */ 286 #define WMC_EQ1C_105HZ (1 << 5) /* 105Hz */
287 #define WMC_EQ1C_135HZ (2 << 5) /* 135Hz */ 287 #define WMC_EQ1C_135HZ (2 << 5) /* 135Hz */
@@ -289,8 +289,6 @@ void wmc_clear(unsigned int reg, unsigned int bits);
289 /* 00000=+12dB, 00001=+11dB...(-1dB steps)...11000=-12dB, 11001-11111=reserved */ 289 /* 00000=+12dB, 00001=+11dB...(-1dB steps)...11000=-12dB, 11001-11111=reserved */
290 290
291/* WMC_EQ2_PEAK1 (0x13) */ 291/* WMC_EQ2_PEAK1 (0x13) */
292#define WMC_EQ2BW (1 << 8)
293#define WMC_EQ2C (3 << 5) /* Center */
294 #define WMC_EQ2C_230HZ (0 << 5) /* 230Hz */ 292 #define WMC_EQ2C_230HZ (0 << 5) /* 230Hz */
295 #define WMC_EQ2C_300HZ (1 << 5) /* 300Hz */ 293 #define WMC_EQ2C_300HZ (1 << 5) /* 300Hz */
296 #define WMC_EQ2C_385HZ (2 << 5) /* 385Hz */ 294 #define WMC_EQ2C_385HZ (2 << 5) /* 385Hz */
@@ -299,8 +297,6 @@ void wmc_clear(unsigned int reg, unsigned int bits);
299 11001-11111=reserved */ 297 11001-11111=reserved */
300 298
301/* WMC_EQ3_PEAK2 (0x14) */ 299/* WMC_EQ3_PEAK2 (0x14) */
302#define WMC_EQ3BW (1 << 8)
303#define WMC_EQ3C (3 << 5) /* Center */
304 #define WMC_EQ3C_650HZ (0 << 5) /* 650Hz */ 300 #define WMC_EQ3C_650HZ (0 << 5) /* 650Hz */
305 #define WMC_EQ3C_850HZ (1 << 5) /* 850Hz */ 301 #define WMC_EQ3C_850HZ (1 << 5) /* 850Hz */
306 #define WMC_EQ3C_1_1KHZ (2 << 5) /* 1.1kHz */ 302 #define WMC_EQ3C_1_1KHZ (2 << 5) /* 1.1kHz */
@@ -309,8 +305,6 @@ void wmc_clear(unsigned int reg, unsigned int bits);
309 11001-11111=reserved */ 305 11001-11111=reserved */
310 306
311/* WMC_EQ4_PEAK3 (0x15) */ 307/* WMC_EQ4_PEAK3 (0x15) */
312#define WMC_EQ4BW (1 << 8)
313#define WMC_EQ4C (3 << 5) /* Center */
314 #define WMC_EQ4C_1_8KHZ (0 << 5) /* 1.8kHz */ 308 #define WMC_EQ4C_1_8KHZ (0 << 5) /* 1.8kHz */
315 #define WMC_EQ4C_2_4KHZ (1 << 5) /* 2.4kHz */ 309 #define WMC_EQ4C_2_4KHZ (1 << 5) /* 2.4kHz */
316 #define WMC_EQ4C_3_2KHZ (2 << 5) /* 3.2kHz */ 310 #define WMC_EQ4C_3_2KHZ (2 << 5) /* 3.2kHz */
@@ -319,7 +313,6 @@ void wmc_clear(unsigned int reg, unsigned int bits);
319 11001-11111=reserved */ 313 11001-11111=reserved */
320 314
321/* WMC_EQ5_HIGH_SHELF (0x16) */ 315/* WMC_EQ5_HIGH_SHELF (0x16) */
322#define WMC_EQ5C (3 << 5) /* Cutoff */
323 #define WMC_EQ5C_5_3KHZ (0 << 5) /* 5.3kHz */ 316 #define WMC_EQ5C_5_3KHZ (0 << 5) /* 5.3kHz */
324 #define WMC_EQ5C_6_9KHZ (1 << 5) /* 6.9kHz */ 317 #define WMC_EQ5C_6_9KHZ (1 << 5) /* 6.9kHz */
325 #define WMC_EQ5C_9KHZ (2 << 5) /* 9.0kHz */ 318 #define WMC_EQ5C_9KHZ (2 << 5) /* 9.0kHz */
@@ -331,29 +324,20 @@ void wmc_clear(unsigned int reg, unsigned int bits);
331#define WMC_LIMEN (1 << 8) 324#define WMC_LIMEN (1 << 8)
332 /* 0000=750uS, 0001=1.5mS...(x2 each step)...1010-1111=768mS */ 325 /* 0000=750uS, 0001=1.5mS...(x2 each step)...1010-1111=768mS */
333#define WMC_LIMDCY (0xf << 4) 326#define WMC_LIMDCY (0xf << 4)
334 #define WMC_LIMDCYr(x) (((x) & WMC_LIMDCY) >> 4) 327#define WMC_LIMDCY_POS (4)
335 #define WMC_LIMDCYw(x) (((x) << 4) & WMC_LIMDCY)
336 /* 0000=94uS, 0001=188uS...(x2 each step)...1011-1111=192mS */ 328 /* 0000=94uS, 0001=188uS...(x2 each step)...1011-1111=192mS */
337#define WMC_LIMATK (0xf << 0) 329#define WMC_LIMATK (0xf << 0)
338 #define WMC_LIMATKr(x) ((x) & WMC_LIMATK)
339 #define WMC_LIMATKw(x) ((x) & WMC_LIMATK)
340 330
341/* WMC_DAC_LIMITER2 (0x19) */ 331/* WMC_DAC_LIMITER2 (0x19) */
342#define WMC_LIMLVL (7 << 4)
343 /* 000=-1dB, 001=-2dB...(-1dB steps)...101-111:-6dB */ 332 /* 000=-1dB, 001=-2dB...(-1dB steps)...101-111:-6dB */
344 #define WMC_LIMLVLr(x) (((x) & WMC_LIMLVL) >> 4) 333#define WMC_LIMLVL (7 << 4)
345 #define WMC_LIMLVLw(x) (((x) << 4) & WMC_LIMLVL) 334#define WMC_LIMLVL_POS (4)
346#define WMC_LIMBOOST (0xf << 0)
347 /* 0000=0dB, 0001=+1dB...1100=+12dB, 1101-1111=reserved */ 335 /* 0000=0dB, 0001=+1dB...1100=+12dB, 1101-1111=reserved */
348 #define WMC_LIMBOOSTr(x) (((x) & WMC_LIMBOOST) 336#define WMC_LIMBOOST (0xf << 0)
349 #define WMC_LIMBOOSTw(x) (((x) & WMC_LIMBOOST)
350
351 337
352/* Generic notch filter bits and macros */ 338/* Generic notch filter bits and macros */
353#define WMC_NFU (1 << 8) 339#define WMC_NFU (1 << 8)
354#define WMC_NFA (0x7f << 0) 340#define WMC_NFA (0x7f << 0)
355#define WMC_NFAr(x) ((x) & WMC_NFA)
356#define WMC_NFAw(x) ((x) & WMC_NFA)
357 341
358/* WMC_NOTCH_FILTER1 (0x1b) */ 342/* WMC_NOTCH_FILTER1 (0x1b) */
359#define WMC_NFEN (1 << 7) 343#define WMC_NFEN (1 << 7)
@@ -369,24 +353,18 @@ void wmc_clear(unsigned int reg, unsigned int bits);
369 #define WMC_ALCSEL_BOTH_ON (3 << 7) 353 #define WMC_ALCSEL_BOTH_ON (3 << 7)
370 /* 000=-6.75dB, 001=-0.75dB...(6dB steps)...111=+35.25dB */ 354 /* 000=-6.75dB, 001=-0.75dB...(6dB steps)...111=+35.25dB */
371#define WMC_ALCMAXGAIN (7 << 3) 355#define WMC_ALCMAXGAIN (7 << 3)
372 #define WMC_ALCMAXGAINr(x) (((x) & WMC_ALCMAXGAIN) >> 3) 356#define WMC_ALCMAXGAIN_POS (3)
373 #define WMC_ALCMAXGAINw(x) (((x) << 3) & WMC_ALCMAXGAIN)
374 /* 000:-12dB...(6dB steps)...111:+30dB */ 357 /* 000:-12dB...(6dB steps)...111:+30dB */
375#define WMC_ALCMINGAIN (7 << 0) 358#define WMC_ALCMINGAIN (7 << 0)
376 #define WMC_ALCMINGAINr(x) ((x) & WMC_ALCMINGAIN)
377 #define WMC_ALCMINGAINw(x) ((x) & WMC_ALCMINGAIN)
378 359
379/* WMC_ALC_CONTROL2 (0x21) */ 360/* WMC_ALC_CONTROL2 (0x21) */
380 /* 0000=0ms, 0001=2.67ms, 0010=5.33ms... 361 /* 0000=0ms, 0001=2.67ms, 0010=5.33ms...
381 (2x with every step)...43.691s */ 362 (2x with every step)...43.691s */
382#define WMC_ALCHLD (0xf << 4) 363#define WMC_ALCHLD (0xf << 4)
383 #define WMC_ALCHLDr(x) (((x) & WMC_ALCHLD) >> 4) 364#define WMC_ALCHLD_POS (4)
384 #define WMC_ALCHLDw(x) (((x) << 4) & WMC_ALCHLD)
385 /* 1111:-1.5dBFS, 1110:-1.5dBFS, 1101:-3dBFS, 1100:-4.5dBFS... 365 /* 1111:-1.5dBFS, 1110:-1.5dBFS, 1101:-3dBFS, 1100:-4.5dBFS...
386 (-1.5dB steps)...0001:-21dBFS, 0000:-22.5dBFS */ 366 (-1.5dB steps)...0001:-21dBFS, 0000:-22.5dBFS */
387#define WMC_ALCLVL (0xf << 0) 367#define WMC_ALCLVL (0xf << 0)
388 #define WMC_ALCLVLr(x) ((x) & WMC_ALCLVL)
389 #define WMC_ALCLVLw(x) ((x) & WMC_ALCLVL)
390 368
391/* WMC_ALC_CONTROL3 (0x22) */ 369/* WMC_ALC_CONTROL3 (0x22) */
392#define WMC_ALCMODE (1 << 8) 370#define WMC_ALCMODE (1 << 8)
@@ -397,43 +375,30 @@ void wmc_clear(unsigned int reg, unsigned int bits);
397#define WMC_NGEN (1 << 3) 375#define WMC_NGEN (1 << 3)
398 /* 000=-39dB, 001=-45dB, 010=-51dB...(6dB steps)...111=-81dB */ 376 /* 000=-39dB, 001=-45dB, 010=-51dB...(6dB steps)...111=-81dB */
399#define WMC_NGTH (7 << 0) 377#define WMC_NGTH (7 << 0)
400 #define WMC_NGTHr(x) ((x) & WMC_NGTH)
401 #define WMC_NGTHw(x) ((x) & WMC_NGTH)
402 378
403/* WMC_PLL_N (0x24) */ 379/* WMC_PLL_N (0x24) */
404#define WMC_PLL_PRESCALE (1 << 4) 380#define WMC_PLL_PRESCALE (1 << 4)
405#define WMC_PLLN (0xf << 0) 381#define WMC_PLLN (0xf << 0)
406 #define WMC_PLLNr(x) ((x) & WMC_PLLN)
407 #define WMC_PLLNw(x) ((x) & WMC_PLLN)
408 382
409/* WMC_PLL_K1 (0x25) */ 383/* WMC_PLL_K1 (0x25) */
410#define WMC_PLLK_23_18 (0x3f << 0) 384#define WMC_PLLK_23_18 (0x3f << 0)
411 #define WMC_PLLK_23_18r(x) ((x) & WMC_PLLK_23_18)
412 #define WMC_PLLK_23_18w(x) ((x) & WMC_PLLK_23_18)
413 385
414/* WMC_PLL_K2 (0x26) */ 386/* WMC_PLL_K2 (0x26) */
415#define WMC_PLLK_17_9 (0x1ff << 0) 387#define WMC_PLLK_17_9 (0x1ff << 0)
416 #define WMC_PLLK_17_9r(x) ((x) & WMC_PLLK_17_9)
417 #define WMC_PLLK_17_9w(x) ((x) & WMC_PLLK_17_9)
418 388
419/* WMC_PLL_K3 (0x27) */ 389/* WMC_PLL_K3 (0x27) */
420#define WMC_PLLK_8_0 (0x1ff << 0) 390#define WMC_PLLK_8_0 (0x1ff << 0)
421 #define WMC_PLLK_8_0r(x) ((x) & WMC_PLLK_8_0)
422 #define WMC_PLLK_8_0w(x) ((x) & WMC_PLLK_8_0)
423 391
424/* WMC_3D_CONTROL (0x29) */ 392/* WMC_3D_CONTROL (0x29) */
425 /* 0000: 0%, 0001: 6.67%...1110: 93.3%, 1111: 100% */ 393 /* 0000: 0%, 0001: 6.67%...1110: 93.3%, 1111: 100% */
426#define WMC_DEPTH3D (0xf << 0) 394#define WMC_DEPTH3D (0xf << 0)
427 #define WMC_DEPTH3Dw(x) ((x) & WMC_DEPTH3D)
428 #define WMC_DEPTH3Dr(x) ((x) & WMC_DEPTH3D)
429 395
430/* WMC_BEEP_CONTROL (0x2b) */ 396/* WMC_BEEP_CONTROL (0x2b) */
431#define WMC_MUTERPGA2INV (1 << 5) 397#define WMC_MUTERPGA2INV (1 << 5)
432#define WMC_INVROUT2 (1 << 4) 398#define WMC_INVROUT2 (1 << 4)
433 /* 000=-15dB, 001=-12dB...111=+6dB */ 399 /* 000=-15dB, 001=-12dB...111=+6dB */
434#define WMC_BEEPVOL (7 << 1) 400#define WMC_BEEPVOL (7 << 1)
435 #define WMC_BEEPVOLr(x) (((x) & WMC_BEEPVOL) >> 1) 401#define WMC_BEEPVOL_POS (1)
436 #define WMC_BEEPVOLw(x) (((x) << 1) & WMC_BEEPVOL)
437#define WMC_BEEPEN (1 << 0) 402#define WMC_BEEPEN (1 << 0)
438 403
439/* WMC_INPUT_CTRL (0x2c) */ 404/* WMC_INPUT_CTRL (0x2c) */
@@ -457,23 +422,17 @@ void wmc_clear(unsigned int reg, unsigned int bits);
457#define WMC_PGABOOSTL (1 << 8) 422#define WMC_PGABOOSTL (1 << 8)
458 /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */ 423 /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */
459#define WMC_L2_2BOOSTVOL (7 << 4) 424#define WMC_L2_2BOOSTVOL (7 << 4)
460 #define WMC_L2_2BOOSTVOLr(x) (((x) & WMC_L2_2BOOSTVOL) >> 4) 425#define WMC_L2_2BOOSTVOL_POS (4)
461 #define WMC_L2_2BOOSTVOLw(x) (((x) << 4) & WMC_L2_2BOOSTVOL)
462 /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */ 426 /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */
463#define WMC_AUXL2BOOSTVOL (7 << 0) 427#define WMC_AUXL2BOOSTVOL (7 << 0)
464 #define WMC_AUXL2BOOSTVOLr(x) ((x) & WMC_AUXL2BOOSTVOL)
465 #define WMC_AUXL2BOOSTVOLw(x) ((x) & WMC_AUXL2BOOSTVOL)
466 428
467/* WMC_RIGHT_ADC_BOOST_CTRL (0x30) */ 429/* WMC_RIGHT_ADC_BOOST_CTRL (0x30) */
468#define WMC_PGABOOSTR (1 << 8) 430#define WMC_PGABOOSTR (1 << 8)
469 /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */ 431 /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */
470#define WMC_R2_2BOOSTVOL (7 << 4) 432#define WMC_R2_2BOOSTVOL (7 << 4)
471 #define WMC_R2_2BOOSTVOLr(x) (((x) & WMC_R2_2BOOSTVOL) >> 4) 433#define WMC_R2_2BOOSTVOL_POS (4)
472 #define WMC_R2_2BOOSTVOLw(x) (((x) << 4) & WMC_R2_2BOOSTVOL)
473 /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */ 434 /* 000=disabled, 001=-12dB, 010=-9dB...111=+6dB */
474#define WMC_AUXR2BOOSTVOL (7 << 0) 435#define WMC_AUXR2BOOSTVOL (7 << 0)
475 #define WMC_AUXR2BOOSTVOLr(x) ((x) & WMC_AUXR2BOOSTVOL)
476 #define WMC_AUXR2BOOSTVOLw(x) ((x) & WMC_AUXR2BOOSTVOL)
477 436
478/* WMC_OUTPUT_CTRL (0x31) */ 437/* WMC_OUTPUT_CTRL (0x31) */
479#define WMC_DACL2RMIX (1 << 6) 438#define WMC_DACL2RMIX (1 << 6)
@@ -487,26 +446,22 @@ void wmc_clear(unsigned int reg, unsigned int bits);
487/* WMC_LEFT_MIXER_CTRL (0x32) */ 446/* WMC_LEFT_MIXER_CTRL (0x32) */
488 /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */ 447 /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */
489#define WMC_AUXLMIXVOL (7 << 6) 448#define WMC_AUXLMIXVOL (7 << 6)
490 #define WMC_AUXLMIXVOLr(x) (((x) & WMC_AUXLMIXVOL) >> 6) 449#define WMC_AUXLMIXVOL_POS (6)
491 #define WMC_AUXLMIXVOLw(x) (((x) << 6) & WMC_AUXLMIXVOL)
492#define WMC_AUXL2LMIX (1 << 5) 450#define WMC_AUXL2LMIX (1 << 5)
493 /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */ 451 /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */
494#define WMC_BYPLMIXVOL (7 << 2) 452#define WMC_BYPLMIXVOL (7 << 2)
495 #define WMC_BYPLMIXVOLr(x) (((x) & WMC_BYPLMIXVOL) >> 2) 453#define WMC_BYPLMIXVOL_POS (2)
496 #define WMC_BYPLMIXVOLw(x) (((x) << 2) & WMC_BYPLMIXVOL)
497#define WMC_BYPL2LMIX (1 << 1) 454#define WMC_BYPL2LMIX (1 << 1)
498#define WMC_DACL2LMIX (1 << 0) 455#define WMC_DACL2LMIX (1 << 0)
499 456
500/* WMC_RIGHT_MIXER_CTRL (0x33) */ 457/* WMC_RIGHT_MIXER_CTRL (0x33) */
501 /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */ 458 /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */
502#define WMC_AUXRMIXVOL (7 << 6) 459#define WMC_AUXRMIXVOL (7 << 6)
503 #define WMC_AUXRMIXVOLr(x) (((x) & WMC_AUXRMIXVOL) >> 6) 460#define WMC_AUXRMIXVOL_POS (6)
504 #define WMC_AUXRMIXVOLw(x) (((x) << 6) & WMC_AUXRMIXVOL)
505#define WMC_AUXR2RMIX (1 << 5) 461#define WMC_AUXR2RMIX (1 << 5)
506 /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */ 462 /* 000=-15dB, 001=-12dB...101=0dB, 110=+3dB, 111=+6dB */
507#define WMC_BYPRMIXVOL (7 << 2) 463#define WMC_BYPRMIXVOL (7 << 2)
508 #define WMC_BYPRMIXVOLr(x) (((x) & WMC_BYPRMIXVOL) >> 2) 464#define WMC_BYPRMIXVOL_POS (2)
509 #define WMC_BYPRMIXVOLw(x) (((x) << 2) & WMC_BYPRMIXVOL)
510#define WMC_BYPR2RMIX (1 << 1) 465#define WMC_BYPR2RMIX (1 << 1)
511#define WMC_DACR2RMIX (1 << 0) 466#define WMC_DACR2RMIX (1 << 0)
512 467