x1000: restore crt0.S cache flush

I-cache must be flushed after copying code to IRAM... duh.

Change-Id: I6eacc4b7c4385175724c947f6c53f7bbddcb6295

1 files changed, 19 insertions, 1 deletions

diff --git a/firmware/target/mips/ingenic_x1000/crt0.S b/firmware/target/mips/ingenic_x1000/crt0.S
index 5610587094..fbac12861d 100644
--- a/firmware/target/mips/ingenic_x1000/crt0.S
+++ b/firmware/target/mips/ingenic_x1000/crt0.S
@@ -7,7 +7,7 @@
  *                     \/            \/     \/    \/            \/
  * $Id$
  *
- * Copyright (C) 2021 Aidan MacDonald
+ * Copyright (C) 2021-2022 Aidan MacDonald
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License
@@ -82,6 +82,24 @@ _realstart:
     bal     _clear
     move    a1, k0
 
+    /* Write back D-cache and invalidate I-cache  */
+    li      v0, 0x80000000
+    ori     v1, v0, (0x4000 - 32)
+    mtc0    zero, C0_TAGLO
+    mtc0    zero, C0_TAGHI
+1:
+    cache   DCIndexWBInv, 0(v0)
+    cache   ICIndexStTag, 0(v0)
+    bne     v0, v1, 1b
+    addiu   v0, v0, 32
+
+    /* Invalidate BTB */
+    mfc0    v0, C0_Config, 7
+    nop
+    ori     v0, v0, 2
+    mtc0    v0, C0_Config, 7
+    nop
+
     /* Jump to C code */
     jal     system_early_init
     nop