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authorAmaury Pouly <amaury.pouly@gmail.com>2016-09-22 21:02:44 +0100
committerAmaury Pouly <amaury.pouly@gmail.com>2016-09-22 21:03:31 +0100
commit673ee486758504c25dd794e460a58d86181be133 (patch)
tree88a90eb7f767d472420876a0f9331a6221120885
parent420eb66cab6f4664b37dcb985ebad34ce2f475fc (diff)
downloadrockbox-673ee486758504c25dd794e460a58d86181be133.tar.gz
rockbox-673ee486758504c25dd794e460a58d86181be133.zip
imx233: fix dualboot stubs
They did not compile anymore after the register hearder rework. This change only fixes the syntax, the generated binaries are exactly identical. Change-Id: Iec2347aa3deb1ddfe2ca36f0db1e481c4e2d329c
-rw-r--r--rbutil/mkimxboot/dualboot/dualboot.c42
1 files changed, 21 insertions, 21 deletions
diff --git a/rbutil/mkimxboot/dualboot/dualboot.c b/rbutil/mkimxboot/dualboot/dualboot.c
index 17d02ebe08..82568b8893 100644
--- a/rbutil/mkimxboot/dualboot/dualboot.c
+++ b/rbutil/mkimxboot/dualboot/dualboot.c
@@ -18,11 +18,11 @@
18 * KIND, either express or implied. 18 * KIND, either express or implied.
19 * 19 *
20 ****************************************************************************/ 20 ****************************************************************************/
21#include "regs-pinctrl.h" 21#include "pinctrl.h"
22#include "regs-power.h" 22#include "power.h"
23#include "regs-lradc.h" 23#include "lradc.h"
24#include "regs-digctl.h" 24#include "digctl.h"
25#include "regs-clkctrl.h" 25#include "clkctrl.h"
26 26
27#define BOOT_ROM_CONTINUE 0 /* continue boot */ 27#define BOOT_ROM_CONTINUE 0 /* continue boot */
28#define BOOT_ROM_SECTION 1 /* switch to new section *result_id */ 28#define BOOT_ROM_SECTION 1 /* switch to new section *result_id */
@@ -76,8 +76,8 @@ static inline void __attribute__((always_inline)) setup_lradc(int src)
76 HW_LRADC_CTRL4_CLR = BM_LRADC_CTRL4_LRADCxSELECT(src); 76 HW_LRADC_CTRL4_CLR = BM_LRADC_CTRL4_LRADCxSELECT(src);
77 HW_LRADC_CTRL4_SET = src << BP_LRADC_CTRL4_LRADCxSELECT(src); 77 HW_LRADC_CTRL4_SET = src << BP_LRADC_CTRL4_LRADCxSELECT(src);
78#endif 78#endif
79 HW_LRADC_CHn_CLR(src) = BM_OR2(LRADC_CHn, NUM_SAMPLES, ACCUMULATE); 79 HW_LRADC_CHn_CLR(src) = BM_OR(LRADC_CHn, NUM_SAMPLES, ACCUMULATE);
80 BF_SETV(LRADC_CTRL2, DIVIDE_BY_TWO, 1 << src); 80 BF_WR(LRADC_CTRL2_SET, DIVIDE_BY_TWO(1 << src));
81} 81}
82 82
83#define BP_LRADC_CTRL1_LRADCx_IRQ(x) (x) 83#define BP_LRADC_CTRL1_LRADCx_IRQ(x) (x)
@@ -86,9 +86,9 @@ static inline void __attribute__((always_inline)) setup_lradc(int src)
86static inline int __attribute__((always_inline)) read_lradc(int src) 86static inline int __attribute__((always_inline)) read_lradc(int src)
87{ 87{
88 BF_CLR(LRADC_CTRL1, LRADCx_IRQ(src)); 88 BF_CLR(LRADC_CTRL1, LRADCx_IRQ(src));
89 BF_SETV(LRADC_CTRL0, SCHEDULE, 1 << src); 89 BF_WR(LRADC_CTRL0_SET, SCHEDULE(1 << src));
90 while(!BF_RD(LRADC_CTRL1, LRADCx_IRQ(src))); 90 while(!BF_RD(LRADC_CTRL1, LRADCx_IRQ(src)));
91 return BF_RDn(LRADC_CHn, src, VALUE); 91 return BF_RD(LRADC_CHn(src), VALUE);
92} 92}
93 93
94static inline void __attribute__((noreturn)) power_down() 94static inline void __attribute__((noreturn)) power_down()
@@ -100,7 +100,7 @@ static inline void __attribute__((noreturn)) power_down()
100 HW_PINCTRL_DOUTn(0) = 1 << 9; 100 HW_PINCTRL_DOUTn(0) = 1 << 9;
101#endif 101#endif
102 /* power down */ 102 /* power down */
103 HW_POWER_RESET = BM_OR2(POWER_RESET, UNLOCK, PWD); 103 HW_POWER_RESET = BM_OR(POWER_RESET, UNLOCK, PWD);
104 while(1); 104 while(1);
105} 105}
106 106
@@ -244,23 +244,23 @@ static inline void do_charge(void)
244{ 244{
245 BF_CLR(LRADC_CTRL0, SFTRST); 245 BF_CLR(LRADC_CTRL0, SFTRST);
246 BF_CLR(LRADC_CTRL0, CLKGATE); 246 BF_CLR(LRADC_CTRL0, CLKGATE);
247 BF_WRn(LRADC_DELAYn, 0, TRIGGER_LRADCS, 0x80); 247 BF_WR(LRADC_DELAYn(0), TRIGGER_LRADCS(0x80));
248 BF_WRn(LRADC_DELAYn, 0, TRIGGER_DELAYS, 0x1); 248 BF_WR(LRADC_DELAYn(0), TRIGGER_DELAYS(0x1));
249 BF_WRn(LRADC_DELAYn, 0, DELAY, 200); 249 BF_WR(LRADC_DELAYn(0), DELAY(200));
250 BF_SETn(LRADC_DELAYn, 0, KICK); 250 BF_SET(LRADC_DELAYn(0), KICK);
251 BF_SET(LRADC_CONVERSION, AUTOMATIC); 251 BF_SET(LRADC_CONVERSION, AUTOMATIC);
252 BF_WR_V(LRADC_CONVERSION, SCALE_FACTOR, LI_ION); 252 BF_WR(LRADC_CONVERSION, SCALE_FACTOR_V(LI_ION));
253 BF_WR(POWER_CHARGE, STOP_ILIMIT, 1); 253 BF_WR(POWER_CHARGE, STOP_ILIMIT(1));
254 BF_WR(POWER_CHARGE, BATTCHRG_I, 0x10); 254 BF_WR(POWER_CHARGE, BATTCHRG_I(0x10));
255 BF_CLR(POWER_CHARGE, PWD_BATTCHRG); 255 BF_CLR(POWER_CHARGE, PWD_BATTCHRG);
256#if IMX233_SUBTARGET >= 3780 256#if IMX233_SUBTARGET >= 3780
257 BF_WR(POWER_DCDC4P2, ENABLE_4P2, 1); 257 BF_WR(POWER_DCDC4P2, ENABLE_4P2(1));
258 BF_CLR(POWER_5VCTRL, PWD_CHARGE_4P2); 258 BF_CLR(POWER_5VCTRL, PWD_CHARGE_4P2);
259 BF_WR(POWER_5VCTRL, CHARGE_4P2_ILIMIT, 0x10); 259 BF_WR(POWER_5VCTRL, CHARGE_4P2_ILIMIT(0x10));
260#endif 260#endif
261 while(1) 261 while(1)
262 { 262 {
263 BF_WR(CLKCTRL_CPU, INTERRUPT_WAIT, 1); 263 BF_WR(CLKCTRL_CPU, INTERRUPT_WAIT(1));
264 asm volatile ( 264 asm volatile (
265 "mcr p15, 0, %0, c7, c0, 4 \n" /* Wait for interrupt */ 265 "mcr p15, 0, %0, c7, c0, 4 \n" /* Wait for interrupt */
266 "nop\n" /* Datasheet unclear: "The lr sent to handler points here after RTI"*/ 266 "nop\n" /* Datasheet unclear: "The lr sent to handler points here after RTI"*/
@@ -290,4 +290,4 @@ int main(uint32_t arg, uint32_t *result_id)
290int __attribute__((section(".start"))) start(uint32_t arg, uint32_t *result_id) 290int __attribute__((section(".start"))) start(uint32_t arg, uint32_t *result_id)
291{ 291{
292 return main(arg, result_id); 292 return main(arg, result_id);
293} \ No newline at end of file 293}