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| author | Linus Nielsen Feltzing <linus@haxx.se> | 2008-02-20 17:53:00 +0000 |
|---|---|---|
| committer | Linus Nielsen Feltzing <linus@haxx.se> | 2008-02-20 17:53:00 +0000 |
| commit | 66827f3a18c3dbc31fe587de094d197d79410749 (patch) | |
| tree | 104a17b2ea12abf53340d2855d4ef141b3d60f83 | |
| parent | 9d99f9764fdaf4797bc031f35efef78c2e0751b8 (diff) | |
| download | rockbox-66827f3a18c3dbc31fe587de094d197d79410749.tar.gz rockbox-66827f3a18c3dbc31fe587de094d197d79410749.zip | |
Added PP5020 serial port registers
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16358 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/export/pp5020.h | 33 |
1 files changed, 31 insertions, 2 deletions
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h index 0dcd7b362d..bda466527c 100644 --- a/firmware/export/pp5020.h +++ b/firmware/export/pp5020.h | |||
| @@ -451,8 +451,37 @@ | |||
| 451 | #define LCD1_BUSY_MASK 0x8000 | 451 | #define LCD1_BUSY_MASK 0x8000 |
| 452 | 452 | ||
| 453 | /* Serial Controller */ | 453 | /* Serial Controller */ |
| 454 | #define SERIAL0 (*(volatile unsigned long*)(0x70006000)) | 454 | #define SER0_BASE (*(volatile unsigned long*)(0x70006000)) |
| 455 | #define SERIAL1 (*(volatile unsigned long*)(0x70006040)) | 455 | |
| 456 | #define SER0_RBR (*(volatile unsigned long*)(0x70006000)) | ||
| 457 | #define SER0_THR (*(volatile unsigned long*)(0x70006000)) | ||
| 458 | #define SER0_IER (*(volatile unsigned long*)(0x70006004)) | ||
| 459 | #define SER0_FCR (*(volatile unsigned long*)(0x70006008)) | ||
| 460 | #define SER0_IIR (*(volatile unsigned long*)(0x70006008)) | ||
| 461 | #define SER0_LCR (*(volatile unsigned long*)(0x7000600c)) | ||
| 462 | #define SER0_MCR (*(volatile unsigned long*)(0x70006010)) | ||
| 463 | #define SER0_LSR (*(volatile unsigned long*)(0x70006014)) | ||
| 464 | #define SER0_MSR (*(volatile unsigned long*)(0x70006018)) | ||
| 465 | #define SER0_SPR (*(volatile unsigned long*)(0x7000601c)) | ||
| 466 | |||
| 467 | #define SER0_DLL (*(volatile unsigned long*)(0x70006000)) | ||
| 468 | #define SER0_DLM (*(volatile unsigned long*)(0x70006004)) | ||
| 469 | |||
| 470 | #define SER1_BASE (*(volatile unsigned long*)(0x70006040)) | ||
| 471 | |||
| 472 | #define SER1_RBR (*(volatile unsigned long*)(0x70006040)) | ||
| 473 | #define SER1_THR (*(volatile unsigned long*)(0x70006040)) | ||
| 474 | #define SER1_IER (*(volatile unsigned long*)(0x70006044)) | ||
| 475 | #define SER1_FCR (*(volatile unsigned long*)(0x70006048)) | ||
| 476 | #define SER1_IIR (*(volatile unsigned long*)(0x70006048)) | ||
| 477 | #define SER1_LCR (*(volatile unsigned long*)(0x7000604c)) | ||
| 478 | #define SER1_MCR (*(volatile unsigned long*)(0x70006050)) | ||
| 479 | #define SER1_LSR (*(volatile unsigned long*)(0x70006054)) | ||
| 480 | #define SER1_MSR (*(volatile unsigned long*)(0x70006058)) | ||
| 481 | #define SER1_SPR (*(volatile unsigned long*)(0x7000605c)) | ||
| 482 | |||
| 483 | #define SER1_DLL (*(volatile unsigned long*)(0x70006040)) | ||
| 484 | #define SER1_DLM (*(volatile unsigned long*)(0x70006044)) | ||
| 456 | 485 | ||
| 457 | /* Second ("color") LCD bridge */ | 486 | /* Second ("color") LCD bridge */ |
| 458 | #define LCD2_BASE 0x70008a00 | 487 | #define LCD2_BASE 0x70008a00 |