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authorTomasz Moń <desowin@gmail.com>2021-06-24 14:00:19 +0200
committerTomasz Moń <desowin@gmail.com>2021-06-25 14:10:15 +0000
commit635ec5bbbd00bd5b6c0eff7fc459155cd84d5fe1 (patch)
tree6a409a78826c63cf6a61fbaa7552fcd4b0aaec2e
parentb972fe4cdf43abbe4bfd850f3df86fbeec93194c (diff)
downloadrockbox-635ec5bbbd00bd5b6c0eff7fc459155cd84d5fe1.tar.gz
rockbox-635ec5bbbd00bd5b6c0eff7fc459155cd84d5fe1.zip
Sansa Connect: Manually drive SPI Slave Select
Keep Slave Select active during command transmission. This relaxes timing requirements on the AVR side. Change-Id: Ia1a6cf45aba3c11f6aeaa7441c6793807ca827f0
-rw-r--r--firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c21
1 files changed, 19 insertions, 2 deletions
diff --git a/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c b/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c
index 2a71563c0b..ca76100e8b 100644
--- a/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c
+++ b/firmware/target/arm/tms320dm320/sansa-connect/avr-sansaconnect.c
@@ -333,6 +333,18 @@ static uint8_t spi_read_byte(void)
333 return rxdata & 0xFF; 333 return rxdata & 0xFF;
334} 334}
335 335
336static void avr_hid_select(void)
337{
338 /* Drive GIO29 (AVR SS) low */
339 IO_GIO_BITCLR1 = (1 << 13);
340}
341
342static void avr_hid_release(void)
343{
344 /* Drive GIO29 (AVR SS) high */
345 IO_GIO_BITSET1 = (1 << 13);
346}
347
336static bool avr_run_command(uint8_t opcode, uint8_t *data, size_t data_length) 348static bool avr_run_command(uint8_t opcode, uint8_t *data, size_t data_length)
337{ 349{
338 bool success = true; 350 bool success = true;
@@ -351,6 +363,8 @@ static bool avr_run_command(uint8_t opcode, uint8_t *data, size_t data_length)
351 bitset16(&IO_CLK_MOD2, CLK_MOD2_SIF1); 363 bitset16(&IO_CLK_MOD2, CLK_MOD2_SIF1);
352 IO_SERIAL1_TX_ENABLE = 0x0001; 364 IO_SERIAL1_TX_ENABLE = 0x0001;
353 365
366 avr_hid_select();
367
354 IO_SERIAL1_TX_DATA = CMD_SYNC; 368 IO_SERIAL1_TX_DATA = CMD_SYNC;
355 spi_read_byte(); 369 spi_read_byte();
356 /* Allow AVR to process CMD_SYNC */ 370 /* Allow AVR to process CMD_SYNC */
@@ -393,6 +407,8 @@ static bool avr_run_command(uint8_t opcode, uint8_t *data, size_t data_length)
393 success = success && (rx == CMD_CLOSE); 407 success = success && (rx == CMD_CLOSE);
394 } 408 }
395 409
410 avr_hid_release();
411
396 IO_SERIAL1_TX_ENABLE = 0; 412 IO_SERIAL1_TX_ENABLE = 0;
397 bitclr16(&IO_CLK_MOD2, CLK_MOD2_SIF1); 413 bitclr16(&IO_CLK_MOD2, CLK_MOD2_SIF1);
398 414
@@ -428,16 +444,17 @@ void avr_hid_init(void)
428{ 444{
429 /* 445 /*
430 setup alternate GIO functions: 446 setup alternate GIO functions:
431 GIO29 - SIF1 Enable (Directly connected to AVR's SS)
432 GIO30 - SIF1 Clock 447 GIO30 - SIF1 Clock
433 GIO31 - SIF1 Data In 448 GIO31 - SIF1 Data In
434 GIO32 - SIF1 Data Out 449 GIO32 - SIF1 Data Out
450 Manually drive GIO29 output (directly connected to AVR's SS).
435 */ 451 */
436 IO_GIO_FSEL2 = (IO_GIO_FSEL2 & 0x00FF) | 0xAA00; 452 IO_GIO_FSEL2 = (IO_GIO_FSEL2 & 0x00FF) | 0xA800;
437 /* GIO29, GIO30 - outputs, GIO31 - input */ 453 /* GIO29, GIO30 - outputs, GIO31 - input */
438 IO_GIO_DIR1 = (IO_GIO_DIR1 & ~((1 << 13) | (1 << 14))) | (1 << 15); 454 IO_GIO_DIR1 = (IO_GIO_DIR1 & ~((1 << 13) | (1 << 14))) | (1 << 15);
439 /* GIO32 - output */ 455 /* GIO32 - output */
440 bitclr16(&IO_GIO_DIR2, (1 << 0)); 456 bitclr16(&IO_GIO_DIR2, (1 << 0));
457 avr_hid_release();
441 458
442 /* RATE = 219 (0xDB) -> 200 kHz */ 459 /* RATE = 219 (0xDB) -> 200 kHz */
443 IO_SERIAL1_MODE = 0x6DB; 460 IO_SERIAL1_MODE = 0x6DB;