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author | Peter D'Hoye <peter.dhoye@gmail.com> | 2007-08-29 00:33:16 +0000 |
---|---|---|
committer | Peter D'Hoye <peter.dhoye@gmail.com> | 2007-08-29 00:33:16 +0000 |
commit | 5f59f9455443dbdce606ee091c10c99eab87c5b0 (patch) | |
tree | 01d595058d09175b5531a2d75eab90de0037f679 | |
parent | c04dd327723ea3759e156509500ee4a4ee2b3670 (diff) | |
download | rockbox-5f59f9455443dbdce606ee091c10c99eab87c5b0.tar.gz rockbox-5f59f9455443dbdce606ee091c10c99eab87c5b0.zip |
code police part one...
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14499 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/drivers/usb/arcotg_dcd.c | 55 | ||||
-rw-r--r-- | firmware/drivers/usb/arcotg_dcd.h | 63 |
2 files changed, 71 insertions, 47 deletions
diff --git a/firmware/drivers/usb/arcotg_dcd.c b/firmware/drivers/usb/arcotg_dcd.c index c85b4ba374..c74dad1a62 100644 --- a/firmware/drivers/usb/arcotg_dcd.c +++ b/firmware/drivers/usb/arcotg_dcd.c | |||
@@ -147,14 +147,18 @@ void usb_arcotg_dcd_init(void) | |||
147 | ep_num++; | 147 | ep_num++; |
148 | } | 148 | } |
149 | 149 | ||
150 | logf("pipe %d -> ep %d %s", dcd_controller.endpoints[i].pipe_num, dcd_controller.endpoints[i].ep_num, dcd_controller.endpoints[i].name); | 150 | logf("pipe %d -> ep %d %s", dcd_controller.endpoints[i].pipe_num, |
151 | dcd_controller.endpoints[i].ep_num, | ||
152 | dcd_controller.endpoints[i].name); | ||
151 | 153 | ||
152 | if (ep_name[i] != NULL) { | 154 | if (ep_name[i] != NULL) { |
153 | memcpy(&dcd_controller.endpoints[i].name, ep_name[i], sizeof(dcd_controller.endpoints[i].name)); | 155 | memcpy(&dcd_controller.endpoints[i].name, ep_name[i], |
156 | sizeof(dcd_controller.endpoints[i].name)); | ||
154 | 157 | ||
155 | if (i != 0) { | 158 | if (i != 0) { |
156 | /* add to list of configurable endpoints */ | 159 | /* add to list of configurable endpoints */ |
157 | list_add_tail(&dcd_controller.endpoints[i].list, &arcotg_dcd.endpoints.list); | 160 | list_add_tail(&dcd_controller.endpoints[i].list, |
161 | &arcotg_dcd.endpoints.list); | ||
158 | } | 162 | } |
159 | } | 163 | } |
160 | } | 164 | } |
@@ -230,7 +234,8 @@ void usb_arcotg_dcd_irq(void) | |||
230 | /* setup packet, we only support ep0 as control ep */ | 234 | /* setup packet, we only support ep0 as control ep */ |
231 | if (UDC_ENDPTSETUPSTAT & EP_SETUP_STATUS_EP0) { | 235 | if (UDC_ENDPTSETUPSTAT & EP_SETUP_STATUS_EP0) { |
232 | /* copy data from queue head to local buffer */ | 236 | /* copy data from queue head to local buffer */ |
233 | memcpy(&dcd_controller.local_setup_buff, (uint8_t *) &dev_qh[0].setup_buffer, 8); | 237 | memcpy(&dcd_controller.local_setup_buff, |
238 | (uint8_t *) &dev_qh[0].setup_buffer, 8); | ||
234 | /* ack setup packet*/ | 239 | /* ack setup packet*/ |
235 | UDC_ENDPTSETUPSTAT = UDC_ENDPTSETUPSTAT; | 240 | UDC_ENDPTSETUPSTAT = UDC_ENDPTSETUPSTAT; |
236 | setup_received_int(&dcd_controller.local_setup_buff); | 241 | setup_received_int(&dcd_controller.local_setup_buff); |
@@ -306,7 +311,9 @@ static void setup_received_int(struct usb_ctrlrequest* request) | |||
306 | int num = (request->wIndex & 0x000f); | 311 | int num = (request->wIndex & 0x000f); |
307 | struct usb_ep *ep; | 312 | struct usb_ep *ep; |
308 | 313 | ||
309 | if (request->wValue != 0 || request->wLength != 0 || (num * 2 + dir) > USB_MAX_PIPES) { | 314 | if (request->wValue != 0 || |
315 | request->wLength != 0 || | ||
316 | (num * 2 + dir) > USB_MAX_PIPES) { | ||
310 | break; | 317 | break; |
311 | } | 318 | } |
312 | ep = &dcd_controller.endpoints[num * 2 + dir]; | 319 | ep = &dcd_controller.endpoints[num * 2 + dir]; |
@@ -335,7 +342,8 @@ static void setup_received_int(struct usb_ctrlrequest* request) | |||
335 | 342 | ||
336 | /* if dcd can not handle reqeust, ask driver */ | 343 | /* if dcd can not handle reqeust, ask driver */ |
337 | if (handled == 0) { | 344 | if (handled == 0) { |
338 | if (arcotg_dcd.device_driver != NULL && arcotg_dcd.device_driver->request != NULL) { | 345 | if (arcotg_dcd.device_driver != NULL && |
346 | arcotg_dcd.device_driver->request != NULL) { | ||
339 | handled = arcotg_dcd.device_driver->request(request); | 347 | handled = arcotg_dcd.device_driver->request(request); |
340 | logf("result from driver %d", handled); | 348 | logf("result from driver %d", handled); |
341 | } | 349 | } |
@@ -389,7 +397,8 @@ static void port_change_int(void) | |||
389 | } | 397 | } |
390 | 398 | ||
391 | /* inform device driver */ | 399 | /* inform device driver */ |
392 | if (arcotg_dcd.device_driver != NULL && arcotg_dcd.device_driver->speed != NULL) { | 400 | if (arcotg_dcd.device_driver != NULL && |
401 | arcotg_dcd.device_driver->speed != NULL) { | ||
393 | arcotg_dcd.device_driver->speed(speed); | 402 | arcotg_dcd.device_driver->speed(speed); |
394 | } | 403 | } |
395 | } | 404 | } |
@@ -401,7 +410,8 @@ static void suspend_int(void) | |||
401 | dcd_controller.usb_state = USB_STATE_SUSPENDED; | 410 | dcd_controller.usb_state = USB_STATE_SUSPENDED; |
402 | 411 | ||
403 | /* report suspend to the driver */ | 412 | /* report suspend to the driver */ |
404 | if (arcotg_dcd.device_driver != NULL && arcotg_dcd.device_driver->suspend != NULL) { | 413 | if (arcotg_dcd.device_driver != NULL && |
414 | arcotg_dcd.device_driver->suspend != NULL) { | ||
405 | arcotg_dcd.device_driver->suspend(); | 415 | arcotg_dcd.device_driver->suspend(); |
406 | } | 416 | } |
407 | } | 417 | } |
@@ -413,7 +423,8 @@ static void resume_int(void) | |||
413 | dcd_controller.resume_state = USB_STATE_NOTATTACHED; | 423 | dcd_controller.resume_state = USB_STATE_NOTATTACHED; |
414 | 424 | ||
415 | /* report resume to the driver */ | 425 | /* report resume to the driver */ |
416 | if (arcotg_dcd.device_driver != NULL && arcotg_dcd.device_driver->resume != NULL) { | 426 | if (arcotg_dcd.device_driver != NULL && |
427 | arcotg_dcd.device_driver->resume != NULL) { | ||
417 | arcotg_dcd.device_driver->resume(); | 428 | arcotg_dcd.device_driver->resume(); |
418 | } | 429 | } |
419 | } | 430 | } |
@@ -455,7 +466,8 @@ static void reset_int(void) | |||
455 | /*-------------------------------------------------------------------------*/ | 466 | /*-------------------------------------------------------------------------*/ |
456 | /* usb controller ops */ | 467 | /* usb controller ops */ |
457 | 468 | ||
458 | int usb_arcotg_dcd_enable(struct usb_ep* ep, struct usb_endpoint_descriptor* desc) | 469 | int usb_arcotg_dcd_enable(struct usb_ep* ep, |
470 | struct usb_endpoint_descriptor* desc) | ||
459 | { | 471 | { |
460 | unsigned short max = 0; | 472 | unsigned short max = 0; |
461 | unsigned char mult = 0, zlt = 0; | 473 | unsigned char mult = 0, zlt = 0; |
@@ -610,7 +622,8 @@ int usb_arcotg_dcd_enable(struct usb_ep* ep, struct usb_endpoint_descriptor* des | |||
610 | 622 | ||
611 | /* Init endpoint x at here */ | 623 | /* Init endpoint x at here */ |
612 | ep_setup(ep->ep_num, | 624 | ep_setup(ep->ep_num, |
613 | (unsigned char)(desc->bEndpointAddress & USB_DIR_IN) ? USB_RECV : USB_SEND, | 625 | (unsigned char)(desc->bEndpointAddress & USB_DIR_IN) ? |
626 | USB_RECV : USB_SEND, | ||
614 | (unsigned char)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)); | 627 | (unsigned char)(desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)); |
615 | 628 | ||
616 | /* Now HW will be NAKing transfers to that EP, | 629 | /* Now HW will be NAKing transfers to that EP, |
@@ -810,8 +823,9 @@ int usb_arcotg_dcd_receive(struct usb_ep* ep, struct usb_response* res) | |||
810 | /*-------------------------------------------------------------------------*/ | 823 | /*-------------------------------------------------------------------------*/ |
811 | /* lifecylce */ | 824 | /* lifecylce */ |
812 | 825 | ||
813 | static void qh_init(unsigned char ep_num, unsigned char dir, unsigned char ep_type, | 826 | static void qh_init(unsigned char ep_num, unsigned char dir, |
814 | unsigned int max_pkt_len, unsigned int zlt, unsigned char mult) | 827 | unsigned char ep_type, unsigned int max_pkt_len, |
828 | unsigned int zlt, unsigned char mult) | ||
815 | { | 829 | { |
816 | struct dqh *qh = &dev_qh[2 * ep_num + dir]; | 830 | struct dqh *qh = &dev_qh[2 * ep_num + dir]; |
817 | uint32_t tmp = 0; | 831 | uint32_t tmp = 0; |
@@ -824,7 +838,8 @@ static void qh_init(unsigned char ep_num, unsigned char dir, unsigned char ep_ty | |||
824 | tmp = (max_pkt_len << LENGTH_BIT_POS) | INTERRUPT_ON_COMPLETE; | 838 | tmp = (max_pkt_len << LENGTH_BIT_POS) | INTERRUPT_ON_COMPLETE; |
825 | break; | 839 | break; |
826 | case USB_ENDPOINT_XFER_ISOC: | 840 | case USB_ENDPOINT_XFER_ISOC: |
827 | tmp = (max_pkt_len << LENGTH_BIT_POS) | (mult << EP_QUEUE_HEAD_MULT_POS); | 841 | tmp = (max_pkt_len << LENGTH_BIT_POS) | |
842 | (mult << EP_QUEUE_HEAD_MULT_POS); | ||
828 | break; | 843 | break; |
829 | case USB_ENDPOINT_XFER_BULK: | 844 | case USB_ENDPOINT_XFER_BULK: |
830 | case USB_ENDPOINT_XFER_INT: | 845 | case USB_ENDPOINT_XFER_INT: |
@@ -840,7 +855,8 @@ static void qh_init(unsigned char ep_num, unsigned char dir, unsigned char ep_ty | |||
840 | 855 | ||
841 | /* see 32.14.4.1 Queue Head Initialization */ | 856 | /* see 32.14.4.1 Queue Head Initialization */ |
842 | 857 | ||
843 | /* write the wMaxPacketSize field as required by the USB Chapter9 or application specific portocol */ | 858 | /* write the wMaxPacketSize field as required by the USB Chapter9 or |
859 | application specific portocol */ | ||
844 | qh->endpt_cap = tmp; | 860 | qh->endpt_cap = tmp; |
845 | 861 | ||
846 | /* write the next dTD Terminate bit fild to 1 */ | 862 | /* write the next dTD Terminate bit fild to 1 */ |
@@ -871,13 +887,15 @@ static void td_init(struct dtd* td, void* buffer, uint32_t todo) | |||
871 | /* set interrupt on compilte if desierd */ | 887 | /* set interrupt on compilte if desierd */ |
872 | td->dtd_token |= INTERRUPT_ON_COMPLETE; | 888 | td->dtd_token |= INTERRUPT_ON_COMPLETE; |
873 | 889 | ||
874 | /* initialize the status field with the active bit set to 1 and all remaining status bits to 0 */ | 890 | /* initialize the status field with the active bit set to 1 and all |
891 | remaining status bits to 0 */ | ||
875 | td->dtd_token |= STATUS_ACTIVE; | 892 | td->dtd_token |= STATUS_ACTIVE; |
876 | 893 | ||
877 | td->buf_ptr0 = (uint32_t)buffer; | 894 | td->buf_ptr0 = (uint32_t)buffer; |
878 | } | 895 | } |
879 | 896 | ||
880 | static void ep_setup(unsigned char ep_num, unsigned char dir, unsigned char ep_type) | 897 | static void ep_setup(unsigned char ep_num, unsigned char dir, |
898 | unsigned char ep_type) | ||
881 | { | 899 | { |
882 | unsigned int tmp_epctrl = 0; | 900 | unsigned int tmp_epctrl = 0; |
883 | struct timer t; | 901 | struct timer t; |
@@ -904,7 +922,8 @@ static void ep_setup(unsigned char ep_num, unsigned char dir, unsigned char ep_t | |||
904 | /* wait for the write reg to finish */ | 922 | /* wait for the write reg to finish */ |
905 | 923 | ||
906 | timer_set(&t, SETUP_TIMER); | 924 | timer_set(&t, SETUP_TIMER); |
907 | while (!(UDC_ENDPTCTRL(ep_num) & (tmp_epctrl & (EPCTRL_TX_ENABLE | EPCTRL_RX_ENABLE)))) { | 925 | while (!(UDC_ENDPTCTRL(ep_num) & |
926 | (tmp_epctrl & (EPCTRL_TX_ENABLE | EPCTRL_RX_ENABLE)))) { | ||
908 | if (timer_expired(&t)) { | 927 | if (timer_expired(&t)) { |
909 | logf("TIMEOUT: enable ep"); | 928 | logf("TIMEOUT: enable ep"); |
910 | return; | 929 | return; |
diff --git a/firmware/drivers/usb/arcotg_dcd.h b/firmware/drivers/usb/arcotg_dcd.h index 6c5f5739d5..253101fea5 100644 --- a/firmware/drivers/usb/arcotg_dcd.h +++ b/firmware/drivers/usb/arcotg_dcd.h | |||
@@ -40,7 +40,7 @@ | |||
40 | 40 | ||
41 | /*-------------------------------------------------------------------------*/ | 41 | /*-------------------------------------------------------------------------*/ |
42 | 42 | ||
43 | #define ep_is_in(EP) (((EP)->desc->bEndpointAddress & USB_DIR_IN)==USB_DIR_IN) | 43 | #define ep_is_in(EP) (((EP)->desc->bEndpointAddress & USB_DIR_IN)==USB_DIR_IN) |
44 | 44 | ||
45 | #define EP_DIR_IN 1 | 45 | #define EP_DIR_IN 1 |
46 | #define EP_DIR_OUT 0 | 46 | #define EP_DIR_OUT 0 |
@@ -52,30 +52,30 @@ | |||
52 | #define USB_SEND (1) /* IN EP */ | 52 | #define USB_SEND (1) /* IN EP */ |
53 | 53 | ||
54 | /* Shared Bit Masks for Endpoint Queue Head and Endpoint Transfer Descriptor */ | 54 | /* Shared Bit Masks for Endpoint Queue Head and Endpoint Transfer Descriptor */ |
55 | #define TERMINATE (1 << 0) | 55 | #define TERMINATE (1 << 0) |
56 | #define STATUS_ACTIVE (1 << 7) | 56 | #define STATUS_ACTIVE (1 << 7) |
57 | #define STATUS_HALTED (1 << 6) | 57 | #define STATUS_HALTED (1 << 6) |
58 | #define STATUS_DATA_BUFF_ERR (1 << 5) | 58 | #define STATUS_DATA_BUFF_ERR (1 << 5) |
59 | #define STATUS_TRANSACTION_ERR (1 << 4) | 59 | #define STATUS_TRANSACTION_ERR (1 << 4) |
60 | #define INTERRUPT_ON_COMPLETE (1 << 15) | 60 | #define INTERRUPT_ON_COMPLETE (1 << 15) |
61 | #define LENGTH_BIT_POS (16) | 61 | #define LENGTH_BIT_POS (16) |
62 | #define ADDRESS_MASK (0xFFFFFFE0) | 62 | #define ADDRESS_MASK (0xFFFFFFE0) |
63 | #define ERROR_MASK (DTD_STATUS_HALTED | \ | 63 | #define ERROR_MASK (DTD_STATUS_HALTED | \ |
64 | DTD_STATUS_DATA_BUFF_ERR | \ | 64 | DTD_STATUS_DATA_BUFF_ERR | \ |
65 | DTD_STATUS_TRANSACTION_ERR) | 65 | DTD_STATUS_TRANSACTION_ERR) |
66 | 66 | ||
67 | #define RESERVED_FIELDS ((1 << 0) | (1 << 2) | (1 << 4) | \ | 67 | #define RESERVED_FIELDS ((1 << 0) | (1 << 2) | (1 << 4) | \ |
68 | (1 << 8) | (1 << 9) | (1 << 12)| \ | 68 | (1 << 8) | (1 << 9) | (1 << 12)| \ |
69 | (1 << 13)| (1 << 14)| (1 << 31)) | 69 | (1 << 13)| (1 << 14)| (1 << 31)) |
70 | 70 | ||
71 | /* Endpoint Queue Head Bit Masks */ | 71 | /* Endpoint Queue Head Bit Masks */ |
72 | #define EP_QUEUE_HEAD_MULT_POS (30) | 72 | #define EP_QUEUE_HEAD_MULT_POS (30) |
73 | #define EP_QUEUE_HEAD_ZLT_SEL (0x20000000) | 73 | #define EP_QUEUE_HEAD_ZLT_SEL (0x20000000) |
74 | #define EP_QUEUE_HEAD_MAX_PKT_LEN(ep_info) (((ep_info)>>16)&0x07ff) | 74 | #define EP_QUEUE_HEAD_MAX_PKT_LEN(ep_info) (((ep_info)>>16)&0x07ff) |
75 | #define EP_QUEUE_HEAD_MULTO (0x00000C00) | 75 | #define EP_QUEUE_HEAD_MULTO (0x00000C00) |
76 | #define EP_QUEUE_CURRENT_OFFSET_MASK (0x00000FFF) | 76 | #define EP_QUEUE_CURRENT_OFFSET_MASK (0x00000FFF) |
77 | #define EP_QUEUE_FRINDEX_MASK (0x000007FF) | 77 | #define EP_QUEUE_FRINDEX_MASK (0x000007FF) |
78 | #define EP_MAX_LENGTH_TRANSFER (0x4000) | 78 | #define EP_MAX_LENGTH_TRANSFER (0x4000) |
79 | 79 | ||
80 | /*-------------------------------------------------------------------------*/ | 80 | /*-------------------------------------------------------------------------*/ |
81 | 81 | ||
@@ -104,8 +104,10 @@ static const char* ep_name[] = { | |||
104 | 104 | ||
105 | /* Endpoint Transfer Descriptor data struct */ | 105 | /* Endpoint Transfer Descriptor data struct */ |
106 | struct dtd { | 106 | struct dtd { |
107 | uint32_t next_dtd; /* Next TD pointer(31-5), T(0) set indicate invalid */ | 107 | uint32_t next_dtd; /* Next TD pointer(31-5), |
108 | uint32_t dtd_token; /* Total bytes (30-16), IOC (15), MultO(11-10), STS (7-0) */ | 108 | T(0) set indicate invalid */ |
109 | uint32_t dtd_token; /* Total bytes (30-16), IOC (15), | ||
110 | MultO(11-10), STS (7-0) */ | ||
109 | uint32_t buf_ptr0; /* Buffer pointer Page 0 */ | 111 | uint32_t buf_ptr0; /* Buffer pointer Page 0 */ |
110 | uint32_t buf_ptr1; /* Buffer pointer Page 1 */ | 112 | uint32_t buf_ptr1; /* Buffer pointer Page 1 */ |
111 | uint32_t buf_ptr2; /* Buffer pointer Page 2 */ | 113 | uint32_t buf_ptr2; /* Buffer pointer Page 2 */ |
@@ -146,7 +148,8 @@ void usb_arcotg_dcd_start(void); | |||
146 | void usb_arcotg_dcd_stop(void); | 148 | void usb_arcotg_dcd_stop(void); |
147 | 149 | ||
148 | /* usb controller ops */ | 150 | /* usb controller ops */ |
149 | int usb_arcotg_dcd_enable(struct usb_ep* ep, struct usb_endpoint_descriptor* desc); | 151 | int usb_arcotg_dcd_enable(struct usb_ep* ep, |
152 | struct usb_endpoint_descriptor* desc); | ||
150 | int usb_arcotg_dcd_disable(struct usb_ep* ep); | 153 | int usb_arcotg_dcd_disable(struct usb_ep* ep); |
151 | int usb_arcotg_dcd_set_halt(struct usb_ep* ep, bool halt); | 154 | int usb_arcotg_dcd_set_halt(struct usb_ep* ep, bool halt); |
152 | int usb_arcotg_dcd_send(struct usb_ep* ep, struct usb_response* request); | 155 | int usb_arcotg_dcd_send(struct usb_ep* ep, struct usb_response* request); |
@@ -160,10 +163,12 @@ static void suspend_int(void); | |||
160 | static void resume_int(void); | 163 | static void resume_int(void); |
161 | 164 | ||
162 | /* life cycle */ | 165 | /* life cycle */ |
163 | static void qh_init(unsigned char ep_num, unsigned char dir, unsigned char ep_type, | 166 | static void qh_init(unsigned char ep_num, unsigned char dir, |
164 | unsigned int max_pkt_len, unsigned int zlt, unsigned char mult); | 167 | unsigned char ep_type, unsigned int max_pkt_len, |
168 | unsigned int zlt, unsigned char mult); | ||
165 | static void td_init(struct dtd* td, void* buffer, uint32_t todo); | 169 | static void td_init(struct dtd* td, void* buffer, uint32_t todo); |
166 | static void ep_setup(unsigned char ep_num, unsigned char dir, unsigned char ep_type); | 170 | static void ep_setup(unsigned char ep_num, unsigned char dir, |
171 | unsigned char ep_type); | ||
167 | 172 | ||
168 | /* helpers for tx/rx */ | 173 | /* helpers for tx/rx */ |
169 | static int td_enqueue(struct dtd* td, struct dqh* qh, unsigned int mask); | 174 | static int td_enqueue(struct dtd* td, struct dqh* qh, unsigned int mask); |