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| author | Rafaël Carré <rafael.carre@gmail.com> | 2010-09-03 04:40:54 +0000 |
|---|---|---|
| committer | Rafaël Carré <rafael.carre@gmail.com> | 2010-09-03 04:40:54 +0000 |
| commit | 4e739b406acb2696cd30f546fc4dfe86751b7153 (patch) | |
| tree | 0c18159ff7012157bd0f7692e2e293c32dde20db | |
| parent | c948cf46e2c174d16ffb8bc031637f5715215ec7 (diff) | |
| download | rockbox-4e739b406acb2696cd30f546fc4dfe86751b7153.tar.gz rockbox-4e739b406acb2696cd30f546fc4dfe86751b7153.zip | |
USB AMSv2: fix bit position in DCFG register
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27991 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/target/arm/as3525/usb-drv-as3525v2.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/firmware/target/arm/as3525/usb-drv-as3525v2.h b/firmware/target/arm/as3525/usb-drv-as3525v2.h index 8a7fee15f0..7db0e51faf 100644 --- a/firmware/target/arm/as3525/usb-drv-as3525v2.h +++ b/firmware/target/arm/as3525/usb-drv-as3525v2.h | |||
| @@ -229,9 +229,9 @@ | |||
| 229 | #define DCFG_devspd_hs_phy_hs 0 /** High speed PHY running at high speed */ | 229 | #define DCFG_devspd_hs_phy_hs 0 /** High speed PHY running at high speed */ |
| 230 | #define DCFG_devspd_hs_phy_fs 1 /** High speed PHY running at full speed */ | 230 | #define DCFG_devspd_hs_phy_fs 1 /** High speed PHY running at full speed */ |
| 231 | #define DCFG_nzstsouthshk (1 << 2) /** Non Zero Length Status OUT Handshake */ | 231 | #define DCFG_nzstsouthshk (1 << 2) /** Non Zero Length Status OUT Handshake */ |
| 232 | #define DCFG_devadr_bitp 4 /** Device Address */ | 232 | #define DCFG_devadr_bitp 5 /** Device Address */ |
| 233 | #define DCFG_devadr_bits 0x7f | 233 | #define DCFG_devadr_bits 0x7f |
| 234 | #define DCFG_perfrint_bitp 11 /** Periodic Frame Interval */ | 234 | #define DCFG_perfrint_bitp 12 /** Periodic Frame Interval */ |
| 235 | #define DCFG_perfrint_bits 0x3 | 235 | #define DCFG_perfrint_bits 0x3 |
| 236 | #define DCFG_FRAME_INTERVAL_80 0 | 236 | #define DCFG_FRAME_INTERVAL_80 0 |
| 237 | #define DCFG_FRAME_INTERVAL_85 1 | 237 | #define DCFG_FRAME_INTERVAL_85 1 |