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| author | Michael Sparmann <theseven@rockbox.org> | 2009-10-21 19:36:37 +0000 |
|---|---|---|
| committer | Michael Sparmann <theseven@rockbox.org> | 2009-10-21 19:36:37 +0000 |
| commit | 4e651264c2233dbcabdb8a4db16e45f07e88a133 (patch) | |
| tree | db31df0c6fccb0b3dcd485849e7c14e0bfc48bf0 | |
| parent | 2afce17cab5674a21f06ddcc320fef98ce7c5ffc (diff) | |
| download | rockbox-4e651264c2233dbcabdb8a4db16e45f07e88a133.tar.gz rockbox-4e651264c2233dbcabdb8a4db16e45f07e88a133.zip | |
Fix yellow
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23311 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/export/s5l8700.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/firmware/export/s5l8700.h b/firmware/export/s5l8700.h index 853b672500..dc03553984 100644 --- a/firmware/export/s5l8700.h +++ b/firmware/export/s5l8700.h | |||
| @@ -304,8 +304,9 @@ | |||
| 304 | #define TDDATA1 (*(REG32_PTR_T)(0x3C70006C)) /* Data1 Register */ | 304 | #define TDDATA1 (*(REG32_PTR_T)(0x3C70006C)) /* Data1 Register */ |
| 305 | #define TDPRE (*(REG32_PTR_T)(0x3C700070)) /* Pre-scale register */ | 305 | #define TDPRE (*(REG32_PTR_T)(0x3C700070)) /* Pre-scale register */ |
| 306 | #define TDCNT (*(REG32_PTR_T)(0x3C700074)) /* Counter register */ | 306 | #define TDCNT (*(REG32_PTR_T)(0x3C700074)) /* Counter register */ |
| 307 | #define USEC_TIMER (((*(REG32_PTR_T)(0x3C700080) << 32) \ | 307 | #define FIVE_USEC_TIMER ((*(REG32_PTR_T)(0x3C700080) << 32) \ |
| 308 | | *(REG32_PTR_T)(0x3C700084)) * 5) /* 64bit 5usec timer */ | 308 | | *(REG32_PTR_T)(0x3C700084)) /* 64bit 5usec timer */ |
| 309 | #define USEC_TIMER (*(REG32_PTR_T)(0x3C700084) * 5) /* lower 32 bits of the above as a usec timer */ | ||
| 309 | 310 | ||
| 310 | /* 12. NAND FLASH CONTROLER */ | 311 | /* 12. NAND FLASH CONTROLER */ |
| 311 | #if CONFIG_CPU==S5L8701 | 312 | #if CONFIG_CPU==S5L8701 |