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author | Michael Sevakis <jethead71@rockbox.org> | 2007-05-01 19:21:27 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2007-05-01 19:21:27 +0000 |
commit | 4e24bb9976d454616814c4831898022e8274f556 (patch) | |
tree | d3b6d3cd91790c6e6ab45c820b89f2b5237304f8 | |
parent | 34cb104289674fc66464d194f6aab65ee31722af (diff) | |
download | rockbox-4e24bb9976d454616814c4831898022e8274f556.tar.gz rockbox-4e24bb9976d454616814c4831898022e8274f556.zip |
e200: Add register defines for the LCD driver IC.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13300 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/target/arm/sandisk/sansa-e200/lcd-e200.c | 139 |
1 files changed, 93 insertions, 46 deletions
diff --git a/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c b/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c index 07bc72c3c1..8dc8ad95e9 100644 --- a/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c +++ b/firmware/target/arm/sandisk/sansa-e200/lcd-e200.c | |||
@@ -50,6 +50,47 @@ | |||
50 | #define LCD_REG_9 (*(volatile unsigned long *)(0xc2000024)) | 50 | #define LCD_REG_9 (*(volatile unsigned long *)(0xc2000024)) |
51 | #define LCD_FB_BASE_REG (*(volatile unsigned long *)(0xc2000028)) | 51 | #define LCD_FB_BASE_REG (*(volatile unsigned long *)(0xc2000028)) |
52 | 52 | ||
53 | /* Taken from HD66789 datasheet and seems similar enough. | ||
54 | Definitely a Renesas chip though with a perfect register index | ||
55 | match but at least one bit seems to be set that that datasheet | ||
56 | doesn't show. It says T.B.D. on the regmap anyway. */ | ||
57 | #define R_START_OSC 0x00 | ||
58 | #define R_DRV_OUTPUT_CONTROL 0x01 | ||
59 | #define R_DRV_WAVEFORM_CONTROL 0x02 | ||
60 | #define R_ENTRY_MODE 0x03 | ||
61 | #define R_COMPARE_REG1 0x04 | ||
62 | #define R_COMPARE_REG2 0x05 | ||
63 | #define R_DISP_CONTROL1 0x07 | ||
64 | #define R_DISP_CONTROL2 0x08 | ||
65 | #define R_DISP_CONTROL3 0x09 | ||
66 | #define R_FRAME_CYCLE_CONTROL 0x0b | ||
67 | #define R_EXT_DISP_INTF_CONTROL 0x0c | ||
68 | #define R_POWER_CONTROL1 0x10 | ||
69 | #define R_POWER_CONTROL2 0x11 | ||
70 | #define R_POWER_CONTROL3 0x12 | ||
71 | #define R_POWER_CONTROL4 0x13 | ||
72 | #define R_RAM_ADDR_SET 0x21 | ||
73 | #define R_RAM_READ_DATA 0x21 | ||
74 | #define R_RAM_WRITE_DATA 0x22 | ||
75 | #define R_RAM_WRITE_DATA_MASK1 0x23 | ||
76 | #define R_RAM_WRITE_DATA_MASK2 0x24 | ||
77 | #define R_GAMMA_FINE_ADJ_POS1 0x30 | ||
78 | #define R_GAMMA_FINE_ADJ_POS2 0x31 | ||
79 | #define R_GAMMA_FINE_ADJ_POS3 0x32 | ||
80 | #define R_GAMMA_GRAD_ADJ_POS 0x33 | ||
81 | #define R_GAMMA_FINE_ADJ_NEG1 0x34 | ||
82 | #define R_GAMMA_FINE_ADJ_NEG2 0x35 | ||
83 | #define R_GAMMA_FINE_ADJ_NEG3 0x36 | ||
84 | #define R_GAMMA_GRAD_ADJ_NEG 0x37 | ||
85 | #define R_GAMMA_AMP_ADJ_POS 0x38 | ||
86 | #define R_GAMMA_AMP_ADJ_NEG 0x39 | ||
87 | #define R_GATE_SCAN_START_POS 0x40 | ||
88 | #define R_VERT_SCROLL_CONTROL 0x41 | ||
89 | #define R_1ST_SCR_DRIVE_POS 0x42 | ||
90 | #define R_2ND_SCR_DRIVE_POS 0x43 | ||
91 | #define R_HORIZ_RAM_ADDR_POS 0x44 | ||
92 | #define R_VERT_RAM_ADDR_POS 0x45 | ||
93 | |||
53 | /* We don't know how to receive a DMA finished signal from the LCD controller | 94 | /* We don't know how to receive a DMA finished signal from the LCD controller |
54 | * To avoid problems with flickering, we double-buffer the framebuffer and turn | 95 | * To avoid problems with flickering, we double-buffer the framebuffer and turn |
55 | * off DMA while updates are taking place */ | 96 | * off DMA while updates are taking place */ |
@@ -186,67 +227,73 @@ inline void lcd_init_device(void) | |||
186 | udelay(100000); | 227 | udelay(100000); |
187 | 228 | ||
188 | /* LCD init */ | 229 | /* LCD init */ |
230 | |||
231 | /* TODO: Eliminate some of this outside the bootloader since this | ||
232 | will already be setup and that will eliminate white-screen */ | ||
233 | |||
234 | /* Pull RESET low, then high */ | ||
189 | outl((inl(0x70000080) & ~(1 << 28)), 0x70000080); | 235 | outl((inl(0x70000080) & ~(1 << 28)), 0x70000080); |
190 | udelay(10000); | 236 | udelay(10000); |
191 | outl((inl(0x70000080) | (1 << 28)), 0x70000080); | 237 | outl((inl(0x70000080) | (1 << 28)), 0x70000080); |
192 | udelay(10000); | 238 | udelay(10000); |
193 | 239 | ||
194 | lcd_write_reg(16, 0x4444); | 240 | lcd_write_reg(R_POWER_CONTROL1, 0x4444); |
195 | lcd_write_reg(17, 0x0001); | 241 | lcd_write_reg(R_POWER_CONTROL2, 0x0001); |
196 | lcd_write_reg(18, 0x0003); | 242 | lcd_write_reg(R_POWER_CONTROL3, 0x0003); |
197 | lcd_write_reg(19, 0x1119); | 243 | lcd_write_reg(R_POWER_CONTROL4, 0x1119); |
198 | lcd_write_reg(18, 0x0013); | 244 | lcd_write_reg(R_POWER_CONTROL3, 0x0013); |
199 | udelay(50000); | 245 | udelay(50000); |
200 | 246 | ||
201 | lcd_write_reg(16, 0x4440); | 247 | lcd_write_reg(R_POWER_CONTROL1, 0x4440); |
202 | lcd_write_reg(19, 0x3119); | 248 | lcd_write_reg(R_POWER_CONTROL4, 0x3119); |
203 | udelay(150000); | 249 | udelay(150000); |
204 | 250 | ||
205 | lcd_write_reg(1, 0x101b); | 251 | lcd_write_reg(R_DRV_OUTPUT_CONTROL, 0x101b); |
206 | lcd_write_reg(2, 0x0700); | 252 | lcd_write_reg(R_DRV_WAVEFORM_CONTROL, 0x0700); |
207 | lcd_write_reg(3, 0x6020); | 253 | lcd_write_reg(R_ENTRY_MODE, 0x6020); |
208 | lcd_write_reg(4, 0x0000); | 254 | lcd_write_reg(R_COMPARE_REG1, 0x0000); |
209 | lcd_write_reg(5, 0x0000); | 255 | lcd_write_reg(R_COMPARE_REG2, 0x0000); |
210 | lcd_write_reg(8, 0x0102); | 256 | lcd_write_reg(R_DISP_CONTROL2, 0x0102); |
211 | lcd_write_reg(9, 0x0000); | 257 | lcd_write_reg(R_DISP_CONTROL3, 0x0000); |
212 | lcd_write_reg(11, 0x4400); | 258 | lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x4400); |
213 | lcd_write_reg(12, 0x0110); | 259 | lcd_write_reg(R_EXT_DISP_INTF_CONTROL, 0x0110); |
214 | 260 | ||
215 | lcd_write_reg(64, 0x0000); | 261 | lcd_write_reg(R_GATE_SCAN_START_POS, 0x0000); |
216 | lcd_write_reg(65, 0x0000); | 262 | lcd_write_reg(R_VERT_SCROLL_CONTROL, 0x0000); |
217 | lcd_write_reg(66, (219 << 8)); /* Screen resolution? */ | 263 | lcd_write_reg(R_1ST_SCR_DRIVE_POS, (219 << 8)); |
218 | lcd_write_reg(67, 0x0000); | 264 | lcd_write_reg(R_2ND_SCR_DRIVE_POS, 0x0000); |
219 | lcd_write_reg(68, (175 << 8)); | 265 | lcd_write_reg(R_HORIZ_RAM_ADDR_POS, (175 << 8)); |
220 | lcd_write_reg(69, (219 << 8)); | 266 | lcd_write_reg(R_VERT_RAM_ADDR_POS, (219 << 8)); |
221 | 267 | ||
222 | lcd_write_reg(48, 0x0000); | 268 | lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x0000); |
223 | lcd_write_reg(49, 0x0704); | 269 | lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0704); |
224 | lcd_write_reg(50, 0x0107); | 270 | lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0107); |
225 | lcd_write_reg(51, 0x0704); | 271 | lcd_write_reg(R_GAMMA_GRAD_ADJ_POS, 0x0704); |
226 | lcd_write_reg(52, 0x0107); | 272 | lcd_write_reg(R_GAMMA_FINE_ADJ_NEG1, 0x0107); |
227 | lcd_write_reg(53, 0x0002); | 273 | lcd_write_reg(R_GAMMA_FINE_ADJ_NEG2, 0x0002); |
228 | lcd_write_reg(54, 0x0707); | 274 | lcd_write_reg(R_GAMMA_FINE_ADJ_NEG3, 0x0707); |
229 | lcd_write_reg(55, 0x0503); | 275 | lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 0x0503); |
230 | lcd_write_reg(56, 0x0000); | 276 | lcd_write_reg(R_GAMMA_AMP_ADJ_POS, 0x0000); |
231 | lcd_write_reg(57, 0x0000); | 277 | lcd_write_reg(R_GAMMA_AMP_ADJ_NEG, 0x0000); |
232 | 278 | ||
233 | lcd_write_reg(33, 175); | 279 | lcd_write_reg(R_RAM_ADDR_SET, 175); |
234 | 280 | ||
235 | lcd_write_reg(12, 0x0110); | 281 | lcd_write_reg(R_EXT_DISP_INTF_CONTROL, 0x0110); |
236 | 282 | ||
237 | lcd_write_reg(16, 0x4740); | 283 | lcd_write_reg(R_POWER_CONTROL1, 0x4740); |
238 | 284 | ||
239 | lcd_write_reg(7, 0x0045); | 285 | lcd_write_reg(R_DISP_CONTROL1, 0x0045); |
240 | 286 | ||
241 | udelay(50000); | 287 | udelay(50000); |
242 | 288 | ||
243 | lcd_write_reg(7, 0x0065); | 289 | lcd_write_reg(R_DISP_CONTROL1, 0x0065); |
244 | lcd_write_reg(7, 0x0067); | 290 | lcd_write_reg(R_DISP_CONTROL1, 0x0067); |
245 | 291 | ||
246 | udelay(50000); | 292 | udelay(50000); |
247 | 293 | ||
248 | lcd_write_reg(7, 0x0077); | 294 | lcd_write_reg(R_DISP_CONTROL1, 0x0077); |
249 | lcd_send_msg(0x70, 34); | 295 | |
296 | lcd_send_msg(0x70, R_RAM_WRITE_DATA); | ||
250 | } | 297 | } |
251 | 298 | ||
252 | void lcd_enable(bool on) | 299 | void lcd_enable(bool on) |