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authorJens Arnold <amiconn@rockbox.org>2007-04-11 23:54:34 +0000
committerJens Arnold <amiconn@rockbox.org>2007-04-11 23:54:34 +0000
commit4c151dcb2199caafe0c1fd4d88ab66b6acdf6bd6 (patch)
tree25aedc9971878fe8db82039cca399eaec8bac4e9
parent8636e6949e802556da1588b814e454155358df90 (diff)
downloadrockbox-4c151dcb2199caafe0c1fd4d88ab66b6acdf6bd6.tar.gz
rockbox-4c151dcb2199caafe0c1fd4d88ab66b6acdf6bd6.zip
Oops, forgot to commit 2 new files...
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@13115 a1c6a512-1295-4272-9138-f99709370657
Diffstat
-rw-r--r--firmware/target/sh/system-sh.c421
-rw-r--r--firmware/target/sh/system-target.h110
2 files changed, 531 insertions, 0 deletions
diff --git a/firmware/target/sh/system-sh.c b/firmware/target/sh/system-sh.c
new file mode 100644
index 0000000000..3548512d69
--- /dev/null
+++ b/firmware/target/sh/system-sh.c
@@ -0,0 +1,421 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19
20#include <stdio.h>
21#include "config.h"
22#include "system.h"
23#include "lcd.h"
24#include "font.h"
25#include "led.h"
26
27static const char* const irqname[] = {
28 "", "", "", "", "IllInstr", "", "IllSltIn","","",
29 "CPUAdrEr", "DMAAdrEr", "NMI", "UserBrk",
30 "","","","","","","","","","","","","","","","","","","",
31 "Trap32","Trap33","Trap34","Trap35","Trap36","Trap37","Trap38","Trap39",
32 "Trap40","Trap41","Trap42","Trap43","Trap44","Trap45","Trap46","Trap47",
33 "Trap48","Trap49","Trap50","Trap51","Trap52","Trap53","Trap54","Trap55",
34 "Trap56","Trap57","Trap58","Trap59","Trap60","Trap61","Trap62","Trap63",
35 "Irq0","Irq1","Irq2","Irq3","Irq4","Irq5","Irq6","Irq7",
36 "Dma0","","Dma1","","Dma2","","Dma3","",
37 "IMIA0","IMIB0","OVI0","", "IMIA1","IMIB1","OVI1","",
38 "IMIA2","IMIB2","OVI2","", "IMIA3","IMIB3","OVI3","",
39 "IMIA4","IMIB4","OVI4","",
40 "Ser0Err","Ser0Rx","Ser0Tx","Ser0TE",
41 "Ser1Err","Ser1Rx","Ser1Tx","Ser1TE",
42 "ParityEr","A/D conv","","","Watchdog","DRAMRefr"
43};
44
45#define RESERVE_INTERRUPT(number) "\t.long\t_UIE" #number "\n"
46#define DEFAULT_INTERRUPT(name, number) "\t.weak\t_" #name \
47 "\n\t.set\t_" #name ",_UIE" #number \
48 "\n\t.long\t_" #name "\n"
49
50asm (
51
52/* Vector table.
53 * Handled in asm because gcc 4.x doesn't allow weak aliases to symbols
54 * defined in an asm block -- silly.
55 * Reset vectors (0..3) are handled in crt0.S */
56
57 ".section\t.vectors,\"aw\",@progbits\n"
58 DEFAULT_INTERRUPT (GII, 4)
59 RESERVE_INTERRUPT ( 5)
60 DEFAULT_INTERRUPT (ISI, 6)
61 RESERVE_INTERRUPT ( 7)
62 RESERVE_INTERRUPT ( 8)
63 DEFAULT_INTERRUPT (CPUAE, 9)
64 DEFAULT_INTERRUPT (DMAAE, 10)
65 DEFAULT_INTERRUPT (NMI, 11)
66 DEFAULT_INTERRUPT (UB, 12)
67 RESERVE_INTERRUPT ( 13)
68 RESERVE_INTERRUPT ( 14)
69 RESERVE_INTERRUPT ( 15)
70 RESERVE_INTERRUPT ( 16) /* TCB #0 */
71 RESERVE_INTERRUPT ( 17) /* TCB #1 */
72 RESERVE_INTERRUPT ( 18) /* TCB #2 */
73 RESERVE_INTERRUPT ( 19) /* TCB #3 */
74 RESERVE_INTERRUPT ( 20) /* TCB #4 */
75 RESERVE_INTERRUPT ( 21) /* TCB #5 */
76 RESERVE_INTERRUPT ( 22) /* TCB #6 */
77 RESERVE_INTERRUPT ( 23) /* TCB #7 */
78 RESERVE_INTERRUPT ( 24) /* TCB #8 */
79 RESERVE_INTERRUPT ( 25) /* TCB #9 */
80 RESERVE_INTERRUPT ( 26) /* TCB #10 */
81 RESERVE_INTERRUPT ( 27) /* TCB #11 */
82 RESERVE_INTERRUPT ( 28) /* TCB #12 */
83 RESERVE_INTERRUPT ( 29) /* TCB #13 */
84 RESERVE_INTERRUPT ( 30) /* TCB #14 */
85 RESERVE_INTERRUPT ( 31) /* TCB #15 */
86 DEFAULT_INTERRUPT (TRAPA32, 32)
87 DEFAULT_INTERRUPT (TRAPA33, 33)
88 DEFAULT_INTERRUPT (TRAPA34, 34)
89 DEFAULT_INTERRUPT (TRAPA35, 35)
90 DEFAULT_INTERRUPT (TRAPA36, 36)
91 DEFAULT_INTERRUPT (TRAPA37, 37)
92 DEFAULT_INTERRUPT (TRAPA38, 38)
93 DEFAULT_INTERRUPT (TRAPA39, 39)
94 DEFAULT_INTERRUPT (TRAPA40, 40)
95 DEFAULT_INTERRUPT (TRAPA41, 41)
96 DEFAULT_INTERRUPT (TRAPA42, 42)
97 DEFAULT_INTERRUPT (TRAPA43, 43)
98 DEFAULT_INTERRUPT (TRAPA44, 44)
99 DEFAULT_INTERRUPT (TRAPA45, 45)
100 DEFAULT_INTERRUPT (TRAPA46, 46)
101 DEFAULT_INTERRUPT (TRAPA47, 47)
102 DEFAULT_INTERRUPT (TRAPA48, 48)
103 DEFAULT_INTERRUPT (TRAPA49, 49)
104 DEFAULT_INTERRUPT (TRAPA50, 50)
105 DEFAULT_INTERRUPT (TRAPA51, 51)
106 DEFAULT_INTERRUPT (TRAPA52, 52)
107 DEFAULT_INTERRUPT (TRAPA53, 53)
108 DEFAULT_INTERRUPT (TRAPA54, 54)
109 DEFAULT_INTERRUPT (TRAPA55, 55)
110 DEFAULT_INTERRUPT (TRAPA56, 56)
111 DEFAULT_INTERRUPT (TRAPA57, 57)
112 DEFAULT_INTERRUPT (TRAPA58, 58)
113 DEFAULT_INTERRUPT (TRAPA59, 59)
114 DEFAULT_INTERRUPT (TRAPA60, 60)
115 DEFAULT_INTERRUPT (TRAPA61, 61)
116 DEFAULT_INTERRUPT (TRAPA62, 62)
117 DEFAULT_INTERRUPT (TRAPA63, 63)
118 DEFAULT_INTERRUPT (IRQ0, 64)
119 DEFAULT_INTERRUPT (IRQ1, 65)
120 DEFAULT_INTERRUPT (IRQ2, 66)
121 DEFAULT_INTERRUPT (IRQ3, 67)
122 DEFAULT_INTERRUPT (IRQ4, 68)
123 DEFAULT_INTERRUPT (IRQ5, 69)
124 DEFAULT_INTERRUPT (IRQ6, 70)
125 DEFAULT_INTERRUPT (IRQ7, 71)
126 DEFAULT_INTERRUPT (DEI0, 72)
127 RESERVE_INTERRUPT ( 73)
128 DEFAULT_INTERRUPT (DEI1, 74)
129 RESERVE_INTERRUPT ( 75)
130 DEFAULT_INTERRUPT (DEI2, 76)
131 RESERVE_INTERRUPT ( 77)
132 DEFAULT_INTERRUPT (DEI3, 78)
133 RESERVE_INTERRUPT ( 79)
134 DEFAULT_INTERRUPT (IMIA0, 80)
135 DEFAULT_INTERRUPT (IMIB0, 81)
136 DEFAULT_INTERRUPT (OVI0, 82)
137 RESERVE_INTERRUPT ( 83)
138 DEFAULT_INTERRUPT (IMIA1, 84)
139 DEFAULT_INTERRUPT (IMIB1, 85)
140 DEFAULT_INTERRUPT (OVI1, 86)
141 RESERVE_INTERRUPT ( 87)
142 DEFAULT_INTERRUPT (IMIA2, 88)
143 DEFAULT_INTERRUPT (IMIB2, 89)
144 DEFAULT_INTERRUPT (OVI2, 90)
145 RESERVE_INTERRUPT ( 91)
146 DEFAULT_INTERRUPT (IMIA3, 92)
147 DEFAULT_INTERRUPT (IMIB3, 93)
148 DEFAULT_INTERRUPT (OVI3, 94)
149 RESERVE_INTERRUPT ( 95)
150 DEFAULT_INTERRUPT (IMIA4, 96)
151 DEFAULT_INTERRUPT (IMIB4, 97)
152 DEFAULT_INTERRUPT (OVI4, 98)
153 RESERVE_INTERRUPT ( 99)
154 DEFAULT_INTERRUPT (REI0, 100)
155 DEFAULT_INTERRUPT (RXI0, 101)
156 DEFAULT_INTERRUPT (TXI0, 102)
157 DEFAULT_INTERRUPT (TEI0, 103)
158 DEFAULT_INTERRUPT (REI1, 104)
159 DEFAULT_INTERRUPT (RXI1, 105)
160 DEFAULT_INTERRUPT (TXI1, 106)
161 DEFAULT_INTERRUPT (TEI1, 107)
162 RESERVE_INTERRUPT ( 108)
163 DEFAULT_INTERRUPT (ADITI, 109)
164
165/* UIE# block.
166 * Must go into the same section as the UIE() handler */
167
168 "\t.text\n"
169 "_UIE4:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
170 "_UIE5:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
171 "_UIE6:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
172 "_UIE7:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
173 "_UIE8:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
174 "_UIE9:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
175 "_UIE10:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
176 "_UIE11:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
177 "_UIE12:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
178 "_UIE13:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
179 "_UIE14:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
180 "_UIE15:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
181 "_UIE16:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
182 "_UIE17:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
183 "_UIE18:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
184 "_UIE19:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
185 "_UIE20:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
186 "_UIE21:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
187 "_UIE22:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
188 "_UIE23:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
189 "_UIE24:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
190 "_UIE25:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
191 "_UIE26:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
192 "_UIE27:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
193 "_UIE28:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
194 "_UIE29:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
195 "_UIE30:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
196 "_UIE31:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
197 "_UIE32:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
198 "_UIE33:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
199 "_UIE34:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
200 "_UIE35:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
201 "_UIE36:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
202 "_UIE37:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
203 "_UIE38:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
204 "_UIE39:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
205 "_UIE40:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
206 "_UIE41:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
207 "_UIE42:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
208 "_UIE43:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
209 "_UIE44:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
210 "_UIE45:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
211 "_UIE46:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
212 "_UIE47:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
213 "_UIE48:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
214 "_UIE49:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
215 "_UIE50:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
216 "_UIE51:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
217 "_UIE52:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
218 "_UIE53:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
219 "_UIE54:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
220 "_UIE55:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
221 "_UIE56:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
222 "_UIE57:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
223 "_UIE58:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
224 "_UIE59:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
225 "_UIE60:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
226 "_UIE61:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
227 "_UIE62:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
228 "_UIE63:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
229 "_UIE64:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
230 "_UIE65:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
231 "_UIE66:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
232 "_UIE67:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
233 "_UIE68:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
234 "_UIE69:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
235 "_UIE70:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
236 "_UIE71:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
237 "_UIE72:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
238 "_UIE73:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
239 "_UIE74:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
240 "_UIE75:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
241 "_UIE76:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
242 "_UIE77:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
243 "_UIE78:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
244 "_UIE79:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
245 "_UIE80:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
246 "_UIE81:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
247 "_UIE82:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
248 "_UIE83:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
249 "_UIE84:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
250 "_UIE85:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
251 "_UIE86:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
252 "_UIE87:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
253 "_UIE88:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
254 "_UIE89:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
255 "_UIE90:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
256 "_UIE91:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
257 "_UIE92:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
258 "_UIE93:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
259 "_UIE94:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
260 "_UIE95:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
261 "_UIE96:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
262 "_UIE97:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
263 "_UIE98:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
264 "_UIE99:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
265 "_UIE100:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
266 "_UIE101:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
267 "_UIE102:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
268 "_UIE103:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
269 "_UIE104:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
270 "_UIE105:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
271 "_UIE106:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
272 "_UIE107:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
273 "_UIE108:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
274 "_UIE109:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
275
276);
277
278extern void UIE4(void); /* needed for calculating the UIE number */
279
280void UIE (unsigned int pc) __attribute__((section(".text")));
281void UIE (unsigned int pc) /* Unexpected Interrupt or Exception */
282{
283#if CONFIG_LED == LED_REAL
284 bool state = false;
285 int i = 0;
286#endif
287 unsigned int n;
288 char str[32];
289
290 asm volatile ("sts\tpr,%0" : "=r"(n));
291
292 /* clear screen */
293 lcd_clear_display ();
294#ifdef HAVE_LCD_BITMAP
295 lcd_setfont(FONT_SYSFIXED);
296#endif
297 /* output exception */
298 n = (n - (unsigned)UIE4 + 12)>>2; /* get exception or interrupt number */
299 snprintf(str,sizeof(str),"I%02x:%s",n,irqname[n]);
300 lcd_puts(0,0,str);
301 snprintf(str,sizeof(str),"at %08x",pc);
302 lcd_puts(0,1,str);
303 lcd_update ();
304
305 while (1)
306 {
307#if CONFIG_LED == LED_REAL
308 if (--i <= 0)
309 {
310 state = !state;
311 led(state);
312 i = 240000;
313 }
314#endif
315
316 /* try to restart firmware if ON is pressed */
317#if CONFIG_KEYPAD == PLAYER_PAD
318 if (!(PADRL & 0x20))
319#elif CONFIG_KEYPAD == RECORDER_PAD
320#ifdef HAVE_FMADC
321 if (!(PCDR & 0x0008))
322#else
323 if (!(PBDRH & 0x01))
324#endif
325#elif CONFIG_KEYPAD == ONDIO_PAD
326 if (!(PCDR & 0x0008))
327#endif
328 {
329 /* enable the watchguard timer, but don't service it */
330 RSTCSR_W = 0x5a40; /* Reset enabled, power-on reset */
331 TCSR_W = 0xa560; /* Watchdog timer mode, timer enabled, sysclk/2 */
332 }
333 }
334}
335
336void system_init(void)
337{
338 /* Disable all interrupts */
339 IPRA = 0;
340 IPRB = 0;
341 IPRC = 0;
342 IPRD = 0;
343 IPRE = 0;
344
345 /* NMI level low, falling edge on all interrupts */
346 ICR = 0;
347
348 /* Enable burst and RAS down mode on DRAM */
349 DCR |= 0x5000;
350
351 /* Activate Warp mode (simultaneous internal and external mem access) */
352 BCR |= 0x2000;
353
354 /* Bus state controller initializations. These are only necessary when
355 running from flash. */
356 WCR1 = 0x40FD; /* Long wait states for CS6 (ATA), short for the rest. */
357 WCR3 = 0x8000; /* WAIT is pulled up, 1 state inserted for CS6 */
358}
359
360void system_reboot (void)
361{
362 set_irq_level(HIGHEST_IRQ_LEVEL);
363
364 asm volatile ("ldc\t%0,vbr" : : "r"(0));
365
366 PACR2 |= 0x4000; /* for coldstart detection */
367 IPRA = 0;
368 IPRB = 0;
369 IPRC = 0;
370 IPRD = 0;
371 IPRE = 0;
372 ICR = 0;
373
374 asm volatile ("jmp @%0; mov.l @%1,r15" : :
375 "r"(*(int*)0),"r"(4));
376}
377
378/* Utilise the user break controller to catch invalid memory accesses. */
379int system_memory_guard(int newmode)
380{
381 static const struct {
382 unsigned long addr;
383 unsigned long mask;
384 unsigned short bbr;
385 } modes[MAXMEMGUARD] = {
386 /* catch nothing */
387 { 0x00000000, 0x00000000, 0x0000 },
388 /* catch writes to area 02 (flash ROM) */
389 { 0x02000000, 0x00FFFFFF, 0x00F8 },
390 /* catch all accesses to areas 00 (internal ROM) and 01 (free) */
391 { 0x00000000, 0x01FFFFFF, 0x00FC }
392 };
393
394 int oldmode = MEMGUARD_NONE;
395 int i;
396
397 /* figure out the old mode from what is in the UBC regs. If the register
398 values don't match any mode, assume MEMGUARD_NONE */
399 for (i = MEMGUARD_NONE; i < MAXMEMGUARD; i++)
400 {
401 if (BAR == modes[i].addr && BAMR == modes[i].mask &&
402 BBR == modes[i].bbr)
403 {
404 oldmode = i;
405 break;
406 }
407 }
408
409 if (newmode == MEMGUARD_KEEP)
410 newmode = oldmode;
411
412 BBR = 0; /* switch off everything first */
413
414 /* always set the UBC according to the mode, in case the old settings
415 didn't match any valid mode */
416 BAR = modes[newmode].addr;
417 BAMR = modes[newmode].mask;
418 BBR = modes[newmode].bbr;
419
420 return oldmode;
421}
diff --git a/firmware/target/sh/system-target.h b/firmware/target/sh/system-target.h
new file mode 100644
index 0000000000..50ada65eb6
--- /dev/null
+++ b/firmware/target/sh/system-target.h
@@ -0,0 +1,110 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2007 by Jens Arnold
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19#ifndef SYSTEM_TARGET_H
20#define SYSTEM_TARGET_H
21
22#define or_b(mask, address) \
23 asm \
24 ("or.b %0,@(r0,gbr)" \
25 : \
26 : /* %0 */ I_CONSTRAINT((char)(mask)), \
27 /* %1 */ "z"(address-GBR))
28
29#define and_b(mask, address) \
30 asm \
31 ("and.b %0,@(r0,gbr)" \
32 : \
33 : /* %0 */ I_CONSTRAINT((char)(mask)), \
34 /* %1 */ "z"(address-GBR))
35
36#define xor_b(mask, address) \
37 asm \
38 ("xor.b %0,@(r0,gbr)" \
39 : \
40 : /* %0 */ I_CONSTRAINT((char)(mask)), \
41 /* %1 */ "z"(address-GBR))
42
43
44/****************************************************************************
45 * Interrupt level setting
46 * The level is left shifted 4 bits
47 ****************************************************************************/
48#define HIGHEST_IRQ_LEVEL (15<<4)
49
50static inline int set_irq_level(int level)
51{
52 int i;
53 /* Read the old level and set the new one */
54 asm volatile ("stc sr, %0" : "=r" (i));
55 asm volatile ("ldc %0, sr" : : "r" (level));
56 return i;
57}
58
59static inline uint16_t swap16(uint16_t value)
60 /*
61 result[15..8] = value[ 7..0];
62 result[ 7..0] = value[15..8];
63 */
64{
65 uint16_t result;
66 asm volatile ("swap.b\t%1,%0" : "=r"(result) : "r"(value));
67 return result;
68}
69
70static inline uint32_t SWAW32(uint32_t value)
71 /*
72 result[31..16] = value[15.. 0];
73 result[15.. 0] = value[31..16];
74 */
75{
76 uint32_t result;
77 asm volatile ("swap.w\t%1,%0" : "=r"(result) : "r"(value));
78 return result;
79}
80
81static inline uint32_t swap32(uint32_t value)
82 /*
83 result[31..24] = value[ 7.. 0];
84 result[23..16] = value[15.. 8];
85 result[15.. 8] = value[23..16];
86 result[ 7.. 0] = value[31..24];
87 */
88{
89 asm volatile ("swap.b\t%0,%0\n"
90 "swap.w\t%0,%0\n"
91 "swap.b\t%0,%0\n" : "+r"(value));
92 return value;
93}
94
95static inline uint32_t swap_odd_even32(uint32_t value)
96{
97 /*
98 result[31..24],[15.. 8] = value[23..16],[ 7.. 0]
99 result[23..16],[ 7.. 0] = value[31..24],[15.. 8]
100 */
101 asm volatile ("swap.b\t%0,%0\n"
102 "swap.w\t%0,%0\n"
103 "swap.b\t%0,%0\n"
104 "swap.w\t%0,%0\n" : "+r"(value));
105 return value;
106}
107
108#define invalidate_icache()
109
110#endif /* SYSTEM_TARGET_H */
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-28 23:30:30 +0000