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author | Michael Sevakis <jethead71@rockbox.org> | 2011-11-27 07:01:47 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2011-11-27 07:01:47 +0000 |
commit | 47452dcd5c2fcb05b3db738b3a684d0ee713f928 (patch) | |
tree | ffabdcc08208283e1051772968a090a5b4840f7b | |
parent | a99d9eca0bf45771136f63d549ec33e9ad79f571 (diff) | |
download | rockbox-47452dcd5c2fcb05b3db738b3a684d0ee713f928.tar.gz rockbox-47452dcd5c2fcb05b3db738b3a684d0ee713f928.zip |
PortalPlayer: Loading of stack munge value into r4 was moved in r30741 to after the idle stack init loop, breaking the usage readout.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@31068 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/target/arm/crt0-pp.S | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/firmware/target/arm/crt0-pp.S b/firmware/target/arm/crt0-pp.S index 4a9d4232b4..5a9835a71f 100644 --- a/firmware/target/arm/crt0-pp.S +++ b/firmware/target/arm/crt0-pp.S | |||
@@ -26,7 +26,7 @@ | |||
26 | .global start | 26 | .global start |
27 | start: | 27 | start: |
28 | 28 | ||
29 | /* PortalPlayer bootloader and startup code based on startup.s from the iPodLinux | 29 | /* PortalPlayer bootloader and startup code based on startup.s from the iPodLinux |
30 | * loader | 30 | * loader |
31 | * | 31 | * |
32 | * Copyright (c) 2003, Daniel Palffy (dpalffy (at) rainstorm.org) | 32 | * Copyright (c) 2003, Daniel Palffy (dpalffy (at) rainstorm.org) |
@@ -65,7 +65,7 @@ start: | |||
65 | .equ SLEEP, 0x80000000 | 65 | .equ SLEEP, 0x80000000 |
66 | .equ WAKE, 0x00000000 | 66 | .equ WAKE, 0x00000000 |
67 | .equ CPUSLEEPING, 0x80000000 | 67 | .equ CPUSLEEPING, 0x80000000 |
68 | .equ COPSLEEPING, 0x80000000 | 68 | .equ COPSLEEPING, 0x80000000 |
69 | .equ CACHE_CTRL, 0x6000c000 | 69 | .equ CACHE_CTRL, 0x6000c000 |
70 | .equ MMAP_LOG, 0xf000f000 /* MMAP0 */ | 70 | .equ MMAP_LOG, 0xf000f000 /* MMAP0 */ |
71 | .equ MMAP_PHYS, 0xf000f004 | 71 | .equ MMAP_PHYS, 0xf000f004 |
@@ -90,7 +90,7 @@ start: | |||
90 | pad_skip: | 90 | pad_skip: |
91 | /* Find out which processor we are - r0 should be preserved for the | 91 | /* Find out which processor we are - r0 should be preserved for the |
92 | * duration of the init to avoid constant reloading of the processor ID. | 92 | * duration of the init to avoid constant reloading of the processor ID. |
93 | * For each stage, CPU proceeds first, then COP. | 93 | * For each stage, CPU proceeds first, then COP. |
94 | */ | 94 | */ |
95 | ldr r0, =PROC_ID | 95 | ldr r0, =PROC_ID |
96 | ldrb r0, [r0] | 96 | ldrb r0, [r0] |
@@ -109,10 +109,10 @@ pad_skip: | |||
109 | and wait for the COP to finish. This ensures no threading activity | 109 | and wait for the COP to finish. This ensures no threading activity |
110 | starts until it is safe. */ | 110 | starts until it is safe. */ |
111 | cmp r0, #0x55 | 111 | cmp r0, #0x55 |
112 | 112 | ||
113 | /* mask all interrupt sources before setting anything up */ | 113 | /* mask all interrupt sources before setting anything up */ |
114 | ldreq r2, =CPU_ICLR | 114 | ldreq r2, =CPU_ICLR |
115 | ldrne r2, =COP_ICLR | 115 | ldrne r2, =COP_ICLR |
116 | mvn r1, #0 | 116 | mvn r1, #0 |
117 | str r1, [r2] | 117 | str r1, [r2] |
118 | 118 | ||
@@ -175,7 +175,7 @@ pad_skip: | |||
175 | ldr r3, =MMAP_PHYS | 175 | ldr r3, =MMAP_PHYS |
176 | ldr r2, =MMAP_MASK /* ldr is more flexible */ | 176 | ldr r2, =MMAP_MASK /* ldr is more flexible */ |
177 | ldr r1, =MMAP_LOG | 177 | ldr r1, =MMAP_LOG |
178 | mov pc, #0x40000000 | 178 | mov pc, #0x40000000 |
179 | 179 | ||
180 | remap_start: | 180 | remap_start: |
181 | str r2, [r1] | 181 | str r2, [r1] |
@@ -207,7 +207,7 @@ cpu_init: | |||
207 | ldr r3, [r4] | 207 | ldr r3, [r4] |
208 | tst r3, #COPSLEEPING | 208 | tst r3, #COPSLEEPING |
209 | beq 1b | 209 | beq 1b |
210 | 210 | ||
211 | /* Vectors and IRAM copy is done first since they are reclaimed for | 211 | /* Vectors and IRAM copy is done first since they are reclaimed for |
212 | * other uninitialized sections */ | 212 | * other uninitialized sections */ |
213 | 213 | ||
@@ -220,7 +220,7 @@ cpu_init: | |||
220 | ldrhi r5, [r4], #4 | 220 | ldrhi r5, [r4], #4 |
221 | strhi r5, [r2], #4 | 221 | strhi r5, [r2], #4 |
222 | bhi 1b | 222 | bhi 1b |
223 | 223 | ||
224 | /* Copy the IRAM */ | 224 | /* Copy the IRAM */ |
225 | ldr r2, =_iramcopy | 225 | ldr r2, =_iramcopy |
226 | ldr r3, =_iramstart | 226 | ldr r3, =_iramstart |
@@ -262,6 +262,9 @@ cpu_init: | |||
262 | strhi r4, [r2], #4 | 262 | strhi r4, [r2], #4 |
263 | bhi 1b | 263 | bhi 1b |
264 | 264 | ||
265 | /* Load stack munge value */ | ||
266 | ldr r4, =0xdeadbeef | ||
267 | |||
265 | #if NUM_CORES > 1 | 268 | #if NUM_CORES > 1 |
266 | /* Set up idle stack and munge it with 0xdeadbeef */ | 269 | /* Set up idle stack and munge it with 0xdeadbeef */ |
267 | ldr r2, =cpu_idlestackbegin | 270 | ldr r2, =cpu_idlestackbegin |
@@ -272,10 +275,10 @@ cpu_init: | |||
272 | bhi 1b | 275 | bhi 1b |
273 | #endif | 276 | #endif |
274 | 277 | ||
275 | /* Set up stack for IRQ mode */ | 278 | /* Set up stack for IRQ mode */ |
276 | msr cpsr_c, #0x92 /* IRQ disabled, FIQ enabled */ | 279 | msr cpsr_c, #0x92 /* IRQ disabled, FIQ enabled */ |
277 | ldr sp, =irq_stack | 280 | ldr sp, =irq_stack |
278 | /* Set up stack for FIQ mode */ | 281 | /* Set up stack for FIQ mode */ |
279 | msr cpsr_c, #0xd1 /* IRQ/FIQ disabled */ | 282 | msr cpsr_c, #0xd1 /* IRQ/FIQ disabled */ |
280 | ldr sp, =fiq_stack | 283 | ldr sp, =fiq_stack |
281 | 284 | ||
@@ -290,9 +293,6 @@ cpu_init: | |||
290 | /* Switch to sys mode */ | 293 | /* Switch to sys mode */ |
291 | msr cpsr_c, #0xdf | 294 | msr cpsr_c, #0xdf |
292 | 295 | ||
293 | /* Load stack munge value */ | ||
294 | ldr r4, =0xdeadbeef | ||
295 | |||
296 | /* Set up some stack and munge it with 0xdeadbeef */ | 296 | /* Set up some stack and munge it with 0xdeadbeef */ |
297 | ldr r2, =stackbegin | 297 | ldr r2, =stackbegin |
298 | ldr sp, =stackend | 298 | ldr sp, =stackend |
@@ -349,7 +349,7 @@ cop_init: | |||
349 | cmp sp, r2 | 349 | cmp sp, r2 |
350 | strhi r4, [r2], #4 | 350 | strhi r4, [r2], #4 |
351 | bhi 2b | 351 | bhi 2b |
352 | 352 | ||
353 | /* Run cop_main() in apps/main.c */ | 353 | /* Run cop_main() in apps/main.c */ |
354 | ldr pc, =cop_main | 354 | ldr pc, =cop_main |
355 | 355 | ||
@@ -367,7 +367,7 @@ cop_init: | |||
367 | /* Exception vectors */ | 367 | /* Exception vectors */ |
368 | .global vectors | 368 | .global vectors |
369 | vectors: | 369 | vectors: |
370 | .word start | 370 | .word start |
371 | .word undef_instr_handler | 371 | .word undef_instr_handler |
372 | .word software_int_handler | 372 | .word software_int_handler |
373 | .word prefetch_abort_handler | 373 | .word prefetch_abort_handler |
@@ -403,13 +403,13 @@ prefetch_abort_handler: | |||
403 | b UIE | 403 | b UIE |
404 | 404 | ||
405 | data_abort_handler: | 405 | data_abort_handler: |
406 | sub r0, lr, #8 | 406 | sub r0, lr, #8 |
407 | mov r1, #2 | 407 | mov r1, #2 |
408 | b UIE | 408 | b UIE |
409 | 409 | ||
410 | /* Align stacks to cache line boundary */ | 410 | /* Align stacks to cache line boundary */ |
411 | .balign 32 | 411 | .balign 32 |
412 | 412 | ||
413 | /* 256 words of IRQ stack */ | 413 | /* 256 words of IRQ stack */ |
414 | .space 256*4 | 414 | .space 256*4 |
415 | irq_stack: | 415 | irq_stack: |