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author | Thom Johansen <thomj@rockbox.org> | 2006-03-17 02:45:06 +0000 |
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committer | Thom Johansen <thomj@rockbox.org> | 2006-03-17 02:45:06 +0000 |
commit | 4092029b3b616b09e483db1d1eb5e3566b518d9d (patch) | |
tree | 8f6f1eaffa044ff24e3fbe3e0ff52186f9059511 | |
parent | 4fead08e7b4cd3af83c118f3eea1f728e4d1eac4 (diff) | |
download | rockbox-4092029b3b616b09e483db1d1eb5e3566b518d9d.tar.gz rockbox-4092029b3b616b09e483db1d1eb5e3566b518d9d.zip |
Don't paste when sleepy, kids.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@9075 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/export/system.h | 31 |
1 files changed, 15 insertions, 16 deletions
diff --git a/firmware/export/system.h b/firmware/export/system.h index 150f87210d..1f74b27f29 100644 --- a/firmware/export/system.h +++ b/firmware/export/system.h | |||
@@ -306,7 +306,7 @@ static inline void invalidate_icache(void) | |||
306 | /* TODO: Implement set_irq_level and check CPU frequencies */ | 306 | /* TODO: Implement set_irq_level and check CPU frequencies */ |
307 | 307 | ||
308 | #define CPUFREQ_DEFAULT_MULT 8 | 308 | #define CPUFREQ_DEFAULT_MULT 8 |
309 | #define CPUFREQ_DEFAULT 240000000 | 309 | #define CPUFREQ_DEFAULT 24000000 |
310 | #define CPUFREQ_NORMAL_MULT 10 | 310 | #define CPUFREQ_NORMAL_MULT 10 |
311 | #define CPUFREQ_NORMAL 30000000 | 311 | #define CPUFREQ_NORMAL 30000000 |
312 | #define CPUFREQ_MAX_MULT 25 | 312 | #define CPUFREQ_MAX_MULT 25 |
@@ -328,10 +328,17 @@ static inline unsigned long swap32(unsigned long value) | |||
328 | result[15.. 8] = value[23..16]; | 328 | result[15.. 8] = value[23..16]; |
329 | result[ 7.. 0] = value[31..24]; | 329 | result[ 7.. 0] = value[31..24]; |
330 | */ | 330 | */ |
331 | { | 331 | { |
332 | unsigned long hi = swap16(value >> 16); | 332 | unsigned int tmp; |
333 | unsigned long lo = swap16(value & 0xffff); | 333 | |
334 | return (lo << 16) | hi; | 334 | asm volatile ( |
335 | "eor %1, %0, %0, ror #16 \n\t" | ||
336 | "bic %1, %1, #0xff0000 \n\t" | ||
337 | "mov %0, %0, ror #8 \n\t" | ||
338 | "eor %0, %0, %1, lsr #8 \n\t" | ||
339 | : "+r" (value), "=r" (tmp) | ||
340 | ); | ||
341 | return value; | ||
335 | } | 342 | } |
336 | 343 | ||
337 | #define HIGHEST_IRQ_LEVEL (1) | 344 | #define HIGHEST_IRQ_LEVEL (1) |
@@ -463,19 +470,11 @@ static inline unsigned long swap32(unsigned long value) | |||
463 | result[ 7.. 0] = value[31..24]; | 470 | result[ 7.. 0] = value[31..24]; |
464 | */ | 471 | */ |
465 | { | 472 | { |
466 | unsigned int tmp; | 473 | unsigned long hi = swap16(value >> 16); |
467 | 474 | unsigned long lo = swap16(value & 0xffff); | |
468 | asm volatile ( | 475 | return (lo << 16) | hi; |
469 | "eor %1, %0, %0, ror #16 \n\t" | ||
470 | "bic %1, %1, #0xff0000 \n\t" | ||
471 | "mov %0, %0, ror #8 \n\t" | ||
472 | "eor %0, %0, %1, lsr #8 \n\t" | ||
473 | : "+r" (value), "=r" (tmp) | ||
474 | ); | ||
475 | return value; | ||
476 | } | 476 | } |
477 | 477 | ||
478 | |||
479 | #define invalidate_icache() | 478 | #define invalidate_icache() |
480 | 479 | ||
481 | #endif | 480 | #endif |