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author | Jack Halpin <jack.halpin@gmail.com> | 2010-03-11 19:01:49 +0000 |
---|---|---|
committer | Jack Halpin <jack.halpin@gmail.com> | 2010-03-11 19:01:49 +0000 |
commit | 405f6e6dbcfdd3f2b6923822106833b6270cdb52 (patch) | |
tree | 7d07eafb760d3823c6260bc7c8dc4af1a0dd6ec2 | |
parent | e39b653947ac8acfa89f1e02541570925eaf5593 (diff) | |
download | rockbox-405f6e6dbcfdd3f2b6923822106833b6270cdb52.tar.gz rockbox-405f6e6dbcfdd3f2b6923822106833b6270cdb52.zip |
SansaAMS: debug-as3525.c Allow View HW info page to display correct info for both V1 & V2 versions of as3525.
calc_freq(CLK_PLLA) for as3525v2 simply returns 240MHz instead of calculating until we understand how it is calculated.
Now displays 922T or 926ejs depending on version.
Remove SD and uSD info from as3525v2 as it is not useful due to different SD controller.
Increased the lines used for each page of display on clip screen size.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25120 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/target/arm/as3525/debug-as3525.c | 76 |
1 files changed, 49 insertions, 27 deletions
diff --git a/firmware/target/arm/as3525/debug-as3525.c b/firmware/target/arm/as3525/debug-as3525.c index 6ec065b03c..037dc044f2 100644 --- a/firmware/target/arm/as3525/debug-as3525.c +++ b/firmware/target/arm/as3525/debug-as3525.c | |||
@@ -43,7 +43,7 @@ | |||
43 | 43 | ||
44 | #define CLK_PLLA 0 | 44 | #define CLK_PLLA 0 |
45 | #define CLK_PLLB 1 | 45 | #define CLK_PLLB 1 |
46 | #define CLK_922T 2 | 46 | #define CLK_PROC 2 |
47 | #define CLK_FCLK 3 | 47 | #define CLK_FCLK 3 |
48 | #define CLK_EXTMEM 4 | 48 | #define CLK_EXTMEM 4 |
49 | #define CLK_PCLK 5 | 49 | #define CLK_PCLK 5 |
@@ -81,9 +81,10 @@ static inline unsigned read_cp15 (void) | |||
81 | 81 | ||
82 | static int calc_freq(int clk) | 82 | static int calc_freq(int clk) |
83 | { | 83 | { |
84 | int out_div; | ||
85 | unsigned int prediv = ((unsigned int)CGU_PROC>>2) & 0x3; | 84 | unsigned int prediv = ((unsigned int)CGU_PROC>>2) & 0x3; |
86 | unsigned int postdiv = ((unsigned int)CGU_PROC>>4) & 0xf; | 85 | unsigned int postdiv = ((unsigned int)CGU_PROC>>4) & 0xf; |
86 | #if CONFIG_CPU == AS3525 | ||
87 | int out_div; | ||
87 | 88 | ||
88 | switch(clk) { | 89 | switch(clk) { |
89 | /* clk_main = clk_int = 24MHz oscillator */ | 90 | /* clk_main = clk_int = 24MHz oscillator */ |
@@ -111,7 +112,17 @@ static int calc_freq(int clk) | |||
111 | return ((2 * (CGU_PLLB & 0xff))*CLK_MAIN)/ | 112 | return ((2 * (CGU_PLLB & 0xff))*CLK_MAIN)/ |
112 | (((CGU_PLLB>>8) & 0x1f)*out_div); | 113 | (((CGU_PLLB>>8) & 0x1f)*out_div); |
113 | return 0; | 114 | return 0; |
114 | case CLK_922T: | 115 | #else |
116 | /* AS3525v2 */ | ||
117 | switch(clk) { | ||
118 | /* we're using a known setting for PLLA = 240 MHz and PLLB inop */ | ||
119 | case CLK_PLLA: | ||
120 | return 240000000; | ||
121 | |||
122 | case CLK_PLLB: | ||
123 | return 0; | ||
124 | #endif | ||
125 | case CLK_PROC: | ||
115 | if (!(read_cp15()>>30)) /* fastbus */ | 126 | if (!(read_cp15()>>30)) /* fastbus */ |
116 | return calc_freq(CLK_PCLK); | 127 | return calc_freq(CLK_PCLK); |
117 | else /* Synch or Asynch bus*/ | 128 | else /* Synch or Asynch bus*/ |
@@ -181,6 +192,7 @@ static int calc_freq(int clk) | |||
181 | } | 192 | } |
182 | case CLK_DBOP: | 193 | case CLK_DBOP: |
183 | return calc_freq(CLK_PCLK)/((CGU_DBOP & 7)+1); | 194 | return calc_freq(CLK_PCLK)/((CGU_DBOP & 7)+1); |
195 | #if CONFIG_CPU == AS3525 | ||
184 | case CLK_SD_MCLK_NAND: | 196 | case CLK_SD_MCLK_NAND: |
185 | if(!(MCI_NAND & (1<<8))) | 197 | if(!(MCI_NAND & (1<<8))) |
186 | return 0; | 198 | return 0; |
@@ -195,6 +207,7 @@ static int calc_freq(int clk) | |||
195 | return calc_freq(CLK_PCLK); | 207 | return calc_freq(CLK_PCLK); |
196 | else | 208 | else |
197 | return calc_freq(CLK_PCLK)/(((MCI_SD & 0xff)+1)*2); | 209 | return calc_freq(CLK_PCLK)/(((MCI_SD & 0xff)+1)*2); |
210 | #endif | ||
198 | case CLK_USB: | 211 | case CLK_USB: |
199 | switch(CGU_USB & 3) { /* 0-> div=1 other->div=1/(2*n) */ | 212 | switch(CGU_USB & 3) { /* 0-> div=1 other->div=1/(2*n) */ |
200 | case 0: | 213 | case 0: |
@@ -223,10 +236,12 @@ static int calc_freq(int clk) | |||
223 | bool __dbg_hw_info(void) | 236 | bool __dbg_hw_info(void) |
224 | { | 237 | { |
225 | int line; | 238 | int line; |
239 | #if CONFIG_CPU == AS3525 | ||
226 | int last_nand = 0; | 240 | int last_nand = 0; |
227 | #ifdef HAVE_MULTIDRIVE | 241 | #ifdef HAVE_MULTIDRIVE |
228 | int last_sd = 0; | 242 | int last_sd = 0; |
229 | #endif | 243 | #endif |
244 | #endif /* CONFIG_CPU == AS3525 */ | ||
230 | 245 | ||
231 | lcd_clear_display(); | 246 | lcd_clear_display(); |
232 | lcd_setfont(FONT_SYSFIXED); | 247 | lcd_setfont(FONT_SYSFIXED); |
@@ -238,15 +253,23 @@ bool __dbg_hw_info(void) | |||
238 | lcd_clear_display(); | 253 | lcd_clear_display(); |
239 | line = 0; | 254 | line = 0; |
240 | lcd_puts(0, line++, "[Clock Frequencies:]"); | 255 | lcd_puts(0, line++, "[Clock Frequencies:]"); |
241 | lcd_puts(0, line++, " SET ACTUAL"); | 256 | lcd_puts(0, line++, " SET ACTUAL"); |
257 | #if CONFIG_CPU == AS3525 | ||
242 | lcd_putsf(0, line++, "922T:%s %3dMHz", | 258 | lcd_putsf(0, line++, "922T:%s %3dMHz", |
259 | #else | ||
260 | lcd_putsf(0, line++, "926ejs:%s %3dMHz", | ||
261 | #endif | ||
243 | (!(read_cp15()>>30)) ? "FAST " : | 262 | (!(read_cp15()>>30)) ? "FAST " : |
244 | (read_cp15()>>31) ? "ASYNC" : "SYNC ", | 263 | (read_cp15()>>31) ? "ASYNC" : "SYNC ", |
245 | calc_freq(CLK_922T)/1000000); | 264 | calc_freq(CLK_PROC)/1000000); |
246 | lcd_putsf(0, line++, "PLLA:%3dMHz %3dMHz", AS3525_PLLA_FREQ/1000000, | 265 | lcd_putsf(0, line++, "PLLA:%3dMHz %3dMHz", AS3525_PLLA_FREQ/1000000, |
247 | calc_freq(CLK_PLLA)/1000000); | 266 | calc_freq(CLK_PLLA)/1000000); |
248 | lcd_putsf(0, line++, "PLLB: %3dMHz", calc_freq(CLK_PLLB)/1000000); | 267 | lcd_putsf(0, line++, "PLLB: %3dMHz", calc_freq(CLK_PLLB)/1000000); |
249 | lcd_putsf(0, line++, "FCLK: %3dMHz", calc_freq(CLK_FCLK)/1000000); | 268 | lcd_putsf(0, line++, "FCLK: %3dMHz", calc_freq(CLK_FCLK)/1000000); |
269 | lcd_putsf(0, line++, "DRAM:%3dMHz %3dMHz", AS3525_PCLK_FREQ/1000000, | ||
270 | calc_freq(CLK_EXTMEM)/1000000); | ||
271 | lcd_putsf(0, line++, "PCLK:%3dMHz %3dMHz", AS3525_PCLK_FREQ/1000000, | ||
272 | calc_freq(CLK_PCLK)/1000000); | ||
250 | 273 | ||
251 | #if LCD_HEIGHT < 176 /* clip */ | 274 | #if LCD_HEIGHT < 176 /* clip */ |
252 | lcd_update(); | 275 | lcd_update(); |
@@ -262,10 +285,6 @@ bool __dbg_hw_info(void) | |||
262 | line = 0; | 285 | line = 0; |
263 | #endif /* LCD_HEIGHT < 176 */ | 286 | #endif /* LCD_HEIGHT < 176 */ |
264 | 287 | ||
265 | lcd_putsf(0, line++, "DRAM:%3dMHz %3dMHz", AS3525_PCLK_FREQ/1000000, | ||
266 | calc_freq(CLK_EXTMEM)/1000000); | ||
267 | lcd_putsf(0, line++, "PCLK:%3dMHz %3dMHz", AS3525_PCLK_FREQ/1000000, | ||
268 | calc_freq(CLK_PCLK)/1000000); | ||
269 | lcd_putsf(0, line++, "IDE :%3dMHz %3dMHz", AS3525_IDE_FREQ/1000000, | 288 | lcd_putsf(0, line++, "IDE :%3dMHz %3dMHz", AS3525_IDE_FREQ/1000000, |
270 | calc_freq(CLK_IDE)/1000000); | 289 | calc_freq(CLK_IDE)/1000000); |
271 | lcd_putsf(0, line++, "DBOP:%3dMHz %3dMHz", AS3525_DBOP_FREQ/1000000, | 290 | lcd_putsf(0, line++, "DBOP:%3dMHz %3dMHz", AS3525_DBOP_FREQ/1000000, |
@@ -274,24 +293,9 @@ bool __dbg_hw_info(void) | |||
274 | calc_freq(CLK_I2C)/1000); | 293 | calc_freq(CLK_I2C)/1000); |
275 | lcd_putsf(0, line++, "I2SI: %s %3dMHz", (CGU_AUDIO & (1<<23)) ? | 294 | lcd_putsf(0, line++, "I2SI: %s %3dMHz", (CGU_AUDIO & (1<<23)) ? |
276 | "on " : "off" , calc_freq(CLK_I2SI)/1000000); | 295 | "on " : "off" , calc_freq(CLK_I2SI)/1000000); |
277 | |||
278 | #if LCD_HEIGHT < 176 /* clip */ | ||
279 | lcd_update(); | ||
280 | int btn = button_get_w_tmo(HZ/10); | ||
281 | if(btn == (DEBUG_CANCEL|BUTTON_REL)) | ||
282 | goto end; | ||
283 | else if(btn == (BUTTON_DOWN|BUTTON_REL)) | ||
284 | break; | ||
285 | } | ||
286 | while(1) | ||
287 | { | ||
288 | lcd_clear_display(); | ||
289 | line = 0; | ||
290 | #endif /* LCD_HEIGHT < 176 */ | ||
291 | |||
292 | lcd_putsf(0, line++, "I2SO: %s %3dMHz", (CGU_AUDIO & (1<<11)) ? | 296 | lcd_putsf(0, line++, "I2SO: %s %3dMHz", (CGU_AUDIO & (1<<11)) ? |
293 | "on " : "off", calc_freq(CLK_I2SO)/1000000); | 297 | "on " : "off", calc_freq(CLK_I2SO)/1000000); |
294 | 298 | #if CONFIG_CPU == AS3525 | |
295 | /* If disabled, enable SD cards so we can read the registers */ | 299 | /* If disabled, enable SD cards so we can read the registers */ |
296 | if(sd_enabled == false) | 300 | if(sd_enabled == false) |
297 | { | 301 | { |
@@ -313,7 +317,23 @@ bool __dbg_hw_info(void) | |||
313 | ((last_sd & MCI_CLOCK_BYPASS) ? 1: (((last_sd & 0xff) + 1) * 2))), | 317 | ((last_sd & MCI_CLOCK_BYPASS) ? 1: (((last_sd & 0xff) + 1) * 2))), |
314 | calc_freq(CLK_SD_MCLK_MSD)/1000000); | 318 | calc_freq(CLK_SD_MCLK_MSD)/1000000); |
315 | #endif | 319 | #endif |
320 | #endif /* CONFIG_CPU == AS3525 */ | ||
316 | lcd_putsf(0, line++, "USB : %3dMHz", calc_freq(CLK_USB)/1000000); | 321 | lcd_putsf(0, line++, "USB : %3dMHz", calc_freq(CLK_USB)/1000000); |
322 | |||
323 | #if LCD_HEIGHT < 176 /* clip */ | ||
324 | lcd_update(); | ||
325 | int btn = button_get_w_tmo(HZ/10); | ||
326 | if(btn == (DEBUG_CANCEL|BUTTON_REL)) | ||
327 | goto end; | ||
328 | else if(btn == (BUTTON_DOWN|BUTTON_REL)) | ||
329 | break; | ||
330 | } | ||
331 | while(1) | ||
332 | { | ||
333 | lcd_clear_display(); | ||
334 | line = 0; | ||
335 | #endif /* LCD_HEIGHT < 176 */ | ||
336 | |||
317 | lcd_putsf(0, line++, "MMU : %s CVDDP:%4d", (read_cp15() & CP15_MMU) ? | 337 | lcd_putsf(0, line++, "MMU : %s CVDDP:%4d", (read_cp15() & CP15_MMU) ? |
318 | " on" : "off", adc_read(ADC_CVDD) * 25); | 338 | " on" : "off", adc_read(ADC_CVDD) * 25); |
319 | lcd_putsf(0, line++, "Icache:%s Dcache:%s", | 339 | lcd_putsf(0, line++, "Icache:%s Dcache:%s", |
@@ -338,6 +358,8 @@ bool __dbg_hw_info(void) | |||
338 | lcd_putsf(0, line++, "CGU_PERI :%8x", (unsigned int)(CGU_PERI)); | 358 | lcd_putsf(0, line++, "CGU_PERI :%8x", (unsigned int)(CGU_PERI)); |
339 | lcd_putsf(0, line++, "CGU_IDE :%8x", (unsigned int)(CGU_IDE)); | 359 | lcd_putsf(0, line++, "CGU_IDE :%8x", (unsigned int)(CGU_IDE)); |
340 | lcd_putsf(0, line++, "CGU_DBOP :%8x", (unsigned int)(CGU_DBOP)); | 360 | lcd_putsf(0, line++, "CGU_DBOP :%8x", (unsigned int)(CGU_DBOP)); |
361 | lcd_putsf(0, line++, "CGU_AUDIO :%8x", (unsigned int)(CGU_AUDIO)); | ||
362 | lcd_putsf(0, line++, "CGU_USB :%8x", (unsigned int)(CGU_USB)); | ||
341 | 363 | ||
342 | #if LCD_HEIGHT < 176 /* clip */ | 364 | #if LCD_HEIGHT < 176 /* clip */ |
343 | lcd_update(); | 365 | lcd_update(); |
@@ -353,12 +375,12 @@ bool __dbg_hw_info(void) | |||
353 | line = 0; | 375 | line = 0; |
354 | #endif /* LCD_HEIGHT < 176 */ | 376 | #endif /* LCD_HEIGHT < 176 */ |
355 | 377 | ||
356 | lcd_putsf(0, line++, "CGU_AUDIO :%8x", (unsigned int)(CGU_AUDIO)); | ||
357 | lcd_putsf(0, line++, "CGU_USB :%8x", (unsigned int)(CGU_USB)); | ||
358 | lcd_putsf(0, line++, "I2C2_CPSR :%8x", (unsigned int)(I2C2_CPSR1<<8 | | 378 | lcd_putsf(0, line++, "I2C2_CPSR :%8x", (unsigned int)(I2C2_CPSR1<<8 | |
359 | I2C2_CPSR0)); | 379 | I2C2_CPSR0)); |
380 | #if CONFIG_CPU == AS3525 | ||
360 | lcd_putsf(0, line++, "MCI_NAND :%8x", (unsigned int)(MCI_NAND)); | 381 | lcd_putsf(0, line++, "MCI_NAND :%8x", (unsigned int)(MCI_NAND)); |
361 | lcd_putsf(0, line++, "MCI_SD :%8x", (unsigned int)(MCI_SD)); | 382 | lcd_putsf(0, line++, "MCI_SD :%8x", (unsigned int)(MCI_SD)); |
383 | #endif | ||
362 | 384 | ||
363 | lcd_update(); | 385 | lcd_update(); |
364 | int btn = button_get_w_tmo(HZ/10); | 386 | int btn = button_get_w_tmo(HZ/10); |