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authorDave Chapman <dave@dchapman.com>2006-02-06 02:32:15 +0000
committerDave Chapman <dave@dchapman.com>2006-02-06 02:32:15 +0000
commit383b8d41c1fa1343b0d985632d0872170df04b2b (patch)
tree800a77d3407b23ed3d8751c9365a1f235d126847
parent2f11278b5923adc41e8f285f59bf6b7747340a31 (diff)
downloadrockbox-383b8d41c1fa1343b0d985632d0872170df04b2b.tar.gz
rockbox-383b8d41c1fa1343b0d985632d0872170df04b2b.zip
Some bugfixes for the iPod 4G greyscale version of the LCD driver
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@8594 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/drivers/lcd-ipod.c19
1 files changed, 16 insertions, 3 deletions
diff --git a/firmware/drivers/lcd-ipod.c b/firmware/drivers/lcd-ipod.c
index 529509f4d8..b6a764d996 100644
--- a/firmware/drivers/lcd-ipod.c
+++ b/firmware/drivers/lcd-ipod.c
@@ -45,12 +45,16 @@ static int timer_check(int clock_start, int usecs)
45 45
46/*** hardware configuration ***/ 46/*** hardware configuration ***/
47 47
48#if CONFIG_CPU == PP5002
48#define IPOD_LCD_BASE 0xc0001000 49#define IPOD_LCD_BASE 0xc0001000
49#define IPOD_LCD_BUSY_MASK 0x80000000 50#define IPOD_LCD_BUSY_MASK 0x80000000
51#else /* PP5020 */
52#define IPOD_LCD_BASE 0x70003000
53#define IPOD_LCD_BUSY_MASK 0x00008000
54#endif
50 55
51/* LCD command codes for HD66789R */ 56/* LCD command codes for HD66789R */
52 57
53
54#define LCD_CMD 0x08 58#define LCD_CMD 0x08
55#define LCD_DATA 0x10 59#define LCD_DATA 0x10
56 60
@@ -98,7 +102,7 @@ static void lcd_cmd_and_data(int cmd, int data_lo, int data_hi)
98 102
99int lcd_default_contrast(void) 103int lcd_default_contrast(void)
100{ 104{
101 return 28; 105 return 96;
102} 106}
103 107
104/** 108/**
@@ -109,6 +113,15 @@ void lcd_init_device(void){
109 /* driver output control - 160x128 */ 113 /* driver output control - 160x128 */
110 lcd_cmd_and_data(0x1, 0x1, 0xf); 114 lcd_cmd_and_data(0x1, 0x1, 0xf);
111 lcd_cmd_and_data(0x5, 0x0, 0x10); 115 lcd_cmd_and_data(0x5, 0x0, 0x10);
116
117#ifdef APPLE_IPOD4G
118 outl(inl(0x6000d004) | 0x4, 0x6000d004); /* B02 enable */
119 outl(inl(0x6000d004) | 0x8, 0x6000d004); /* B03 enable */
120 outl(inl(0x70000084) | 0x2000000, 0x70000084); /* D01 enable */
121 outl(inl(0x70000080) | 0x2000000, 0x70000080); /* D01 =1 */
122
123 outl(inl(0x6000600c) | 0x20000, 0x6000600c); /* PWM enable */
124#endif
112} 125}
113 126
114/*** update functions ***/ 127/*** update functions ***/