diff options
author | Michael Sevakis <jethead71@rockbox.org> | 2008-11-25 16:16:06 +0000 |
---|---|---|
committer | Michael Sevakis <jethead71@rockbox.org> | 2008-11-25 16:16:06 +0000 |
commit | 3511d94031d617631036742a51bc8fc9a86527d6 (patch) | |
tree | 1130bfd351ac0796999b831475b33df4d877c6d3 | |
parent | 2b39cb4b77f2ac8ce7601e8e0673e598f8fffbe8 (diff) | |
download | rockbox-3511d94031d617631036742a51bc8fc9a86527d6.tar.gz rockbox-3511d94031d617631036742a51bc8fc9a86527d6.zip |
Add register bit defines for as3514 and clean stuff up. Reduce poppiness at startup and shutdown (and even powerup for e200). Really, I can't honestly say it will help anything but an e200v1 but I'm sick of the noises. ;)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19214 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/drivers/audio/as3514.c | 210 | ||||
-rw-r--r-- | firmware/export/as3514.h | 152 | ||||
-rw-r--r-- | firmware/target/arm/ascodec-pp.c | 24 | ||||
-rw-r--r-- | firmware/target/arm/ascodec-target.h | 2 | ||||
-rw-r--r-- | firmware/target/arm/pcm-pp.c | 2 |
5 files changed, 287 insertions, 103 deletions
diff --git a/firmware/drivers/audio/as3514.c b/firmware/drivers/audio/as3514.c index db4cb0699f..3985ea1177 100644 --- a/firmware/drivers/audio/as3514.c +++ b/firmware/drivers/audio/as3514.c | |||
@@ -49,11 +49,12 @@ const struct sound_settings_info audiohw_settings[] = { | |||
49 | /* Shadow registers */ | 49 | /* Shadow registers */ |
50 | static struct as3514_info | 50 | static struct as3514_info |
51 | { | 51 | { |
52 | int vol_r; /* Cached volume level (R) */ | 52 | int vol_r; /* Cached volume level (R) */ |
53 | int vol_l; /* Cached volume level (L) */ | 53 | int vol_l; /* Cached volume level (L) */ |
54 | unsigned int regs[0x1e]; /* last audio register: PLLMODE 0x1d */ | 54 | uint8_t regs[AS3514_NUM_AUDIO_REGS]; /* 8-bit registers */ |
55 | } as3514; | 55 | } as3514; |
56 | 56 | ||
57 | /* In order to keep track of source for combining volume ranges */ | ||
57 | enum | 58 | enum |
58 | { | 59 | { |
59 | SOURCE_DAC = 0, | 60 | SOURCE_DAC = 0, |
@@ -87,14 +88,20 @@ static void as3514_write(unsigned int reg, unsigned int value) | |||
87 | } | 88 | } |
88 | 89 | ||
89 | /* Helpers to set/clear bits */ | 90 | /* Helpers to set/clear bits */ |
90 | static void as3514_write_or(unsigned int reg, unsigned int bits) | 91 | static void as3514_set(unsigned int reg, unsigned int bits) |
91 | { | 92 | { |
92 | as3514_write(reg, as3514.regs[reg] | bits); | 93 | as3514_write(reg, as3514.regs[reg] | bits); |
93 | } | 94 | } |
94 | 95 | ||
95 | static void as3514_write_and(unsigned int reg, unsigned int bits) | 96 | static void as3514_clear(unsigned int reg, unsigned int bits) |
96 | { | 97 | { |
97 | as3514_write(reg, as3514.regs[reg] & bits); | 98 | as3514_write(reg, as3514.regs[reg] & ~bits); |
99 | } | ||
100 | |||
101 | static void as3514_write_masked(unsigned int reg, unsigned int bits, | ||
102 | unsigned int mask) | ||
103 | { | ||
104 | as3514_write(reg, (as3514.regs[reg] & ~mask) | (bits & mask)); | ||
98 | } | 105 | } |
99 | 106 | ||
100 | /* convert tenth of dB volume to master volume register value */ | 107 | /* convert tenth of dB volume to master volume register value */ |
@@ -139,63 +146,66 @@ void audiohw_preinit(void) | |||
139 | { | 146 | { |
140 | unsigned int i; | 147 | unsigned int i; |
141 | 148 | ||
149 | /* read all reg values */ | ||
150 | for (i = 0; i < ARRAYLEN(as3514.regs); i++) | ||
151 | { | ||
152 | as3514.regs[i] = ascodec_read(i); | ||
153 | } | ||
154 | |||
142 | /* Set ADC off, mixer on, DAC on, line out off, line in off, mic off */ | 155 | /* Set ADC off, mixer on, DAC on, line out off, line in off, mic off */ |
143 | 156 | ||
144 | /* Turn on SUM, DAC */ | 157 | /* Turn on SUM, DAC */ |
145 | as3514_write(AS3514_AUDIOSET1, (1 << 6) | (1 << 5)); | 158 | as3514_write(AS3514_AUDIOSET1, AUDIOSET1_DAC_on | AUDIOSET1_SUM_on); |
146 | 159 | ||
147 | /* Set BIAS on, DITH on, AGC on, IBR_DAC max, LSP_LP on, IBR_LSP min */ | 160 | /* Set BIAS on, DITH on, AGC on, IBR_DAC max, LSP_LP on, IBR_LSP min */ |
148 | as3514_write(AS3514_AUDIOSET2, (1 << 2) | (3 << 0)); | 161 | as3514_write(AS3514_AUDIOSET2, |
162 | AUDIOSET2_IBR_DAC_0 | AUDIOSET2_LSP_LP | | ||
163 | AUDIOSET2_IBR_LSP_50); | ||
149 | 164 | ||
150 | /* Set HPCM off, ZCU off*/ | 165 | /* Set HPCM on, ZCU on */ |
151 | as3514_write(AS3514_AUDIOSET3, (1 << 2) | (1 << 0)); | 166 | as3514_write(AS3514_AUDIOSET3, 0); |
152 | 167 | ||
153 | /* Mute and disable speaker */ | 168 | /* Mute and disable speaker */ |
154 | as3514_write(AS3514_LSP_OUT_R, 0); | 169 | as3514_write(AS3514_LSP_OUT_R, LSP_OUT_R_SP_OVC_TO_256MS | 0x00); |
155 | as3514_write(AS3514_LSP_OUT_L, (1 << 7)); | 170 | as3514_write(AS3514_LSP_OUT_L, LSP_OUT_L_SP_MUTE | 0x00); |
156 | 171 | ||
157 | /* set vol and set headphone over-current to 0 */ | 172 | /* Set headphone over-current to 0, Min volume */ |
158 | as3514_write(AS3514_HPH_OUT_R, (0x3 << 6) | 0x16); | 173 | as3514_write(AS3514_HPH_OUT_R, |
159 | /* set default vol for headphone */ | 174 | HPH_OUT_R_HP_OVC_TO_0MS | 0x00); |
160 | as3514_write(AS3514_HPH_OUT_L, 0x16); | 175 | |
176 | /* Headphone ON, MUTE, Min volume */ | ||
177 | as3514_write(AS3514_HPH_OUT_L, | ||
178 | HPH_OUT_L_HP_ON | HPH_OUT_L_HP_MUTE | 0x00); | ||
161 | 179 | ||
162 | /* LRCK 24-48kHz */ | 180 | /* LRCK 24-48kHz */ |
163 | as3514_write(AS3514_PLLMODE, 0x00); | 181 | as3514_write(AS3514_PLLMODE, PLLMODE_LRCK_24_48); |
164 | 182 | ||
165 | /* DAC_Mute_off */ | 183 | /* DAC_Mute_off */ |
166 | as3514_write_or(AS3514_DAC_L, (1 << 6)); | 184 | as3514_set(AS3514_DAC_L, DAC_L_DAC_MUTE_off); |
167 | 185 | ||
168 | /* M1_Sup_off */ | 186 | /* M1_Sup_off */ |
169 | as3514_write_or(AS3514_MIC1_L, (1 << 7)); | 187 | as3514_set(AS3514_MIC1_L, MIC1_L_M1_SUP_off); |
170 | /* M2_Sup_off */ | 188 | /* M2_Sup_off */ |
171 | as3514_write_or(AS3514_MIC2_L, (1 << 7)); | 189 | as3514_set(AS3514_MIC2_L, MIC2_L_M2_SUP_off); |
172 | |||
173 | /* read all reg values */ | ||
174 | for (i = 0; i < ARRAYLEN(as3514.regs); i++) | ||
175 | { | ||
176 | as3514.regs[i] = ascodec_read(i); | ||
177 | } | ||
178 | } | 190 | } |
179 | 191 | ||
180 | /* Silently enable / disable audio output */ | 192 | void audiohw_postinit(void) |
181 | void audiohw_enable_output(bool enable) | ||
182 | { | 193 | { |
183 | if (enable) { | 194 | /* wait until outputs have stabilized */ |
184 | /* reset the I2S controller into known state */ | 195 | sleep(HZ/4); |
185 | i2s_reset(); | ||
186 | 196 | ||
187 | as3514_write_or(AS3514_HPH_OUT_L, (1 << 6)); /* power on */ | 197 | as3514_write(AS3514_AUDIOSET3, AUDIOSET3_HPCM_off); |
188 | audiohw_mute(0); | 198 | |
189 | } else { | 199 | #ifdef CPU_PP |
190 | audiohw_mute(1); | 200 | ascodec_supressor_on(false); |
191 | as3514_write_and(AS3514_HPH_OUT_L, ~(1 << 6)); /* power off */ | 201 | #endif |
192 | } | 202 | |
203 | audiohw_mute(false); | ||
193 | } | 204 | } |
194 | 205 | ||
195 | void audiohw_set_master_vol(int vol_l, int vol_r) | 206 | void audiohw_set_master_vol(int vol_l, int vol_r) |
196 | { | 207 | { |
197 | unsigned int hph_r = as3514.regs[AS3514_HPH_OUT_R] & ~0x1f; | 208 | unsigned int hph_r, hph_l; |
198 | unsigned int hph_l = as3514.regs[AS3514_HPH_OUT_L] & ~0x1f; | ||
199 | unsigned int mix_l, mix_r; | 209 | unsigned int mix_l, mix_r; |
200 | unsigned int mix_reg_r, mix_reg_l; | 210 | unsigned int mix_reg_r, mix_reg_l; |
201 | 211 | ||
@@ -211,45 +221,44 @@ void audiohw_set_master_vol(int vol_l, int vol_r) | |||
211 | mix_reg_l = AS3514_DAC_L; | 221 | mix_reg_l = AS3514_DAC_L; |
212 | } | 222 | } |
213 | 223 | ||
214 | mix_r = as3514.regs[mix_reg_r] & ~0x1f; | 224 | /* We combine the mixer channel volume range with the headphone volume |
215 | mix_l = as3514.regs[mix_reg_l] & ~0x1f; | 225 | range - keep first stage as loud as possible */ |
216 | |||
217 | /* we combine the mixer channel volume range with the headphone volume | ||
218 | range */ | ||
219 | if (vol_r <= 0x16) { | 226 | if (vol_r <= 0x16) { |
220 | mix_r |= vol_r; | 227 | mix_r = vol_r; |
221 | /* hph_r - set 0 */ | 228 | hph_r = 0; |
222 | } else { | 229 | } else { |
223 | mix_r |= 0x16; | 230 | mix_r = 0x16; |
224 | hph_r += vol_r - 0x16; | 231 | hph_r = vol_r - 0x16; |
225 | } | 232 | } |
226 | 233 | ||
227 | if (vol_l <= 0x16) { | 234 | if (vol_l <= 0x16) { |
228 | mix_l |= vol_l; | 235 | mix_l = vol_l; |
229 | /* hph_l - set 0 */ | 236 | hph_l = 0; |
230 | } else { | 237 | } else { |
231 | mix_l |= 0x16; | 238 | mix_l = 0x16; |
232 | hph_l += vol_l - 0x16; | 239 | hph_l = vol_l - 0x16; |
233 | } | 240 | } |
234 | 241 | ||
235 | as3514_write(mix_reg_r, mix_r); | 242 | as3514_write_masked(mix_reg_r, mix_r, AS3514_VOL_MASK); |
236 | as3514_write(mix_reg_l, mix_l); | 243 | as3514_write_masked(mix_reg_l, mix_l, AS3514_VOL_MASK); |
237 | as3514_write(AS3514_HPH_OUT_R, hph_r); | 244 | as3514_write_masked(AS3514_HPH_OUT_R, hph_r, AS3514_VOL_MASK); |
238 | as3514_write(AS3514_HPH_OUT_L, hph_l); | 245 | as3514_write_masked(AS3514_HPH_OUT_L, hph_l, AS3514_VOL_MASK); |
239 | } | 246 | } |
240 | 247 | ||
241 | void audiohw_set_lineout_vol(int vol_l, int vol_r) | 248 | void audiohw_set_lineout_vol(int vol_l, int vol_r) |
242 | { | 249 | { |
243 | as3514_write(AS3514_LINE_OUT_R, vol_r); | 250 | as3514_write_masked(AS3514_LINE_OUT_R, vol_r, |
244 | as3514_write(AS3514_LINE_OUT_L, (1 << 6) | vol_l); | 251 | AS3514_VOL_MASK); |
252 | as3514_write_masked(AS3514_LINE_OUT_L, vol_l, | ||
253 | AS3514_VOL_MASK); | ||
245 | } | 254 | } |
246 | 255 | ||
247 | void audiohw_mute(bool mute) | 256 | void audiohw_mute(bool mute) |
248 | { | 257 | { |
249 | if (mute) { | 258 | if (mute) { |
250 | as3514_write_or(AS3514_HPH_OUT_L, (1 << 7)); | 259 | as3514_set(AS3514_HPH_OUT_L, HPH_OUT_L_HP_MUTE); |
251 | } else { | 260 | } else { |
252 | as3514_write_and(AS3514_HPH_OUT_L, ~(1 << 7)); | 261 | as3514_clear(AS3514_HPH_OUT_L, HPH_OUT_L_HP_MUTE); |
253 | } | 262 | } |
254 | } | 263 | } |
255 | 264 | ||
@@ -259,8 +268,19 @@ void audiohw_close(void) | |||
259 | /* mute headphones */ | 268 | /* mute headphones */ |
260 | audiohw_mute(true); | 269 | audiohw_mute(true); |
261 | 270 | ||
271 | #ifdef CPU_PP | ||
272 | ascodec_supressor_on(true); | ||
273 | #endif | ||
274 | |||
275 | /* turn on common */ | ||
276 | as3514_clear(AS3514_AUDIOSET3, AUDIOSET3_HPCM_off); | ||
277 | |||
262 | /* turn off everything */ | 278 | /* turn off everything */ |
279 | as3514_clear(AS3514_HPH_OUT_L, HPH_OUT_L_HP_ON); | ||
263 | as3514_write(AS3514_AUDIOSET1, 0x0); | 280 | as3514_write(AS3514_AUDIOSET1, 0x0); |
281 | |||
282 | /* Allow caps to discharge */ | ||
283 | sleep(HZ/4); | ||
264 | } | 284 | } |
265 | 285 | ||
266 | void audiohw_set_sample_rate(int sampling_control) | 286 | void audiohw_set_sample_rate(int sampling_control) |
@@ -278,29 +298,32 @@ void audiohw_enable_recording(bool source_mic) | |||
278 | audiohw_set_master_vol(as3514.vol_l, as3514.vol_r); | 298 | audiohw_set_master_vol(as3514.vol_l, as3514.vol_r); |
279 | 299 | ||
280 | /* ADCmux = Stereo Microphone */ | 300 | /* ADCmux = Stereo Microphone */ |
281 | as3514_write_and(AS3514_ADC_R, ~(0x3 << 6)); | 301 | as3514_write_masked(AS3514_ADC_R, ADC_R_ADCMUX_ST_MIC, |
302 | ADC_R_ADCMUX); | ||
303 | |||
282 | /* MIC1_on, LIN1_off */ | 304 | /* MIC1_on, LIN1_off */ |
283 | as3514_write(AS3514_AUDIOSET1, | 305 | as3514_write_masked(AS3514_AUDIOSET1, AUDIOSET1_MIC1_on, |
284 | (as3514.regs[AS3514_AUDIOSET1] & ~(1 << 2)) | (1 << 0)); | 306 | AUDIOSET1_MIC1_on | AUDIOSET1_LIN1_on); |
285 | /* M1_AGC_off */ | 307 | /* M1_AGC_off */ |
286 | as3514_write_and(AS3514_MIC1_R, ~(1 << 7)); | 308 | as3514_clear(AS3514_MIC1_R, MIC1_R_M1_AGC_off); |
287 | } else { | 309 | } else { |
288 | source = SOURCE_LINE_IN1; | 310 | source = SOURCE_LINE_IN1; |
289 | 311 | ||
290 | audiohw_set_master_vol(as3514.vol_l, as3514.vol_r); | 312 | audiohw_set_master_vol(as3514.vol_l, as3514.vol_r); |
291 | 313 | ||
292 | /* ADCmux = Line_IN1 */ | 314 | /* ADCmux = Line_IN1 */ |
293 | as3514_write(AS3514_ADC_R, | 315 | as3514_write_masked(AS3514_ADC_R, ADC_R_ADCMUX_LINE_IN1, |
294 | (as3514.regs[AS3514_ADC_R] & ~(0x3 << 6)) | (0x1 << 6)); | 316 | ADC_R_ADCMUX); |
317 | |||
295 | /* MIC1_off, LIN1_on */ | 318 | /* MIC1_off, LIN1_on */ |
296 | as3514_write(AS3514_AUDIOSET1, | 319 | as3514_write_masked(AS3514_AUDIOSET1, AUDIOSET1_LIN1_on, |
297 | (as3514.regs[AS3514_AUDIOSET1] & ~(1 << 0)) | (1 << 2)); | 320 | AUDIOSET1_MIC1_on | AUDIOSET1_LIN1_on); |
298 | } | 321 | } |
299 | 322 | ||
300 | /* ADC_Mute_off */ | 323 | /* ADC_Mute_off */ |
301 | as3514_write_or(AS3514_ADC_L, (1 << 6)); | 324 | as3514_set(AS3514_ADC_L, ADC_L_ADC_MUTE_off); |
302 | /* ADC_on */ | 325 | /* ADC_on */ |
303 | as3514_write_or(AS3514_AUDIOSET1, (1 << 7)); | 326 | as3514_set(AS3514_AUDIOSET1, AUDIOSET1_ADC_on); |
304 | } | 327 | } |
305 | 328 | ||
306 | void audiohw_disable_recording(void) | 329 | void audiohw_disable_recording(void) |
@@ -308,10 +331,12 @@ void audiohw_disable_recording(void) | |||
308 | source = SOURCE_DAC; | 331 | source = SOURCE_DAC; |
309 | 332 | ||
310 | /* ADC_Mute_on */ | 333 | /* ADC_Mute_on */ |
311 | as3514_write_and(AS3514_ADC_L, ~(1 << 6)); | 334 | as3514_clear(AS3514_ADC_L, ADC_L_ADC_MUTE_off); |
312 | 335 | ||
313 | /* ADC_off, LIN1_off, MIC_off */ | 336 | /* ADC_off, LIN1_off, MIC_off */ |
314 | as3514_write_and(AS3514_AUDIOSET1, ~((1 << 7) | (1 << 2) | (1 << 0))); | 337 | as3514_clear(AS3514_AUDIOSET1, |
338 | AUDIOSET1_ADC_on | AUDIOSET1_LIN1_on | | ||
339 | AUDIOSET1_MIC1_on); | ||
315 | 340 | ||
316 | audiohw_set_master_vol(as3514.vol_l, as3514.vol_r); | 341 | audiohw_set_master_vol(as3514.vol_l, as3514.vol_r); |
317 | } | 342 | } |
@@ -332,25 +357,27 @@ void audiohw_set_recvol(int left, int right, int type) | |||
332 | case AUDIO_GAIN_MIC: | 357 | case AUDIO_GAIN_MIC: |
333 | { | 358 | { |
334 | /* Combine MIC gains seamlessly with ADC levels */ | 359 | /* Combine MIC gains seamlessly with ADC levels */ |
335 | unsigned int mic1_r = as3514.regs[AS3514_MIC1_R] & ~(0x3 << 5); | 360 | unsigned int mic1_r; |
336 | 361 | ||
337 | if (left >= 36) { | 362 | if (left >= 36) { |
338 | /* M1_Gain = +40db, ADR_Vol = +7.5dB .. +12.0 dB => | 363 | /* M1_Gain = +40db, ADR_Vol = +7.5dB .. +12.0 dB => |
339 | +19.5 dB .. +24.0 dB */ | 364 | +19.5 dB .. +24.0 dB */ |
340 | left -= 8; | 365 | left -= 8; |
341 | mic1_r |= (0x2 << 5); | 366 | mic1_r = MIC1_R_M1_GAIN_40DB; |
342 | } else if (left >= 32) { | 367 | } else if (left >= 32) { |
343 | /* M1_Gain = +34db, ADR_Vol = +7.5dB .. +12.0 dB => | 368 | /* M1_Gain = +34db, ADR_Vol = +7.5dB .. +12.0 dB => |
344 | +13.5 dB .. +18.0 dB */ | 369 | +13.5 dB .. +18.0 dB */ |
345 | left -= 4; | 370 | left -= 4; |
346 | mic1_r |= (0x1 << 5); | 371 | mic1_r = MIC1_R_M1_GAIN_34DB; |
347 | } | 372 | } else { |
348 | /* M1_Gain = +28db, ADR_Vol = -34.5dB .. +12.0 dB => | 373 | /* M1_Gain = +28db, ADR_Vol = -34.5dB .. +12.0 dB => |
349 | -34.5 dB .. +12.0 dB */ | 374 | -34.5 dB .. +12.0 dB */ |
375 | mic1_r = MIC1_R_M1_GAIN_28DB; | ||
376 | } | ||
350 | 377 | ||
351 | right = left; | 378 | right = left; |
352 | 379 | ||
353 | as3514_write(AS3514_MIC1_R, mic1_r); | 380 | as3514_write_masked(AS3514_MIC1_R, mic1_r, MIC1_R_M1_GAIN); |
354 | break; | 381 | break; |
355 | } | 382 | } |
356 | case AUDIO_GAIN_LINEIN: | 383 | case AUDIO_GAIN_LINEIN: |
@@ -359,8 +386,8 @@ void audiohw_set_recvol(int left, int right, int type) | |||
359 | return; | 386 | return; |
360 | } | 387 | } |
361 | 388 | ||
362 | as3514_write(AS3514_ADC_R, (as3514.regs[AS3514_ADC_R] & ~0x1f) | right); | 389 | as3514_write_masked(AS3514_ADC_R, right, AS3514_VOL_MASK); |
363 | as3514_write(AS3514_ADC_L, (as3514.regs[AS3514_ADC_L] & ~0x1f) | left); | 390 | as3514_write_masked(AS3514_ADC_L, left, AS3514_VOL_MASK); |
364 | } | 391 | } |
365 | 392 | ||
366 | /** | 393 | /** |
@@ -369,27 +396,18 @@ void audiohw_set_recvol(int left, int right, int type) | |||
369 | */ | 396 | */ |
370 | void audiohw_set_monitor(bool enable) | 397 | void audiohw_set_monitor(bool enable) |
371 | { | 398 | { |
372 | /* LI1R_Mute_on - default */ | ||
373 | unsigned int line_in1_r = as3514.regs[AS3514_LINE_IN1_R] & ~(1 << 5); | ||
374 | /* LI1L_Mute_on - default */ | ||
375 | unsigned int line_in1_l = as3514.regs[AS3514_LINE_IN1_L] & ~(1 << 5); | ||
376 | /* LIN1_off - default */ | ||
377 | unsigned int audioset1 = as3514.regs[AS3514_AUDIOSET1] & ~(1 << 2); | ||
378 | |||
379 | if (enable) { | 399 | if (enable) { |
380 | source = SOURCE_LINE_IN1_ANALOG; | 400 | source = SOURCE_LINE_IN1_ANALOG; |
381 | 401 | ||
382 | /* LI1R_Mute_off */ | 402 | as3514_set(AS3514_AUDIOSET1, AUDIOSET1_LIN1_on); |
383 | line_in1_r |= (1 << 5); | 403 | as3514_set(AS3514_LINE_IN1_R, LINE_IN1_R_LI1R_MUTE_off); |
384 | /* LI1L_Mute_off */ | 404 | as3514_set(AS3514_LINE_IN1_L, LINE_IN1_L_LI1L_MUTE_off); |
385 | line_in1_l |= (1 << 5); | 405 | } |
386 | /* LIN1_on */ | 406 | else { |
387 | audioset1 |= (1 << 2); | 407 | as3514_clear(AS3514_AUDIOSET1, AUDIOSET1_LIN1_on); |
408 | as3514_clear(AS3514_LINE_IN1_R, LINE_IN1_R_LI1R_MUTE_off); | ||
409 | as3514_clear(AS3514_LINE_IN1_L, LINE_IN1_L_LI1L_MUTE_off); | ||
388 | } | 410 | } |
389 | |||
390 | as3514_write(AS3514_AUDIOSET1, audioset1); | ||
391 | as3514_write(AS3514_LINE_IN1_R, line_in1_r); | ||
392 | as3514_write(AS3514_LINE_IN1_L, line_in1_l); | ||
393 | 411 | ||
394 | /* Sync mixer volume */ | 412 | /* Sync mixer volume */ |
395 | audiohw_set_master_vol(as3514.vol_l, as3514.vol_r); | 413 | audiohw_set_master_vol(as3514.vol_l, as3514.vol_r); |
diff --git a/firmware/export/as3514.h b/firmware/export/as3514.h index 83e911f42b..af4615a15e 100644 --- a/firmware/export/as3514.h +++ b/firmware/export/as3514.h | |||
@@ -78,6 +78,158 @@ extern void audiohw_set_sample_rate(int sampling_control); | |||
78 | #define VOLUME_MIN -735 | 78 | #define VOLUME_MIN -735 |
79 | #define VOLUME_MAX 60 | 79 | #define VOLUME_MAX 60 |
80 | 80 | ||
81 | /*** Audio Registers ***/ | ||
82 | |||
83 | /* 00h (LINE_OUT_R) to 1Dh (PLLMODE) */ | ||
84 | #define AS3514_NUM_AUDIO_REGS (0x1e) | ||
85 | |||
86 | /* Common registers masks */ | ||
87 | #define AS3514_VOL_MASK (0x1f << 0) | ||
88 | |||
89 | /* LINE_OUT_R (0x00) */ | ||
90 | /* Only has volume control bits */ | ||
91 | |||
92 | /* LINE_OUT_L (0x01) */ | ||
93 | #define LINE_OUT_L_LO_SES_DM (0x3 << 6) | ||
94 | #define LINE_OUT_L_LO_SES_DM_MUTE (0x0 << 6) | ||
95 | #define LINE_OUT_L_LO_SES_DM_DF_MO (0x1 << 6) | ||
96 | #define LINE_OUT_L_LO_SES_DM_SE_ST (0x2 << 6) | ||
97 | /* Use AS3514_VOL_MASK */ | ||
98 | |||
99 | /* HPH_OUT_R (0x02) */ | ||
100 | #define HPH_OUT_R_HP_OVC_TO (0x3 << 6) | ||
101 | #define HPH_OUT_R_HP_OVC_TO_0MS (0x3 << 6) | ||
102 | #define HPH_OUT_R_HP_OVC_TO_128MS (0x1 << 6) | ||
103 | #define HPH_OUT_R_HP_OVC_TO_256MS (0x0 << 6) | ||
104 | #define HPH_OUT_R_HP_OVC_TO_512MS (0x2 << 6) | ||
105 | /* Use AS3514_VOL_MASK */ | ||
106 | |||
107 | /* HPH_OUT_L (0x03) */ | ||
108 | #define HPH_OUT_L_HP_MUTE (0x1 << 7) | ||
109 | #define HPH_OUT_L_HP_ON (0x1 << 6) | ||
110 | #define HPH_OUT_L_HP_DET_ON (0x1 << 5) | ||
111 | /* Use AS3514_VOL_MASK */ | ||
112 | |||
113 | /* LSP_OUT_R (0x04) */ | ||
114 | #define LSP_OUT_R_SP_OVC_TO (0x3 << 6) | ||
115 | #define LSP_OUT_R_SP_OVC_TO_256MS (0x0 << 6) | ||
116 | #define LSP_OUT_R_SP_OVC_TO_128MS (0x1 << 6) | ||
117 | #define LSP_OUT_R_SP_OVC_TO_512MS (0x2 << 6) | ||
118 | #define LSP_OUT_R_SP_OVC_TO_0MS (0x3 << 6) | ||
119 | /* Use AS3514_VOL_MASK */ | ||
120 | |||
121 | /* LSP_OUT_L (0x05) */ | ||
122 | #define LSP_OUT_L_SP_MUTE (0x1 << 7) | ||
123 | #define LSP_OUT_L_SP_ON (0x1 << 6) | ||
124 | /* Use AS3514_VOL_MASK */ | ||
125 | |||
126 | /* MIC1_R (0x06) */ | ||
127 | #define MIC1_R_M1_AGC_off (0x1 << 7) | ||
128 | #define MIC1_R_M1_GAIN (0x3 << 5) | ||
129 | #define MIC1_R_M1_GAIN_28DB (0x0 << 5) | ||
130 | #define MIC1_R_M1_GAIN_34DB (0x1 << 5) | ||
131 | #define MIC1_R_M1_GAIN_40DB (0x2 << 5) | ||
132 | /* Use AS3514_VOL_MASK */ | ||
133 | |||
134 | /* MIC1_L (0x07) */ | ||
135 | #define MIC1_L_M1_SUP_off (0x1 << 7) | ||
136 | #define MIC1_L_M1_MUTE_off (0x1 << 6) | ||
137 | /* Use AS3514_VOL_MASK */ | ||
138 | |||
139 | /* MIC2_R (0x08) */ | ||
140 | #define MIC2_R_M2_AGC_off (0x1 << 7) | ||
141 | #define MIC2_R_M2_GAIN (0x3 << 5) | ||
142 | #define MIC2_R_M2_GAIN_28DB (0x0 << 5) | ||
143 | #define MIC2_R_M2_GAIN_34DB (0x1 << 5) | ||
144 | #define MIC2_R_M2_GAIN_40DB (0x2 << 5) | ||
145 | /* Use AS3514_VOL_MASK */ | ||
146 | |||
147 | /* MIC2_L (0x09) */ | ||
148 | #define MIC2_L_M2_SUP_off (0x1 << 7) | ||
149 | #define MIC2_L_M2_MUTE_off (0x1 << 6) | ||
150 | /* Use AS3514_VOL_MASK */ | ||
151 | |||
152 | /* LINE_IN1_R (0Ah) */ | ||
153 | #define LINE_IN1_R_LI1R_MUTE_off (0x1 << 5) | ||
154 | /* Use AS3514_VOL_MASK */ | ||
155 | |||
156 | /* LINE_IN1_L (0Bh) */ | ||
157 | #define LINE_IN1_L_LI1_MODE (0x3 << 6) | ||
158 | #define LINE_IN1_L_LI1_MODE_SE_ST (0x0 << 6) | ||
159 | #define LINE_IN1_L_LI1_MODE_DF_MO (0x1 << 6) | ||
160 | #define LINE_IN1_L_LI1_MODE_SE_MO (0x2 << 6) | ||
161 | #define LINE_IN1_L_LI1L_MUTE_off (0x1 << 5) | ||
162 | /* Use AS3514_VOL_MASK */ | ||
163 | |||
164 | /* LINE_IN2_R (0Ch) */ | ||
165 | #define LINE_IN2_R_LI2R_MUTE_off (0x1 << 5) | ||
166 | /* Use AS3514_VOL_MASK */ | ||
167 | |||
168 | /* LINE_IN2_L (0Dh) */ | ||
169 | #define LINE_IN2_L_LI2_MODE (0x3 << 6) | ||
170 | #define LINE_IN2_L_LI2_MODE_SE_ST (0x0 << 6) | ||
171 | #define LINE_IN2_L_LI2_MODE_DF_MO (0x1 << 6) | ||
172 | #define LINE_IN2_L_LI2_MODE_SE_MO (0x2 << 6) | ||
173 | #define LINE_IN2_L_LI2L_MUTE_off (0x1 << 5) | ||
174 | /* Use AS3514_VOL_MASK */ | ||
175 | |||
176 | /* DAC_R (0Eh) */ | ||
177 | /* Only has volume control bits */ | ||
178 | /* Use AS3514_VOL_MASK */ | ||
179 | |||
180 | /* DAC_L (0Fh) */ | ||
181 | #define DAC_L_DAC_MUTE_off (0x1 << 6) | ||
182 | /* Use AS3514_VOL_MASK */ | ||
183 | |||
184 | /* ADC_R (10h) */ | ||
185 | #define ADC_R_ADCMUX (0x3 << 6) | ||
186 | #define ADC_R_ADCMUX_ST_MIC (0x0 << 6) | ||
187 | #define ADC_R_ADCMUX_LINE_IN1 (0x1 << 6) | ||
188 | #define ADC_R_ADCMUX_LINE_IN2 (0x2 << 6) | ||
189 | #define ADC_R_ADCMUX_AUDIO_SUM (0x3 << 6) | ||
190 | /* Use AS3514_VOL_MASK */ | ||
191 | |||
192 | /* ADC_L (11h) */ | ||
193 | #define ADC_L_FS_2 (0x1 << 7) | ||
194 | #define ADC_L_ADC_MUTE_off (0x1 << 6) | ||
195 | /* Use AS3514_VOL_MASK */ | ||
196 | |||
197 | /* AUDIOSET1 (14h)*/ | ||
198 | #define AUDIOSET1_ADC_on (0x1 << 7) | ||
199 | #define AUDIOSET1_SUM_on (0x1 << 6) | ||
200 | #define AUDIOSET1_DAC_on (0x1 << 5) | ||
201 | #define AUDIOSET1_LOUT_on (0x1 << 4) | ||
202 | #define AUDIOSET1_LIN2_on (0x1 << 3) | ||
203 | #define AUDIOSET1_LIN1_on (0x1 << 2) | ||
204 | #define AUDIOSET1_MIC2_on (0x1 << 1) | ||
205 | #define AUDIOSET1_MIC1_on (0x1 << 0) | ||
206 | |||
207 | /* AUDIOSET2 (15h) */ | ||
208 | #define AUDIOSET2_BIAS_off (0x1 << 7) | ||
209 | #define AUDIOSET2_DITH_off (0x1 << 6) | ||
210 | #define AUDIOSET2_AGC_off (0x1 << 5) | ||
211 | #define AUDIOSET2_IBR_DAC (0x3 << 3) | ||
212 | #define AUDIOSET2_IBR_DAC_0 (0x0 << 3) | ||
213 | #define AUDIOSET2_IBR_DAC_25 (0x1 << 3) | ||
214 | #define AUDIOSET2_IBR_DAC_40 (0x2 << 3) | ||
215 | #define AUDIOSET2_IBR_DAC_50 (0x3 << 3) | ||
216 | #define AUDIOSET2_LSP_LP (0x1 << 2) | ||
217 | #define AUDIOSET2_IBR_LSP (0x3 << 0) | ||
218 | #define AUDIOSET2_IBR_LSP_0 (0x0 << 0) | ||
219 | #define AUDIOSET2_IBR_LSP_17 (0x1 << 0) | ||
220 | #define AUDIOSET2_IBR_LSP_34 (0x2 << 0) | ||
221 | #define AUDIOSET2_IBR_LSP_50 (0x3 << 0) | ||
222 | |||
223 | /* AUDIOSET3 (16h) */ | ||
224 | #define AUDIOSET3_ZCU_off (0x1 << 2) | ||
225 | #define AUDIOSET3_IBR_HPH (0x1 << 1) | ||
226 | #define AUDIOSET3_HPCM_off (0x1 << 0) | ||
227 | |||
228 | /* PLLMODE (1Dh) */ | ||
229 | #define PLLMODE_LRCK (0x3 << 1) | ||
230 | #define PLLMODE_LRCK_24_48 (0x0 << 1) | ||
231 | #define PLLMODE_LRCK_8_23 (0x2 << 1) | ||
232 | |||
81 | /* ADC channels */ | 233 | /* ADC channels */ |
82 | #define NUM_ADC_CHANNELS 13 | 234 | #define NUM_ADC_CHANNELS 13 |
83 | 235 | ||
diff --git a/firmware/target/arm/ascodec-pp.c b/firmware/target/arm/ascodec-pp.c index 30b6b1f8de..ac45cddc14 100644 --- a/firmware/target/arm/ascodec-pp.c +++ b/firmware/target/arm/ascodec-pp.c | |||
@@ -39,10 +39,6 @@ void audiohw_init(void) | |||
39 | DEV_INIT1 &=~0x3000000; | 39 | DEV_INIT1 &=~0x3000000; |
40 | /*mini2?*/ | 40 | /*mini2?*/ |
41 | 41 | ||
42 | /* device reset */ | ||
43 | DEV_RS |= DEV_I2S; | ||
44 | DEV_RS &=~DEV_I2S; | ||
45 | |||
46 | /* I2S device reset */ | 42 | /* I2S device reset */ |
47 | DEV_RS |= DEV_I2S; | 43 | DEV_RS |= DEV_I2S; |
48 | DEV_RS &=~DEV_I2S; | 44 | DEV_RS &=~DEV_I2S; |
@@ -56,11 +52,27 @@ void audiohw_init(void) | |||
56 | /* external dev clock to 24MHz */ | 52 | /* external dev clock to 24MHz */ |
57 | outl(inl(0x70000018) & ~0xc, 0x70000018); | 53 | outl(inl(0x70000018) & ~0xc, 0x70000018); |
58 | 54 | ||
55 | #ifdef SANSA_E200 | ||
56 | /* Prevent pops on startup */ | ||
57 | GPIOG_ENABLE |= 0x08; | ||
58 | GPIO_SET_BITWISE(GPIOG_OUTPUT_VAL, 0x08); | ||
59 | GPIOG_OUTPUT_EN |= 0x08; | ||
60 | #endif | ||
61 | |||
59 | i2s_reset(); | 62 | i2s_reset(); |
60 | 63 | ||
61 | audiohw_preinit(); | 64 | audiohw_preinit(); |
62 | } | 65 | } |
63 | 66 | ||
64 | void audiohw_postinit(void) | 67 | void ascodec_supressor_on(bool on) |
65 | { | 68 | { |
66 | } | 69 | #ifdef SANSA_E200 |
70 | if (on) { | ||
71 | /* Set pop prevention */ | ||
72 | GPIO_SET_BITWISE(GPIOG_OUTPUT_VAL, 0x08); | ||
73 | } else { | ||
74 | /* Release pop prevention */ | ||
75 | GPIO_CLEAR_BITWISE(GPIOG_OUTPUT_VAL, 0x08); | ||
76 | } | ||
77 | #endif | ||
78 | } | ||
diff --git a/firmware/target/arm/ascodec-target.h b/firmware/target/arm/ascodec-target.h index 3337cb78b9..e26afa840c 100644 --- a/firmware/target/arm/ascodec-target.h +++ b/firmware/target/arm/ascodec-target.h | |||
@@ -59,6 +59,8 @@ static inline void ascodec_unlock(void) | |||
59 | i2c_unlock(); | 59 | i2c_unlock(); |
60 | } | 60 | } |
61 | 61 | ||
62 | extern void ascodec_supressor_on(bool on); | ||
63 | |||
62 | #endif /* CPU_PP */ | 64 | #endif /* CPU_PP */ |
63 | 65 | ||
64 | #endif /* !_ASCODEC_TARGET_H */ | 66 | #endif /* !_ASCODEC_TARGET_H */ |
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c index 2f25353fff..c572578383 100644 --- a/firmware/target/arm/pcm-pp.c +++ b/firmware/target/arm/pcm-pp.c | |||
@@ -374,7 +374,7 @@ void pcm_play_dma_init(void) | |||
374 | audiohw_init(); | 374 | audiohw_init(); |
375 | 375 | ||
376 | #if !defined(HAVE_WM8731) && !defined(HAVE_WM8751) && !defined(HAVE_WM8975) \ | 376 | #if !defined(HAVE_WM8731) && !defined(HAVE_WM8751) && !defined(HAVE_WM8975) \ |
377 | && !defined(HAVE_WM8758) | 377 | && !defined(HAVE_WM8758) && !defined(HAVE_AS3514) |
378 | /* Power on */ | 378 | /* Power on */ |
379 | audiohw_enable_output(true); | 379 | audiohw_enable_output(true); |
380 | /* Unmute the master channel (DAC should be at zero point now). */ | 380 | /* Unmute the master channel (DAC should be at zero point now). */ |