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| author | Amaury Pouly <amaury.pouly@gmail.com> | 2013-06-17 00:25:05 +0200 |
|---|---|---|
| committer | Amaury Pouly <amaury.pouly@gmail.com> | 2013-06-17 00:29:25 +0200 |
| commit | 2ed36fc4a244549fab3fb7129776a98ec2bf74ca (patch) | |
| tree | 832f817b45e319c0a9226b5470f397abfaa2f5ec | |
| parent | 63ffdc1c8980a388d5017f951c8493a8f1fd477c (diff) | |
| download | rockbox-2ed36fc4a244549fab3fb7129776a98ec2bf74ca.tar.gz rockbox-2ed36fc4a244549fab3fb7129776a98ec2bf74ca.zip | |
imx233: clarity comment about errata
Change-Id: I3309ce112762f09fcf6bce9d416dbf4b0aa2f197
| -rw-r--r-- | firmware/target/arm/imx233/i2c-imx233.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/firmware/target/arm/imx233/i2c-imx233.c b/firmware/target/arm/imx233/i2c-imx233.c index 5641d6fc62..ee5ac1ccf6 100644 --- a/firmware/target/arm/imx233/i2c-imx233.c +++ b/firmware/target/arm/imx233/i2c-imx233.c | |||
| @@ -88,14 +88,16 @@ void imx233_i2c_init(void) | |||
| 88 | imx233_pinctrl_setup_vpin(VPIN_I2C_SDA, "i2c sda", PINCTRL_DRIVE_4mA, true); | 88 | imx233_pinctrl_setup_vpin(VPIN_I2C_SDA, "i2c sda", PINCTRL_DRIVE_4mA, true); |
| 89 | /* clear softreset */ | 89 | /* clear softreset */ |
| 90 | imx233_reset_block(&HW_I2C_CTRL0); | 90 | imx233_reset_block(&HW_I2C_CTRL0); |
| 91 | /* Errata: | 91 | /* Errata (imx233): |
| 92 | * When RETAIN_CLOCK is set, the ninth clock pulse (ACK) is not generated. However, the SDA | 92 | * When RETAIN_CLOCK is set, the ninth clock pulse (ACK) is not generated. However, the SDA |
| 93 | * line is read at the proper timing interval. If RETAIN_CLOCK is cleared, the ninth clock pulse is | 93 | * line is read at the proper timing interval. If RETAIN_CLOCK is cleared, the ninth clock pulse is |
| 94 | * generated. | 94 | * generated. |
| 95 | * HW_I2C_CTRL1[ACK_MODE] has default value of 0. It should be set to 1 to enable the fix for | 95 | * HW_I2C_CTRL1[ACK_MODE] has default value of 0. It should be set to 1 to enable the fix for |
| 96 | * this issue. | 96 | * this issue. |
| 97 | */ | 97 | */ |
| 98 | #if IMX233_SUBTARGET >= 3780 | ||
| 98 | BF_SET(I2C_CTRL1, ACK_MODE); | 99 | BF_SET(I2C_CTRL1, ACK_MODE); |
| 100 | #endif | ||
| 99 | BF_SET(I2C_CTRL0, CLKGATE); | 101 | BF_SET(I2C_CTRL0, CLKGATE); |
| 100 | /* Fast-mode @ 400K */ | 102 | /* Fast-mode @ 400K */ |
| 101 | HW_I2C_TIMING0 = 0x000F0007; /* tHIGH=0.6us, read at 0.3us */ | 103 | HW_I2C_TIMING0 = 0x000F0007; /* tHIGH=0.6us, read at 0.3us */ |