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authorCástor Muñoz <cmvidal@gmail.com>2016-05-26 09:59:44 +0200
committerCástor Muñoz <cmvidal@gmail.com>2016-05-28 15:48:02 +0200
commit28920ec5cc994dff19bec100a57de4557f72a7f5 (patch)
treed82da8b6d8bd8bb95e2e29f1e00acd99910f5cc0
parent9e284c11b11a09adae8073a3347480c1d580e0cc (diff)
downloadrockbox-28920ec5cc994dff19bec100a57de4557f72a7f5.tar.gz
rockbox-28920ec5cc994dff19bec100a57de4557f72a7f5.zip
iPod Classic: fix typos / cosmetic
Change-Id: Ic6552dea4b300032875097ef0b885a4ae059f4bc
-rw-r--r--firmware/target/arm/s5l8700/usb-nano2g-6g.c2
-rw-r--r--firmware/target/arm/s5l8702/debug-s5l8702.c4
-rw-r--r--firmware/target/arm/s5l8702/gpio-s5l8702.c4
-rw-r--r--firmware/target/arm/s5l8702/gpio-s5l8702.h18
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/piezo.h2
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c10
6 files changed, 21 insertions, 19 deletions
diff --git a/firmware/target/arm/s5l8700/usb-nano2g-6g.c b/firmware/target/arm/s5l8700/usb-nano2g-6g.c
index 7d48a5cabd..6ae9f9b96b 100644
--- a/firmware/target/arm/s5l8700/usb-nano2g-6g.c
+++ b/firmware/target/arm/s5l8700/usb-nano2g-6g.c
@@ -87,7 +87,7 @@ void usb_init_device(void)
87 usb_drv_exit(); 87 usb_drv_exit();
88} 88}
89 89
90#else /* !HAVE_STACK */ 90#else /* !HAVE_USBSTACK */
91void usb_enable(bool on) 91void usb_enable(bool on)
92{ 92{
93 (void)on; 93 (void)on;
diff --git a/firmware/target/arm/s5l8702/debug-s5l8702.c b/firmware/target/arm/s5l8702/debug-s5l8702.c
index 3faf9dfc99..a61a728d43 100644
--- a/firmware/target/arm/s5l8702/debug-s5l8702.c
+++ b/firmware/target/arm/s5l8702/debug-s5l8702.c
@@ -133,9 +133,9 @@ bool dbg_hw_info(void)
133 _DEBUG_PRINTF("accessory present: %s", 133 _DEBUG_PRINTF("accessory present: %s",
134 pmu_accessory_present() ? "true" : "false"); 134 pmu_accessory_present() ? "true" : "false");
135#endif 135#endif
136 extern unsigned long i2c_rd_err, i2c_wr_err;
137 line++; 136 line++;
138 _DEBUG_PRINTF("i2c rd/wr errors:: %lu/%lu", i2c_rd_err, i2c_wr_err); 137 extern unsigned long i2c_rd_err, i2c_wr_err;
138 _DEBUG_PRINTF("i2c rd/wr errors: %lu/%lu", i2c_rd_err, i2c_wr_err);
139 } 139 }
140#ifdef UC870X_DEBUG 140#ifdef UC870X_DEBUG
141 else if(state==2) 141 else if(state==2)
diff --git a/firmware/target/arm/s5l8702/gpio-s5l8702.c b/firmware/target/arm/s5l8702/gpio-s5l8702.c
index 0f7a029fb6..60ac141a91 100644
--- a/firmware/target/arm/s5l8702/gpio-s5l8702.c
+++ b/firmware/target/arm/s5l8702/gpio-s5l8702.c
@@ -170,7 +170,7 @@ void eint_unregister(struct eint_handler *h)
170} 170}
171 171
172/* ISR */ 172/* ISR */
173void ICODE_ATTR eint_handler(int group) 173static void ICODE_ATTR eint_handler(int group)
174{ 174{
175 int i; 175 int i;
176 uint32_t ints; 176 uint32_t ints;
@@ -195,7 +195,7 @@ void ICODE_ATTR eint_handler(int group)
195 EIC_INTLEVEL(group) ^= bit; /* swap level */ 195 EIC_INTLEVEL(group) ^= bit; /* swap level */
196 196
197 if (h->isr) 197 if (h->isr)
198 h->isr(h); /* exec GPIO handler */ 198 h->isr(h); /* exec app handler */
199 } 199 }
200 } 200 }
201} 201}
diff --git a/firmware/target/arm/s5l8702/gpio-s5l8702.h b/firmware/target/arm/s5l8702/gpio-s5l8702.h
index 9259fb05ef..f775e86726 100644
--- a/firmware/target/arm/s5l8702/gpio-s5l8702.h
+++ b/firmware/target/arm/s5l8702/gpio-s5l8702.h
@@ -39,13 +39,13 @@
39 * bit 2: if unmasked, EINT6 is generated when USB cable 39 * bit 2: if unmasked, EINT6 is generated when USB cable
40 * is plugged and/or(TBC) unplugged. 40 * is plugged and/or(TBC) unplugged.
41 * 41 *
42 * IC_GROUP0..6 are connected to EINT6..0 of the VIC. 42 * EIC_GROUP0..6 are connected to EINT6..0 of the VIC.
43 */ 43 */
44#define EIC_N_GROUPS 7 44#define EIC_N_GROUPS 7
45 45
46/* get EIC group and bit for a given GPIO port */ 46/* get EIC group and bit for a given GPIO port */
47#define EIC_GROUP(n) (6 - (n >> 5)) 47#define EIC_GROUP(n) (6 - ((n) >> 5))
48#define EIC_INDEX(n) ((0x18 - (n & 0x18)) | (n & 0x7)) 48#define EIC_INDEX(n) ((0x18 - ((n) & 0x18)) | ((n) & 0x7))
49 49
50/* SoC EINTs uses these 'gpio' numbers */ 50/* SoC EINTs uses these 'gpio' numbers */
51#define GPIO_EINT_USB 0xd8 51#define GPIO_EINT_USB 0xd8
@@ -74,19 +74,19 @@ struct eint_handler {
74 void (*isr)(struct eint_handler*); 74 void (*isr)(struct eint_handler*);
75}; 75};
76 76
77void eint_init(void);
77void eint_register(struct eint_handler *h); 78void eint_register(struct eint_handler *h);
78void eint_unregister(struct eint_handler *h); 79void eint_unregister(struct eint_handler *h);
79void eint_init(void);
80 80
81void gpio_preinit(void);
81void gpio_init(void); 82void gpio_init(void);
82/* get/set configuration for GPIO groups (0..15) */ 83/* get/set configuration for GPIO groups (0..15) */
83uint32_t gpio_group_get(int group); 84uint32_t gpio_group_get(int group);
84void gpio_group_set(int group, uint32_t mask, uint32_t cfg); 85void gpio_group_set(int group, uint32_t mask, uint32_t cfg);
85 86
86void gpio_preinit(void);
87
88 87
89/* This is very preliminary work in progress, ATM this region is called 88/*
89 * This is very preliminary work in progress, ATM this region is called
90 * system 'alive' because it seems there are similiarities when mixing 90 * system 'alive' because it seems there are similiarities when mixing
91 * concepts from: 91 * concepts from:
92 * - s3c2440 datasheet (figure 7-12, Sleep mode) and 92 * - s3c2440 datasheet (figure 7-12, Sleep mode) and
@@ -145,8 +145,8 @@ void gpio_preinit(void);
145 * ALVCOM_RUN_BIT starts/stops count on ALVTCNT, counter frequency 145 * ALVCOM_RUN_BIT starts/stops count on ALVTCNT, counter frequency
146 * is SClk / ALVTDIV. When count reachs ALVTEND then ALVTSTAT[0] 146 * is SClk / ALVTDIV. When count reachs ALVTEND then ALVTSTAT[0]
147 * and ALVUNK4[0] are set, optionally an interrupt is generated (see 147 * and ALVUNK4[0] are set, optionally an interrupt is generated (see
148 * GPIO_IC below). Writing 1 to ALVTCOM_RST_BIT clears ALVSTAT[0] 148 * GPIO_EINT_ALIVE). Writing 1 to ALVTCOM_RST_BIT clears ALVSTAT[0]
149 * and ALVUNK4[0] and initializes ALVTCNT to zero. 149 * and ALVUNK4[0], and initializes ALVTCNT to zero.
150 */ 150 */
151#define ALVTCOM (*((REG32_PTR_T)(SYSALV_BASE + 0x6c))) 151#define ALVTCOM (*((REG32_PTR_T)(SYSALV_BASE + 0x6c)))
152#define ALVTCOM_RUN_BIT (1 << 0) /* 0 -> Stop, 1 -> Start */ 152#define ALVTCOM_RUN_BIT (1 << 0) /* 0 -> Stop, 1 -> Start */
diff --git a/firmware/target/arm/s5l8702/ipod6g/piezo.h b/firmware/target/arm/s5l8702/ipod6g/piezo.h
index 063b8231a6..7abe05ac65 100644
--- a/firmware/target/arm/s5l8702/ipod6g/piezo.h
+++ b/firmware/target/arm/s5l8702/ipod6g/piezo.h
@@ -28,6 +28,8 @@ bool piezo_busy(void);
28void piezo_button_beep(bool beep, bool force); 28void piezo_button_beep(bool beep, bool force);
29 29
30#ifdef BOOTLOADER 30#ifdef BOOTLOADER
31#include <inttypes.h>
32void piezo_tone(uint32_t period, int32_t duration);
31void piezo_seq(uint16_t *seq); 33void piezo_seq(uint16_t *seq);
32#endif 34#endif
33 35
diff --git a/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c
index 3458e1918c..ef39a5cabb 100644
--- a/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c
+++ b/firmware/target/arm/s5l8702/ipod6g/storage_ata-ipod6g.c
@@ -46,7 +46,7 @@
46#define CEATA_MMC_RCA 1 46#define CEATA_MMC_RCA 1
47 47
48 48
49/** static, private data **/ 49/** static, private data **/
50static uint8_t ceata_taskfile[16] STORAGE_ALIGN_ATTR; 50static uint8_t ceata_taskfile[16] STORAGE_ALIGN_ATTR;
51static uint16_t ata_identify_data[0x100] STORAGE_ALIGN_ATTR; 51static uint16_t ata_identify_data[0x100] STORAGE_ALIGN_ATTR;
52static bool ceata; 52static bool ceata;
@@ -131,13 +131,13 @@ static int ata_wait_for_end_of_transfer(long timeout)
131 if (dad & BIT(0)) RET_ERR(1); 131 if (dad & BIT(0)) RET_ERR(1);
132 if ((dad & (BIT(3) | BITRANGE(5, 7))) == BIT(6)) return 0; 132 if ((dad & (BIT(3) | BITRANGE(5, 7))) == BIT(6)) return 0;
133 RET_ERR(2); 133 RET_ERR(2);
134} 134}
135 135
136static int mmc_dsta_check_command_success(bool disable_crc) 136static int mmc_dsta_check_command_success(bool disable_crc)
137{ 137{
138 int rc = 0; 138 int rc = 0;
139 uint32_t dsta = SDCI_DSTA; 139 uint32_t dsta = SDCI_DSTA;
140 if (dsta & SDCI_DSTA_RESTOUTE) rc |= 1; 140 if (dsta & SDCI_DSTA_RESTOUTE) rc |= 1;
141 if (dsta & SDCI_DSTA_RESENDE) rc |= 2; 141 if (dsta & SDCI_DSTA_RESENDE) rc |= 2;
142 if (dsta & SDCI_DSTA_RESINDE) rc |= 4; 142 if (dsta & SDCI_DSTA_RESINDE) rc |= 4;
143 if (!disable_crc) 143 if (!disable_crc)
@@ -363,7 +363,7 @@ static int ceata_init(int buswidth)
363{ 363{
364 uint32_t result; 364 uint32_t result;
365 PASS_RC(mmc_send_command(SDCI_CMD_CMD_NUM(MMC_CMD_SWITCH) | SDCI_CMD_RES_BUSY 365 PASS_RC(mmc_send_command(SDCI_CMD_CMD_NUM(MMC_CMD_SWITCH) | SDCI_CMD_RES_BUSY
366 | SDCI_CMD_CMD_TYPE_AC | SDCI_CMD_RES_TYPE_R1 366 | SDCI_CMD_CMD_TYPE_AC | SDCI_CMD_RES_TYPE_R1
367 | SDCI_CMD_RES_SIZE_48 | SDCI_CMD_NCR_NID_NCR, 367 | SDCI_CMD_RES_SIZE_48 | SDCI_CMD_NCR_NID_NCR,
368 MMC_CMD_SWITCH_ACCESS_WRITE_BYTE 368 MMC_CMD_SWITCH_ACCESS_WRITE_BYTE
369 | MMC_CMD_SWITCH_INDEX(MMC_CMD_SWITCH_FIELD_HS_TIMING) 369 | MMC_CMD_SWITCH_INDEX(MMC_CMD_SWITCH_FIELD_HS_TIMING)
@@ -1093,7 +1093,7 @@ static int ata_num_drives(int first_drive)
1093{ 1093{
1094 /* We don't care which logical drive number(s) we have been assigned */ 1094 /* We don't care which logical drive number(s) we have been assigned */
1095 (void)first_drive; 1095 (void)first_drive;
1096 1096
1097 return 1; 1097 return 1;
1098} 1098}
1099#endif 1099#endif