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authorGreg White <gwhite@rockbox.org>2007-01-16 20:38:25 +0000
committerGreg White <gwhite@rockbox.org>2007-01-16 20:38:25 +0000
commit285aa1b0a633616bfb3b289535a60786390e4d59 (patch)
treeb5fc5844043647dd0e97a6bcd8980d5ee3243592
parent9ed3dca77920b34c26dce517cc6758d973c6eea1 (diff)
downloadrockbox-285aa1b0a633616bfb3b289535a60786390e4d59.tar.gz
rockbox-285aa1b0a633616bfb3b289535a60786390e4d59.zip
Unroll loops
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@12029 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c87
1 files changed, 77 insertions, 10 deletions
diff --git a/firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c b/firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c
index 8094ff828f..615b04a26c 100644
--- a/firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c
+++ b/firmware/target/arm/gigabeat/meg-fx/mmu-meg-fx.c
@@ -95,6 +95,27 @@ void invalidate_dcache_range(const void *base, unsigned int size) {
95 "mcr p15, 0, %0, c7, c14, 1 \n" /* Clean and invalidate this line */ 95 "mcr p15, 0, %0, c7, c14, 1 \n" /* Clean and invalidate this line */
96 "add %0, %0, #32 \n" 96 "add %0, %0, #32 \n"
97 "cmp %0, %1 \n" 97 "cmp %0, %1 \n"
98 "mcrne p15, 0, %0, c7, c14, 1 \n" /* Clean and invalidate this line */
99 "addne %0, %0, #32 \n"
100 "cmpne %0, %1 \n"
101 "mcrne p15, 0, %0, c7, c14, 1 \n" /* Clean and invalidate this line */
102 "addne %0, %0, #32 \n"
103 "cmpne %0, %1 \n"
104 "mcrne p15, 0, %0, c7, c14, 1 \n" /* Clean and invalidate this line */
105 "addne %0, %0, #32 \n"
106 "cmpne %0, %1 \n"
107 "mcrne p15, 0, %0, c7, c14, 1 \n" /* Clean and invalidate this line */
108 "addne %0, %0, #32 \n"
109 "cmpne %0, %1 \n"
110 "mcrne p15, 0, %0, c7, c14, 1 \n" /* Clean and invalidate this line */
111 "addne %0, %0, #32 \n"
112 "cmpne %0, %1 \n"
113 "mcrne p15, 0, %0, c7, c14, 1 \n" /* Clean and invalidate this line */
114 "addne %0, %0, #32 \n"
115 "cmpne %0, %1 \n"
116 "mcrne p15, 0, %0, c7, c14, 1 \n" /* Clean and invalidate this line */
117 "addne %0, %0, #32 \n"
118 "cmpne %0, %1 \n"
98 "bne inv_start \n" 119 "bne inv_start \n"
99 "mov %0, #0\n" 120 "mov %0, #0\n"
100 "mcr p15,0,%0,c7,c10,4\n" /* Drain write buffer */ 121 "mcr p15,0,%0,c7,c10,4\n" /* Drain write buffer */
@@ -112,6 +133,27 @@ void clean_dcache_range(const void *base, unsigned int size) {
112 "mcr p15, 0, %0, c7, c10, 1 \n" /* Clean this line */ 133 "mcr p15, 0, %0, c7, c10, 1 \n" /* Clean this line */
113 "add %0, %0, #32 \n" 134 "add %0, %0, #32 \n"
114 "cmp %0, %1 \n" 135 "cmp %0, %1 \n"
136 "mcrlo p15, 0, %0, c7, c10, 1 \n" /* Clean this line */
137 "addlo %0, %0, #32 \n"
138 "cmplo %0, %1 \n"
139 "mcrlo p15, 0, %0, c7, c10, 1 \n" /* Clean this line */
140 "addlo %0, %0, #32 \n"
141 "cmplo %0, %1 \n"
142 "mcrlo p15, 0, %0, c7, c10, 1 \n" /* Clean this line */
143 "addlo %0, %0, #32 \n"
144 "cmplo %0, %1 \n"
145 "mcrlo p15, 0, %0, c7, c10, 1 \n" /* Clean this line */
146 "addlo %0, %0, #32 \n"
147 "cmplo %0, %1 \n"
148 "mcrlo p15, 0, %0, c7, c10, 1 \n" /* Clean this line */
149 "addlo %0, %0, #32 \n"
150 "cmplo %0, %1 \n"
151 "mcrlo p15, 0, %0, c7, c10, 1 \n" /* Clean this line */
152 "addlo %0, %0, #32 \n"
153 "cmplo %0, %1 \n"
154 "mcrlo p15, 0, %0, c7, c10, 1 \n" /* Clean this line */
155 "addlo %0, %0, #32 \n"
156 "cmplo %0, %1 \n"
115 "blo clean_start \n" 157 "blo clean_start \n"
116 "mov %0, #0\n" 158 "mov %0, #0\n"
117 "mcr p15,0,%0,c7,c10,4 \n" /* Drain write buffer */ 159 "mcr p15,0,%0,c7,c10,4 \n" /* Drain write buffer */
@@ -143,16 +185,41 @@ void dump_dcache_range(const void *base, unsigned int size) {
143/* Cleans entire DCache */ 185/* Cleans entire DCache */
144void clean_dcache(void) 186void clean_dcache(void)
145{ 187{
146 unsigned int seg, index, addr; 188 unsigned int index, addr;
147 189
148 /* @@@ This is straight from the manual. It needs to be optimized. */ 190 for(index = 0; index <= 63; index++) {
149 for(seg = 0; seg <= 7; seg++) { 191 addr = (0 << 5) | (index << 26);
150 for(index = 0; index <= 63; index++) { 192 asm volatile(
151 addr = (seg << 5) | (index << 26); 193 "mcr p15, 0, %0, c7, c10, 2 \n" /* Clean this entry by index */
152 asm volatile( 194 : : "r" (addr));
153 "mcr p15, 0, %0, c7, c10, 2 \n" /* Clean this entry by index */ 195 addr = (1 << 5) | (index << 26);
154 : : "r" (addr)); 196 asm volatile(
155 } 197 "mcr p15, 0, %0, c7, c10, 2 \n" /* Clean this entry by index */
198 : : "r" (addr));
199 addr = (2 << 5) | (index << 26);
200 asm volatile(
201 "mcr p15, 0, %0, c7, c10, 2 \n" /* Clean this entry by index */
202 : : "r" (addr));
203 addr = (3 << 5) | (index << 26);
204 asm volatile(
205 "mcr p15, 0, %0, c7, c10, 2 \n" /* Clean this entry by index */
206 : : "r" (addr));
207 addr = (4 << 5) | (index << 26);
208 asm volatile(
209 "mcr p15, 0, %0, c7, c10, 2 \n" /* Clean this entry by index */
210 : : "r" (addr));
211 addr = (5 << 5) | (index << 26);
212 asm volatile(
213 "mcr p15, 0, %0, c7, c10, 2 \n" /* Clean this entry by index */
214 : : "r" (addr));
215 addr = (6 << 5) | (index << 26);
216 asm volatile(
217 "mcr p15, 0, %0, c7, c10, 2 \n" /* Clean this entry by index */
218 : : "r" (addr));
219 addr = (7 << 5) | (index << 26);
220 asm volatile(
221 "mcr p15, 0, %0, c7, c10, 2 \n" /* Clean this entry by index */
222 : : "r" (addr));
156 } 223 }
157} 224}
158 225