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authorMichael Sevakis <jethead71@rockbox.org>2010-06-18 06:54:58 +0000
committerMichael Sevakis <jethead71@rockbox.org>2010-06-18 06:54:58 +0000
commit25701c5b2de4b1bec59064eeb622e056a0fc86a7 (patch)
tree78989ba3ca78ae8536c703fa0b1ad1e9a105ef2a
parent8260a79689892854abfdd493592ba04387c2f4b8 (diff)
downloadrockbox-25701c5b2de4b1bec59064eeb622e056a0fc86a7.tar.gz
rockbox-25701c5b2de4b1bec59064eeb622e056a0fc86a7.zip
Squeeze down the PP5002 cache routines a bit.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26909 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/target/arm/system-pp5002.c64
1 files changed, 37 insertions, 27 deletions
diff --git a/firmware/target/arm/system-pp5002.c b/firmware/target/arm/system-pp5002.c
index 976e5e585b..746441113e 100644
--- a/firmware/target/arm/system-pp5002.c
+++ b/firmware/target/arm/system-pp5002.c
@@ -62,47 +62,57 @@ void __attribute__((interrupt("IRQ"))) irq_handler(void)
62 some other CPU frequency scaling. */ 62 some other CPU frequency scaling. */
63 63
64#ifndef BOOTLOADER 64#ifndef BOOTLOADER
65void ICODE_ATTR cpucache_flush(void) 65void ICODE_ATTR __attribute__((naked)) cpucache_flush(void)
66{ 66{
67 intptr_t b, e; 67 asm volatile(
68 68 "mov r0, #0xf0000000 \n"
69 for (b = (intptr_t)&CACHE_FLUSH_BASE, e = b + CACHE_SIZE; 69 "add r0, r0, #0xc000 \n" /* r0 = CACHE_FLUSH_BASE */
70 b < e; b += 16) { 70 "add r1, r0, #0x2000 \n" /* r1 = CACHE_FLUSH_BASE + CACHE_SIZE */
71 outl(0x0, b); 71 "mov r2, #0 \n"
72 } 72 "1: \n"
73 "str r2, [r0], #16 \n" /* Flush */
74 "cmp r0, r1 \n"
75 "blo 1b \n"
76 "bx lr \n"
77 );
73} 78}
74 79
75void ICODE_ATTR cpucache_invalidate(void) 80void ICODE_ATTR __attribute__((naked)) cpucache_invalidate(void)
76{ 81{
77 intptr_t b, e; 82 asm volatile(
78 83 "mov r0, #0xf0000000 \n"
79 /* Flush */ 84 "add r2, r0, #0x4000 \n" /* r1 = CACHE_INVALIDATE_BASE */
80 for (b = (intptr_t)&CACHE_FLUSH_BASE, e = b + CACHE_SIZE; 85 "add r0, r0, #0xc000 \n" /* r0 = CACHE_FLUSH_BASE */
81 b < e; b += 16) { 86 "add r1, r0, #0x2000 \n" /* r2 = CACHE_FLUSH_BASE + CACHE_SIZE */
82 outl(0x0, b); 87 "mov r3, #0 \n"
83 } 88 "1: \n"
84 89 "str r3, [r0], #16 \n" /* Flush */
85 /* Invalidate */ 90 "str r3, [r2], #16 \n" /* Invalidate */
86 for (b = (intptr_t)&CACHE_INVALIDATE_BASE, e = b + CACHE_SIZE; 91 "cmp r0, r1 \n"
87 b < e; b += 16) { 92 "blo 1b \n"
88 outl(0x0, b); 93 "bx lr \n"
89 } 94 );
90} 95}
91 96
92static void ipod_init_cache(void) 97static void ipod_init_cache(void)
93{ 98{
94 intptr_t b, e;
95
96/* Initialising the cache in the iPod bootloader prevents Rockbox from starting */ 99/* Initialising the cache in the iPod bootloader prevents Rockbox from starting */
97 PROC_STAT &= ~0x700; 100 PROC_STAT &= ~0x700;
98 outl(0x4000, 0xcf004020); 101 outl(0x4000, 0xcf004020);
99 102
100 CACHE_CTL = CACHE_CTL_INIT; 103 CACHE_CTL = CACHE_CTL_INIT;
101 104
102 for (b = (intptr_t)&CACHE_INVALIDATE_BASE, e = b + CACHE_SIZE; 105 asm volatile(
103 b < e; b += 16) { 106 "mov r0, #0xf0000000 \n"
104 outl(0x0, b); 107 "add r0, r0, #0x4000 \n" /* r0 = CACHE_INVALIDATE_BASE */
105 } 108 "add r1, r0, #0x2000 \n" /* r1 = CACHE_INVALIDATE_BASE + CACHE_SIZE */
109 "mov r2, #0 \n"
110 "1: \n"
111 "str r2, [r0], #16 \n" /* Invalidate */
112 "cmp r0, r1 \n"
113 "blo 1b \n"
114 : : : "r0", "r1", "r2"
115 );
106 116
107 /* Cache if (addr & mask) >> 16 == (mask & match) >> 16: 117 /* Cache if (addr & mask) >> 16 == (mask & match) >> 16:
108 * yes: 0x00000000 - 0x03ffffff 118 * yes: 0x00000000 - 0x03ffffff