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author | Michael Sevakis <jethead71@rockbox.org> | 2008-11-19 03:12:34 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2008-11-19 03:12:34 +0000 |
commit | 20477d024e2f65e601cca3365e0d967e5ce9b5c1 (patch) | |
tree | 67cbc7cccf2c8aee6f2da7a84290918e4e89e227 | |
parent | 77934cbc961a69e7d18588276f0e64a692854125 (diff) | |
download | rockbox-20477d024e2f65e601cca3365e0d967e5ce9b5c1.tar.gz rockbox-20477d024e2f65e601cca3365e0d967e5ce9b5c1.zip |
Gigabeat S: Fix PCM being cut off at the beginning. The DAC L-R swapping isn't needed now either. Fixes voice clips on the Gigabeat S.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19141 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/drivers/audio/wm8978.c | 3 | ||||
-rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c | 4 |
2 files changed, 4 insertions, 3 deletions
diff --git a/firmware/drivers/audio/wm8978.c b/firmware/drivers/audio/wm8978.c index 31248db545..c50500356a 100644 --- a/firmware/drivers/audio/wm8978.c +++ b/firmware/drivers/audio/wm8978.c | |||
@@ -223,8 +223,7 @@ void audiohw_postinit(void) | |||
223 | /* 8. Enable other outputs as required */ | 223 | /* 8. Enable other outputs as required */ |
224 | 224 | ||
225 | /* 9. Set remaining registers */ | 225 | /* 9. Set remaining registers */ |
226 | wmc_write(WMC_AUDIO_INTERFACE, WMC_WL_16 | WMC_FMT_I2S | 226 | wmc_write(WMC_AUDIO_INTERFACE, WMC_WL_16 | WMC_FMT_I2S); |
227 | | WMC_DACLRSWAP | WMC_ADCLRSWAP); | ||
228 | wmc_write(WMC_DAC_CONTROL, WMC_DACOSR_128 | WMC_AMUTE); | 227 | wmc_write(WMC_DAC_CONTROL, WMC_DACOSR_128 | WMC_AMUTE); |
229 | 228 | ||
230 | /* Specific to HW clocking */ | 229 | /* Specific to HW clocking */ |
diff --git a/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c b/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c index 3820f2ba56..ed3650cd60 100644 --- a/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c +++ b/firmware/target/arm/imx31/gigabeat-s/pcm-imx31.c | |||
@@ -215,11 +215,13 @@ static void play_start_pcm(void) | |||
215 | dma_play_data.state = 1; | 215 | dma_play_data.state = 1; |
216 | 216 | ||
217 | /* Fill the FIFO or start when data is used up */ | 217 | /* Fill the FIFO or start when data is used up */ |
218 | SSI_SCR1 |= SSI_SCR_SSIEN; /* Enable SSI */ | ||
219 | |||
218 | while (1) | 220 | while (1) |
219 | { | 221 | { |
220 | if (SSI_SFCSR_TFCNT0r(SSI_SFCSR1) > 6 || dma_play_data.size == 0) | 222 | if (SSI_SFCSR_TFCNT0r(SSI_SFCSR1) > 6 || dma_play_data.size == 0) |
221 | { | 223 | { |
222 | SSI_SCR1 |= (SSI_SCR_TE | SSI_SCR_SSIEN); /* Start transmitting */ | 224 | SSI_SCR1 |= SSI_SCR_TE; /* Start transmitting */ |
223 | return; | 225 | return; |
224 | } | 226 | } |
225 | 227 | ||