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authorJens Arnold <amiconn@rockbox.org>2007-10-07 16:44:55 +0000
committerJens Arnold <amiconn@rockbox.org>2007-10-07 16:44:55 +0000
commit1f0d06f085453a3d0a9b1e94bb2821c9ab314e57 (patch)
tree22f60c9edbd33babc989c01f08198a2581187e88
parent1dd9febe0edfeecacda3688e1e8dea54123113e4 (diff)
downloadrockbox-1f0d06f085453a3d0a9b1e94bb2821c9ab314e57.tar.gz
rockbox-1f0d06f085453a3d0a9b1e94bb2821c9ab314e57.zip
* Use proper definitions for the PP (mono) LCD bridge. * Clean up pp5002.h a bit.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15018 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/export/pp5002.h22
-rw-r--r--firmware/export/pp5020.h7
-rw-r--r--firmware/target/arm/ipod/lcd-gray.c29
-rw-r--r--firmware/target/arm/sandisk/sansa-c200/lcd-c200.c21
4 files changed, 34 insertions, 45 deletions
diff --git a/firmware/export/pp5002.h b/firmware/export/pp5002.h
index 730e42b66d..c4baa7cfd3 100644
--- a/firmware/export/pp5002.h
+++ b/firmware/export/pp5002.h
@@ -22,16 +22,14 @@
22/* Much info gleaned and/or copied from the iPodLinux project. */ 22/* Much info gleaned and/or copied from the iPodLinux project. */
23#define DRAM_START 0x28000000 23#define DRAM_START 0x28000000
24 24
25#define PROCESSOR_ID (*(volatile unsigned long *)(0xc4000000)) 25/* LCD bridge */
26 26#define LCD1_BASE (*(volatile unsigned long *)(0xc0001000))
27#define IPOD_LCD_BASE 0xc0001000 27#define LCD1_CMD (*(volatile unsigned long *)(0xc0001008))
28 28#define LCD1_DATA (*(volatile unsigned long *)(0xc0001010))
29/* Processor ID */
30#define PROCESSOR_ID (*(volatile unsigned long *)(0xc4000000))
31 29
32#define PROC_ID_CPU 0x55 30#define LCD1_BUSY_MASK 0x8000
33#define PROC_ID_COP 0xaa
34 31
32/* I2S controller */
35#define IISCONFIG (*(volatile unsigned long *)(0xc0002500)) 33#define IISCONFIG (*(volatile unsigned long *)(0xc0002500))
36#define IISFIFO_CFG (*(volatile unsigned long *)(0xc000251c)) 34#define IISFIFO_CFG (*(volatile unsigned long *)(0xc000251c))
37#define IISFIFO_WR (*(volatile unsigned long *)(0xc0002540)) 35#define IISFIFO_WR (*(volatile unsigned long *)(0xc0002540))
@@ -46,8 +44,6 @@
46#define IIS_IRQTX_REG IISFIFO_CFG 44#define IIS_IRQTX_REG IISFIFO_CFG
47#define IIS_IRQTX (1 << 9) 45#define IIS_IRQTX (1 << 9)
48 46
49#define I2C_BASE 0xc0008000
50
51#define IDE_BASE 0xc0003000 47#define IDE_BASE 0xc0003000
52 48
53#define IDE_CFG_STATUS (*(volatile unsigned long *)(0xc0003024)) 49#define IDE_CFG_STATUS (*(volatile unsigned long *)(0xc0003024))
@@ -56,6 +52,12 @@
56 52
57#define I2C_BASE 0xc0008000 53#define I2C_BASE 0xc0008000
58 54
55/* Processor ID */
56#define PROCESSOR_ID (*(volatile unsigned long *)(0xc4000000))
57
58#define PROC_ID_CPU 0x55
59#define PROC_ID_COP 0xaa
60
59#define GPIOA_ENABLE (*(volatile unsigned char *)(0xcf000000)) 61#define GPIOA_ENABLE (*(volatile unsigned char *)(0xcf000000))
60#define GPIOB_ENABLE (*(volatile unsigned char *)(0xcf000004)) 62#define GPIOB_ENABLE (*(volatile unsigned char *)(0xcf000004))
61#define GPIOC_ENABLE (*(volatile unsigned char *)(0xcf000008)) 63#define GPIOC_ENABLE (*(volatile unsigned char *)(0xcf000008))
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h
index 2f49c50bad..df8c8fb058 100644
--- a/firmware/export/pp5020.h
+++ b/firmware/export/pp5020.h
@@ -399,6 +399,13 @@
399 399
400/* Note: didn't bother to see of levels 0 and 16 actually work */ 400/* Note: didn't bother to see of levels 0 and 16 actually work */
401 401
402/* First ("mono") LCD bridge */
403#define LCD1_BASE (*(volatile unsigned long *)(0x70003000))
404#define LCD1_CMD (*(volatile unsigned long *)(0x70003008))
405#define LCD1_DATA (*(volatile unsigned long *)(0x70003010))
406
407#define LCD1_BUSY_MASK 0x8000
408
402/* Serial Controller */ 409/* Serial Controller */
403#define SERIAL0 (*(volatile unsigned long*)(0x70006000)) 410#define SERIAL0 (*(volatile unsigned long*)(0x70006000))
404#define SERIAL1 (*(volatile unsigned long*)(0x70006040)) 411#define SERIAL1 (*(volatile unsigned long*)(0x70006040))
diff --git a/firmware/target/arm/ipod/lcd-gray.c b/firmware/target/arm/ipod/lcd-gray.c
index 707075b701..bea1ed46ed 100644
--- a/firmware/target/arm/ipod/lcd-gray.c
+++ b/firmware/target/arm/ipod/lcd-gray.c
@@ -30,19 +30,6 @@
30#include "system.h" 30#include "system.h"
31#include "hwcompat.h" 31#include "hwcompat.h"
32 32
33
34/*** hardware configuration ***/
35
36#if CONFIG_CPU == PP5002
37#define IPOD_LCD_BASE 0xc0001000
38#else /* PP502x */
39#define IPOD_LCD_BASE 0x70003000
40#endif
41
42#define LCD_BUSY_MASK 0x00008000
43#define LCD_CMD 0x08
44#define LCD_DATA 0x10
45
46/* LCD command codes for HD66753 */ 33/* LCD command codes for HD66753 */
47 34
48#define R_START_OSC 0x00 35#define R_START_OSC 0x00
@@ -97,7 +84,7 @@ static const unsigned char dibits[16] ICONST_ATTR = {
97/* wait for LCD with timeout */ 84/* wait for LCD with timeout */
98static inline void lcd_wait_write(void) 85static inline void lcd_wait_write(void)
99{ 86{
100 while (inl(IPOD_LCD_BASE) & LCD_BUSY_MASK); 87 while (LCD1_BASE & LCD1_BUSY_MASK);
101} 88}
102 89
103/* send LCD data */ 90/* send LCD data */
@@ -109,11 +96,11 @@ static void lcd_send_data(unsigned data)
109{ 96{
110 lcd_wait_write(); 97 lcd_wait_write();
111#ifdef IPOD_MINI2G 98#ifdef IPOD_MINI2G
112 outl(data | 0x760000, IPOD_LCD_BASE+8); 99 LCD1_CMD = data | 0x760000;
113#else 100#else
114 outl(data >> 8, IPOD_LCD_BASE + LCD_DATA); 101 LCD1_DATA = data >> 8;
115 lcd_wait_write(); 102 lcd_wait_write();
116 outl(data & 0xff, IPOD_LCD_BASE + LCD_DATA); 103 LCD1_DATA = data & 0xff;
117#endif 104#endif
118} 105}
119 106
@@ -122,11 +109,11 @@ static void lcd_prepare_cmd(unsigned cmd)
122{ 109{
123 lcd_wait_write(); 110 lcd_wait_write();
124#ifdef IPOD_MINI2G 111#ifdef IPOD_MINI2G
125 outl(cmd | 0x740000, IPOD_LCD_BASE+8); 112 LCD1_CMD = cmd | 0x740000;
126#else 113#else
127 outl(0x0, IPOD_LCD_BASE + LCD_CMD); 114 LCD1_CMD = 0;
128 lcd_wait_write(); 115 lcd_wait_write();
129 outl(cmd, IPOD_LCD_BASE + LCD_CMD); 116 LCD1_CMD = cmd;
130#endif 117#endif
131} 118}
132 119
@@ -168,7 +155,7 @@ void lcd_init_device(void)
168 power_reg_h = 0x1100; 155 power_reg_h = 0x1100;
169#elif defined IPOD_MINI2G 156#elif defined IPOD_MINI2G
170 lcd_wait_write(); 157 lcd_wait_write();
171 outl((inl(IPOD_LCD_BASE) & ~0x1f00000) | 0x1700000, IPOD_LCD_BASE); 158 LCD1_BASE = (LCD1_BASE & ~0x1f00000) | 0x1700000;
172#endif 159#endif
173 160
174 lcd_cmd_and_data(R_POWER_CONTROL, POWER_REG_H | 0xc); 161 lcd_cmd_and_data(R_POWER_CONTROL, POWER_REG_H | 0xc);
diff --git a/firmware/target/arm/sandisk/sansa-c200/lcd-c200.c b/firmware/target/arm/sandisk/sansa-c200/lcd-c200.c
index 37f15836fd..ef336b46c0 100644
--- a/firmware/target/arm/sandisk/sansa-c200/lcd-c200.c
+++ b/firmware/target/arm/sandisk/sansa-c200/lcd-c200.c
@@ -22,12 +22,6 @@
22#include "kernel.h" 22#include "kernel.h"
23#include "system.h" 23#include "system.h"
24 24
25#define LCD_BASE (*(volatile unsigned long *)(0x70003000))
26#define LCD_CMD (*(volatile unsigned long *)(0x70003008))
27#define LCD_DATA (*(volatile unsigned long *)(0x70003010))
28
29#define LCD_BUSY 0x8000
30
31/* LCD command set for Samsung S6B33B2 */ 25/* LCD command set for Samsung S6B33B2 */
32 26
33#define R_OSCILLATION_MODE 0x02 27#define R_OSCILLATION_MODE 0x02
@@ -68,24 +62,23 @@
68/* wait for LCD */ 62/* wait for LCD */
69static inline void lcd_wait_write(void) 63static inline void lcd_wait_write(void)
70{ 64{
71 while (LCD_BASE & LCD_BUSY); 65 while (LCD1_BASE & LCD1_BUSY_MASK);
72} 66}
73 67
74/* send LCD data */ 68/* send LCD data */
75static void lcd_send_data(unsigned data) 69static void lcd_send_data(unsigned data)
76{ 70{
77 lcd_wait_write(); 71 lcd_wait_write();
78 LCD_DATA = data >> 8; 72 LCD1_DATA = data >> 8;
79
80 lcd_wait_write(); 73 lcd_wait_write();
81 LCD_DATA = data & 0xff; 74 LCD1_DATA = data & 0xff;
82} 75}
83 76
84/* send LCD command */ 77/* send LCD command */
85static void lcd_send_command(unsigned cmd) 78static void lcd_send_command(unsigned cmd)
86{ 79{
87 lcd_wait_write(); 80 lcd_wait_write();
88 LCD_CMD = cmd; 81 LCD1_CMD = cmd;
89} 82}
90 83
91/* LCD init */ 84/* LCD init */
@@ -98,13 +91,13 @@ void lcd_init_device(void)
98 DEV_INIT &= ~0x400; 91 DEV_INIT &= ~0x400;
99 udelay(10000); 92 udelay(10000);
100 93
101 LCD_BASE &= ~0x4; 94 LCD1_BASE &= ~0x4;
102 udelay(15); 95 udelay(15);
103 96
104 LCD_BASE |= 0x4; 97 LCD1_BASE |= 0x4;
105 udelay(10); 98 udelay(10);
106 99
107 LCD_BASE = 0x4687; 100 LCD1_BASE = 0x4687;
108 udelay(10000); 101 udelay(10000);
109 102
110 lcd_send_command(R_STANDBY_OFF); 103 lcd_send_command(R_STANDBY_OFF);