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author | Rafaël Carré <rafael.carre@gmail.com> | 2010-02-21 22:49:57 +0000 |
---|---|---|
committer | Rafaël Carré <rafael.carre@gmail.com> | 2010-02-21 22:49:57 +0000 |
commit | 1ae6307a5a104b817d027abe90f2925bbdc9d4fa (patch) | |
tree | 5de2365c7a0422a9da3515bf8b055774dfa254a4 | |
parent | c6af5c962d04e482dddb3693c7f9ed73f638a5ea (diff) | |
download | rockbox-1ae6307a5a104b817d027abe90f2925bbdc9d4fa.tar.gz rockbox-1ae6307a5a104b817d027abe90f2925bbdc9d4fa.zip |
sd-as3525v2: panic in case of error in the isr
Disable errors on response timeout since it can happen on SD_SEND_IF_COND
Disable errors on start bit error : it's ignored by the linux driver
No panic on my side with those 2 bits unchecked, but no transfer
completion either.
Note: the Linux driver doesn't implement DMA
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24837 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/target/arm/as3525/sd-as3525v2.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/firmware/target/arm/as3525/sd-as3525v2.c b/firmware/target/arm/as3525/sd-as3525v2.c index 477f61e1a8..db1dbbb068 100644 --- a/firmware/target/arm/as3525/sd-as3525v2.c +++ b/firmware/target/arm/as3525/sd-as3525v2.c | |||
@@ -158,9 +158,9 @@ static void printf(const char *format, ...) | |||
158 | #define MCI_INT_EBE (1<<15) /* end bit error */ | 158 | #define MCI_INT_EBE (1<<15) /* end bit error */ |
159 | #define MCI_INT_SDIO (0xf<<16) | 159 | #define MCI_INT_SDIO (0xf<<16) |
160 | 160 | ||
161 | #define MCI_ERROR (MCI_INT_RE | MCI_INT_RCRC | MCI_INT_DCRC | MCI_INT_RTO \ | 161 | #define MCI_ERROR (MCI_INT_RE | MCI_INT_RCRC | MCI_INT_DCRC /*| MCI_INT_RTO*/ \ |
162 | | MCI_INT_DRTO | MCI_INT_HTO | MCI_INT_FRUN | MCI_INT_HLE \ | 162 | | MCI_INT_DRTO | MCI_INT_HTO | MCI_INT_FRUN | MCI_INT_HLE \ |
163 | | MCI_INT_SBE | MCI_INT_EBE) | 163 | /*| MCI_INT_SBE*/ | MCI_INT_EBE) |
164 | 164 | ||
165 | #define MCI_FIFOTH SD_REG(0x4C) /* FIFO threshold */ | 165 | #define MCI_FIFOTH SD_REG(0x4C) /* FIFO threshold */ |
166 | /* TX watermark : bits 11:0 | 166 | /* TX watermark : bits 11:0 |
@@ -225,7 +225,10 @@ void INT_NAND(void) | |||
225 | MCI_RAW_STATUS = status; /* clear status */ | 225 | MCI_RAW_STATUS = status; /* clear status */ |
226 | 226 | ||
227 | if(status & MCI_ERROR) | 227 | if(status & MCI_ERROR) |
228 | { | ||
229 | panicf("status 0x%8x", status); | ||
228 | retry = true; | 230 | retry = true; |
231 | } | ||
229 | else if(status & MCI_INT_DTO) | 232 | else if(status & MCI_INT_DTO) |
230 | wakeup_signal(&transfer_completion_signal); | 233 | wakeup_signal(&transfer_completion_signal); |
231 | 234 | ||