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author | Bertrik Sikken <bertrik@sikken.nl> | 2010-11-09 21:53:44 +0000 |
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committer | Bertrik Sikken <bertrik@sikken.nl> | 2010-11-09 21:53:44 +0000 |
commit | 19c048344d80fee1c2cd913aecf7162d2d457beb (patch) | |
tree | 225b182ec287d450030a8ca0a36b3f88d626ce08 | |
parent | ebcfb13a86b0d1bebd5ffd5ae91f36170a5791e7 (diff) | |
download | rockbox-19c048344d80fee1c2cd913aecf7162d2d457beb.tar.gz rockbox-19c048344d80fee1c2cd913aecf7162d2d457beb.zip |
Apply FS#11729 - Remove unneeded I2SIN clock configuration for AS3525 and AS3525v2
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28541 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/target/arm/as3525/pcm-as3525.c | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/firmware/target/arm/as3525/pcm-as3525.c b/firmware/target/arm/as3525/pcm-as3525.c index 720f615ba9..e0cb9aa441 100644 --- a/firmware/target/arm/as3525/pcm-as3525.c +++ b/firmware/target/arm/as3525/pcm-as3525.c | |||
@@ -177,6 +177,8 @@ void pcm_dma_apply_settings(void) | |||
177 | cgu_audio |= (AS3525_MCLK_SEL << 0); /* set i2sout MCLK_SEL */ | 177 | cgu_audio |= (AS3525_MCLK_SEL << 0); /* set i2sout MCLK_SEL */ |
178 | cgu_audio &= ~(0x1ff << 2); /* clear i2sout divider */ | 178 | cgu_audio &= ~(0x1ff << 2); /* clear i2sout divider */ |
179 | cgu_audio |= mclk_divider() << 2; /* set new i2sout divider */ | 179 | cgu_audio |= mclk_divider() << 2; /* set new i2sout divider */ |
180 | cgu_audio &= ~(1 << 23); /* clear I2SI_MCLK_EN */ | ||
181 | cgu_audio &= ~(1 << 24); /* clear I2SI_MCLK2PAD_EN */ | ||
180 | CGU_AUDIO = cgu_audio; /* write back register */ | 182 | CGU_AUDIO = cgu_audio; /* write back register */ |
181 | } | 183 | } |
182 | 184 | ||
@@ -338,7 +340,7 @@ void pcm_rec_dma_stop(void) | |||
338 | 340 | ||
339 | I2SIN_CONTROL &= ~(1<<11); /* disable dma */ | 341 | I2SIN_CONTROL &= ~(1<<11); /* disable dma */ |
340 | 342 | ||
341 | CGU_AUDIO &= ~((1<<23)|(1<<11)); | 343 | CGU_AUDIO &= ~(1<<11); |
342 | bitclr32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE | | 344 | bitclr32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE | |
343 | CGU_I2SOUT_APB_CLOCK_ENABLE); | 345 | CGU_I2SOUT_APB_CLOCK_ENABLE); |
344 | } | 346 | } |
@@ -357,7 +359,7 @@ void pcm_rec_dma_start(void *addr, size_t size) | |||
357 | 359 | ||
358 | bitset32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE | | 360 | bitset32(&CGU_PERI, CGU_I2SIN_APB_CLOCK_ENABLE | |
359 | CGU_I2SOUT_APB_CLOCK_ENABLE); | 361 | CGU_I2SOUT_APB_CLOCK_ENABLE); |
360 | CGU_AUDIO |= ((1<<23)|(1<<11)); | 362 | CGU_AUDIO |= (1<<11); |
361 | 363 | ||
362 | I2SIN_CONTROL |= (1<<11)|(1<<5); /* enable dma, 14bits samples */ | 364 | I2SIN_CONTROL |= (1<<11)|(1<<5); /* enable dma, 14bits samples */ |
363 | 365 | ||
@@ -374,13 +376,6 @@ void pcm_rec_dma_close(void) | |||
374 | 376 | ||
375 | void pcm_rec_dma_init(void) | 377 | void pcm_rec_dma_init(void) |
376 | { | 378 | { |
377 | int cgu_audio = CGU_AUDIO; /* read register */ | ||
378 | cgu_audio &= ~(3 << 12); /* clear i2sin MCLK_SEL */ | ||
379 | cgu_audio |= (AS3525_MCLK_SEL << 12); /* set i2sin MCLK_SEL */ | ||
380 | cgu_audio &= ~(0x1ff << 14); /* clear i2sin divider */ | ||
381 | cgu_audio |= mclk_divider() << 14; /* set new i2sin divider */ | ||
382 | CGU_AUDIO = cgu_audio; /* write back register */ | ||
383 | |||
384 | /* i2c clk src = I2SOUTIF, sdata src = AFE, | 379 | /* i2c clk src = I2SOUTIF, sdata src = AFE, |
385 | * data valid at positive edge of SCLK */ | 380 | * data valid at positive edge of SCLK */ |
386 | I2SIN_CONTROL = (1<<2); | 381 | I2SIN_CONTROL = (1<<2); |