summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJens Arnold <amiconn@rockbox.org>2007-08-01 10:43:45 +0000
committerJens Arnold <amiconn@rockbox.org>2007-08-01 10:43:45 +0000
commit174c7abdff92dbb35ec3524279444913d6e5fbf1 (patch)
treec0f80edae9b26cdba7733f1c771fba5233129ba6
parentabf3435ca724bf6201c663f33c2e4394ae48156d (diff)
downloadrockbox-174c7abdff92dbb35ec3524279444913d6e5fbf1.tar.gz
rockbox-174c7abdff92dbb35ec3524279444913d6e5fbf1.zip
Add some new findings to the PP header files. * Clean up ata-target.h for PP. * check_registers() seems to work fine on PP5002.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14114 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/drivers/ata.c6
-rw-r--r--firmware/export/pp5002.h10
-rw-r--r--firmware/export/pp5020.h2
-rw-r--r--firmware/target/arm/ata-target.h40
4 files changed, 25 insertions, 33 deletions
diff --git a/firmware/drivers/ata.c b/firmware/drivers/ata.c
index e9e567761b..2c8033a533 100644
--- a/firmware/drivers/ata.c
+++ b/firmware/drivers/ata.c
@@ -715,11 +715,6 @@ int ata_write_sectors(IF_MV2(int drive,)
715 715
716static int check_registers(void) 716static int check_registers(void)
717{ 717{
718#if (CONFIG_CPU == PP5002)
719 /* This fails on the PP5002, but the ATA driver still works. This
720 needs more investigation. */
721 return 0;
722#else
723 int i; 718 int i;
724 if ( ATA_STATUS & STATUS_BSY ) 719 if ( ATA_STATUS & STATUS_BSY )
725 return -1; 720 return -1;
@@ -737,7 +732,6 @@ static int check_registers(void)
737 return 0; 732 return 0;
738 } 733 }
739 return -2; 734 return -2;
740#endif
741} 735}
742 736
743static int freeze_lock(void) 737static int freeze_lock(void)
diff --git a/firmware/export/pp5002.h b/firmware/export/pp5002.h
index 082fc1c9cc..83f8456bf0 100644
--- a/firmware/export/pp5002.h
+++ b/firmware/export/pp5002.h
@@ -30,13 +30,13 @@
30#define IISFIFO_WR (*(volatile unsigned long *)(0xc0002540)) 30#define IISFIFO_WR (*(volatile unsigned long *)(0xc0002540))
31#define IISFIFO_RD (*(volatile unsigned long *)(0xc0002580)) 31#define IISFIFO_RD (*(volatile unsigned long *)(0xc0002580))
32 32
33#define I2C_BASE 0xc0008000 33#define IDE_BASE 0xc0003000
34
35#define IDE_CFG_STATUS (*(volatile unsigned long *)(0xc0003024))
34 36
35/* The PortalPlayer USB controller uses base address 0xc5000000 */ 37#define USB_BASE 0xc0005000
36#define USB_BASE 0xc5000000
37 38
38#define USB2D_IDENT (*(volatile unsigned long *)(0xc5000000)) 39#define I2C_BASE 0xc0008000
39#define USB_STATUS (*(volatile unsigned long *)(0xc50001a4))
40 40
41#define GPIOA_ENABLE (*(volatile unsigned char *)(0xcf000000)) 41#define GPIOA_ENABLE (*(volatile unsigned char *)(0xcf000000))
42#define GPIOB_ENABLE (*(volatile unsigned char *)(0xcf000004)) 42#define GPIOB_ENABLE (*(volatile unsigned char *)(0xcf000004))
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h
index 873d5c849e..b2c7f4d0d2 100644
--- a/firmware/export/pp5020.h
+++ b/firmware/export/pp5020.h
@@ -299,6 +299,8 @@
299#define I2C_BASE 0x7000c000 299#define I2C_BASE 0x7000c000
300 300
301/* EIDE Controller */ 301/* EIDE Controller */
302#define IDE_BASE 0xc3000000
303
302#define IDE0_PRI_TIMING0 (*(volatile unsigned long*)(0xc3000000)) 304#define IDE0_PRI_TIMING0 (*(volatile unsigned long*)(0xc3000000))
303#define IDE0_PRI_TIMING1 (*(volatile unsigned long*)(0xc3000004)) 305#define IDE0_PRI_TIMING1 (*(volatile unsigned long*)(0xc3000004))
304#define IDE0_SEC_TIMING0 (*(volatile unsigned long*)(0xc3000008)) 306#define IDE0_SEC_TIMING0 (*(volatile unsigned long*)(0xc3000008))
diff --git a/firmware/target/arm/ata-target.h b/firmware/target/arm/ata-target.h
index d65a7b2822..f8755c38b3 100644
--- a/firmware/target/arm/ata-target.h
+++ b/firmware/target/arm/ata-target.h
@@ -23,9 +23,6 @@
23 23
24/* Plain C reading and writing. See comment in ata-as-arm.S */ 24/* Plain C reading and writing. See comment in ata-as-arm.S */
25 25
26#define ATA_IOBASE 0xc00031e0
27#define ATA_CONTROL (*((volatile unsigned char*)(0xc00033f8)))
28
29#elif defined CPU_PP502x 26#elif defined CPU_PP502x
30 27
31/* asm optimized reading and writing */ 28/* asm optimized reading and writing */
@@ -34,19 +31,18 @@
34void copy_read_sectors(unsigned char* buf, int wordcount); 31void copy_read_sectors(unsigned char* buf, int wordcount);
35void copy_write_sectors(const unsigned char* buf, int wordcount); 32void copy_write_sectors(const unsigned char* buf, int wordcount);
36 33
37#define ATA_IOBASE 0xc30001e0
38#define ATA_CONTROL (*((volatile unsigned char*)(0xc30003f8)))
39
40#endif /* CONFIG_CPU */ 34#endif /* CONFIG_CPU */
41 35
42#define ATA_DATA (*((volatile unsigned short*)(ATA_IOBASE))) 36/* primary channel */
43#define ATA_ERROR (*((volatile unsigned char*)(ATA_IOBASE + 0x04))) 37#define ATA_DATA (*((volatile unsigned short*)(IDE_BASE + 0x1e0)))
44#define ATA_NSECTOR (*((volatile unsigned char*)(ATA_IOBASE + 0x08))) 38#define ATA_ERROR (*((volatile unsigned char*)(IDE_BASE + 0x1e4)))
45#define ATA_SECTOR (*((volatile unsigned char*)(ATA_IOBASE + 0x0c))) 39#define ATA_NSECTOR (*((volatile unsigned char*)(IDE_BASE + 0x1e8)))
46#define ATA_LCYL (*((volatile unsigned char*)(ATA_IOBASE + 0x10))) 40#define ATA_SECTOR (*((volatile unsigned char*)(IDE_BASE + 0x1ec)))
47#define ATA_HCYL (*((volatile unsigned char*)(ATA_IOBASE + 0x14))) 41#define ATA_LCYL (*((volatile unsigned char*)(IDE_BASE + 0x1f0)))
48#define ATA_SELECT (*((volatile unsigned char*)(ATA_IOBASE + 0x18))) 42#define ATA_HCYL (*((volatile unsigned char*)(IDE_BASE + 0x1f4)))
49#define ATA_COMMAND (*((volatile unsigned char*)(ATA_IOBASE + 0x1c))) 43#define ATA_SELECT (*((volatile unsigned char*)(IDE_BASE + 0x1f8)))
44#define ATA_COMMAND (*((volatile unsigned char*)(IDE_BASE + 0x1fc)))
45#define ATA_CONTROL (*((volatile unsigned char*)(IDE_BASE + 0x3f8)))
50 46
51#define STATUS_BSY 0x80 47#define STATUS_BSY 0x80
52#define STATUS_RDY 0x40 48#define STATUS_RDY 0x40
@@ -55,15 +51,15 @@ void copy_write_sectors(const unsigned char* buf, int wordcount);
55#define STATUS_ERR 0x01 51#define STATUS_ERR 0x01
56#define ERROR_ABRT 0x04 52#define ERROR_ABRT 0x04
57 53
58#define WRITE_PATTERN1 0xa5 54#define WRITE_PATTERN1 0xa5
59#define WRITE_PATTERN2 0x5a 55#define WRITE_PATTERN2 0x5a
60#define WRITE_PATTERN3 0xaa 56#define WRITE_PATTERN3 0xaa
61#define WRITE_PATTERN4 0x55 57#define WRITE_PATTERN4 0x55
62 58
63#define READ_PATTERN1 0xa5 59#define READ_PATTERN1 0xa5
64#define READ_PATTERN2 0x5a 60#define READ_PATTERN2 0x5a
65#define READ_PATTERN3 0xaa 61#define READ_PATTERN3 0xaa
66#define READ_PATTERN4 0x55 62#define READ_PATTERN4 0x55
67 63
68#define READ_PATTERN1_MASK 0xff 64#define READ_PATTERN1_MASK 0xff
69#define READ_PATTERN2_MASK 0xff 65#define READ_PATTERN2_MASK 0xff