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| author | Rafaël Carré <rafael.carre@gmail.com> | 2010-09-03 22:18:04 +0000 |
|---|---|---|
| committer | Rafaël Carré <rafael.carre@gmail.com> | 2010-09-03 22:18:04 +0000 |
| commit | 173044d8c42fb36ee8bc470427176cb9a0d3e532 (patch) | |
| tree | eb7983e3fd898294a5fd5c96a3d7e443249dedf6 | |
| parent | bf0e907257fe9446d23c4b32aec9c4f4f5ba03d0 (diff) | |
| download | rockbox-173044d8c42fb36ee8bc470427176cb9a0d3e532.tar.gz rockbox-173044d8c42fb36ee8bc470427176cb9a0d3e532.zip | |
revert r27991
I misread the register defines in linux source code
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27995 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/target/arm/as3525/usb-drv-as3525v2.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/firmware/target/arm/as3525/usb-drv-as3525v2.h b/firmware/target/arm/as3525/usb-drv-as3525v2.h index 7db0e51faf..8a7fee15f0 100644 --- a/firmware/target/arm/as3525/usb-drv-as3525v2.h +++ b/firmware/target/arm/as3525/usb-drv-as3525v2.h | |||
| @@ -229,9 +229,9 @@ | |||
| 229 | #define DCFG_devspd_hs_phy_hs 0 /** High speed PHY running at high speed */ | 229 | #define DCFG_devspd_hs_phy_hs 0 /** High speed PHY running at high speed */ |
| 230 | #define DCFG_devspd_hs_phy_fs 1 /** High speed PHY running at full speed */ | 230 | #define DCFG_devspd_hs_phy_fs 1 /** High speed PHY running at full speed */ |
| 231 | #define DCFG_nzstsouthshk (1 << 2) /** Non Zero Length Status OUT Handshake */ | 231 | #define DCFG_nzstsouthshk (1 << 2) /** Non Zero Length Status OUT Handshake */ |
| 232 | #define DCFG_devadr_bitp 5 /** Device Address */ | 232 | #define DCFG_devadr_bitp 4 /** Device Address */ |
| 233 | #define DCFG_devadr_bits 0x7f | 233 | #define DCFG_devadr_bits 0x7f |
| 234 | #define DCFG_perfrint_bitp 12 /** Periodic Frame Interval */ | 234 | #define DCFG_perfrint_bitp 11 /** Periodic Frame Interval */ |
| 235 | #define DCFG_perfrint_bits 0x3 | 235 | #define DCFG_perfrint_bits 0x3 |
| 236 | #define DCFG_FRAME_INTERVAL_80 0 | 236 | #define DCFG_FRAME_INTERVAL_80 0 |
| 237 | #define DCFG_FRAME_INTERVAL_85 1 | 237 | #define DCFG_FRAME_INTERVAL_85 1 |