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authorMichael Sparmann <theseven@rockbox.org>2011-01-02 23:16:27 +0000
committerMichael Sparmann <theseven@rockbox.org>2011-01-02 23:16:27 +0000
commit152847977a420487d9c3728841101ef708e41373 (patch)
treef4113d0d6f60355d1ba00d78fc96e97a98e4d493
parent6f40387e742322c4860af2f389a4b531e669801f (diff)
downloadrockbox-152847977a420487d9c3728841101ef708e41373.tar.gz
rockbox-152847977a420487d9c3728841101ef708e41373.zip
New port: iPod Classic (also known as iPod 6G/6.5G/7G)
Major known issues: - No bootloader yet - No support for the first-generation 160GB CE-ATA hard disk drive yet - Audio playback is slow, only FLAC seems to reach realtime git-svn-id: svn://svn.rockbox.org/rockbox/trunk@28953 a1c6a512-1295-4272-9138-f99709370657
Diffstat
-rw-r--r--apps/plugins/plugin.lds10
-rw-r--r--firmware/SOURCES44
-rw-r--r--firmware/drivers/audio/cs42l55.c208
-rw-r--r--firmware/export/audiohw.h2
-rw-r--r--firmware/export/config/ipod6g.h246
-rw-r--r--firmware/export/cpu.h5
-rw-r--r--firmware/export/cs42l55.h481
-rw-r--r--firmware/export/cscodec.h27
-rw-r--r--firmware/export/i2c-s5l8702.h32
-rw-r--r--firmware/export/s5l8702.h631
-rw-r--r--firmware/target/arm/mmu-arm.S3
-rw-r--r--firmware/target/arm/s5l8700/ipodnano2g/piezo-nano2g.c95
-rw-r--r--firmware/target/arm/s5l8700/ipodnano2g/piezo.h24
-rw-r--r--firmware/target/arm/s5l8702/app.lds142
-rw-r--r--firmware/target/arm/s5l8702/boot.lds94
-rw-r--r--firmware/target/arm/s5l8702/crt0.S207
-rw-r--r--firmware/target/arm/s5l8702/debug-s5l8702.c151
-rw-r--r--firmware/target/arm/s5l8702/debug-target.h33
-rw-r--r--firmware/target/arm/s5l8702/i2c-s5l8702.c186
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/adc-ipod6g.c39
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/adc-target.h33
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/ata-ipod6g.c197
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/ata-target.h47
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/audio-ipod6g.c65
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/backlight-ipod6g.c67
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/backlight-target.h29
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/button-target.h78
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/cscodec-ipod6g.c64
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/lcd-asm-ipod6g.S295
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/lcd-ipod6g.c286
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c143
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/pmu-target.h46
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/power-ipod6g.c75
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/powermgmt-ipod6g.c88
-rw-r--r--firmware/target/arm/s5l8702/ipod6g/rtc-ipod6g.c72
-rw-r--r--firmware/target/arm/s5l8702/kernel-s5l8702.c56
-rw-r--r--firmware/target/arm/s5l8702/pcm-s5l8702.c219
-rw-r--r--firmware/target/arm/s5l8702/system-s5l8702.c268
-rw-r--r--firmware/target/arm/s5l8702/system-target.h48
-rw-r--r--firmware/target/arm/s5l8702/timer-s5l8702.c94
-rw-r--r--firmware/target/arm/thread-arm.c3
-rwxr-xr-xtools/configure74
-rw-r--r--tools/scramble.c5
43 files changed, 4975 insertions, 37 deletions
diff --git a/apps/plugins/plugin.lds b/apps/plugins/plugin.lds
index f4bd64df35..efd60159d1 100644
--- a/apps/plugins/plugin.lds
+++ b/apps/plugins/plugin.lds
@@ -71,6 +71,10 @@ OUTPUT_FORMAT(elf32-littlemips)
71#else 71#else
72#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - TTB_SIZE) 72#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - TTB_SIZE)
73#endif 73#endif
74#elif CONFIG_CPU==S5L8702
75#define ASM
76#include "cpu.h"
77#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE)
74#endif 78#endif
75 79
76 /* default to full RAM (minus codecs&plugins) unless specified otherwise */ 80 /* default to full RAM (minus codecs&plugins) unless specified otherwise */
@@ -150,6 +154,12 @@ OUTPUT_FORMAT(elf32-littlemips)
150#define IRAMORIG (0x00000000 + (48*1024)) 154#define IRAMORIG (0x00000000 + (48*1024))
151#define IRAMSIZE (128*1024) 155#define IRAMSIZE (128*1024)
152 156
157#elif CONFIG_CPU==S5L8702
158/* S5L8702 have 256KB of IRAM */
159#define DRAMORIG 0x08000000
160#define IRAMORIG (0x00000000 + (56*1024))
161#define IRAMSIZE (200*1024)
162
153#elif CONFIG_CPU == JZ4732 163#elif CONFIG_CPU == JZ4732
154#define DRAMORIG 0x80004000 + STUBOFFSET 164#define DRAMORIG 0x80004000 + STUBOFFSET
155#define IRAM DRAM 165#define IRAM DRAM
diff --git a/firmware/SOURCES b/firmware/SOURCES
index c42197bca6..2750b975ae 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -333,6 +333,8 @@ drivers/audio/mas35xx.c
333drivers/audio/ak4537.c 333drivers/audio/ak4537.c
334#elif defined(HAVE_UDA1341) 334#elif defined(HAVE_UDA1341)
335drivers/audio/uda1341.c 335drivers/audio/uda1341.c
336#elif defined(HAVE_CS42L55)
337drivers/audio/cs42l55.c
336#endif /* defined(HAVE_*) */ 338#endif /* defined(HAVE_*) */
337#elif defined(HAVE_SDL_AUDIO) 339#elif defined(HAVE_SDL_AUDIO)
338drivers/audio/sdl.c 340drivers/audio/sdl.c
@@ -455,6 +457,8 @@ target/arm/i2c-telechips.c
455/* no i2c driver yet */ 457/* no i2c driver yet */
456#elif CONFIG_I2C == I2C_S5L8700 458#elif CONFIG_I2C == I2C_S5L8700
457target/arm/s5l8700/i2c-s5l8700.c 459target/arm/s5l8700/i2c-s5l8700.c
460#elif CONFIG_I2C == I2C_S5L8702
461target/arm/s5l8702/i2c-s5l8702.c
458#endif 462#endif
459 463
460#if CONFIG_CPU == PNX0101 464#if CONFIG_CPU == PNX0101
@@ -525,8 +529,10 @@ target/arm/tcc77x/crt0.S
525target/arm/tcc780x/crt0.S 529target/arm/tcc780x/crt0.S
526#elif CONFIG_CPU==IMX31L 530#elif CONFIG_CPU==IMX31L
527target/arm/imx31/crt0.S 531target/arm/imx31/crt0.S
528#elif defined(CPU_S5L870X) 532#elif CONFIG_CPU==S5L8700 || CONFIG_CPU==S5L8701
529target/arm/s5l8700/crt0.S 533target/arm/s5l8700/crt0.S
534#elif CONFIG_CPU==S5L8702
535target/arm/s5l8702/crt0.S
530#elif defined(CPU_ARM) 536#elif defined(CPU_ARM)
531target/arm/crt0.S 537target/arm/crt0.S
532#endif /* defined(CPU_*) */ 538#endif /* defined(CPU_*) */
@@ -1441,13 +1447,7 @@ target/arm/tcc780x/cowond2/audio-cowond2.c
1441#endif /* COWON_D2 */ 1447#endif /* COWON_D2 */
1442 1448
1443#ifdef CPU_S5L870X 1449#ifdef CPU_S5L870X
1444target/arm/s5l8700/system-s5l8700.c
1445target/arm/mmu-arm.S 1450target/arm/mmu-arm.S
1446#ifndef SIMULATOR
1447#ifndef BOOTLOADER
1448target/arm/s5l8700/timer-s5l8700.c
1449#endif /* BOOTLOADER */
1450#endif /* SIMULATOR */
1451#endif 1451#endif
1452 1452
1453#ifdef MEIZU_M6SL 1453#ifdef MEIZU_M6SL
@@ -1504,6 +1504,7 @@ target/arm/ipod/button-clickwheel.c
1504target/arm/s5l8700/postmortemstub.S 1504target/arm/s5l8700/postmortemstub.S
1505target/arm/s5l8700/kernel-s5l8700.c 1505target/arm/s5l8700/kernel-s5l8700.c
1506target/arm/s5l8700/dma-s5l8700.c 1506target/arm/s5l8700/dma-s5l8700.c
1507target/arm/s5l8700/system-s5l8700.c
1507target/arm/s5l8700/ipodnano2g/backlight-nano2g.c 1508target/arm/s5l8700/ipodnano2g/backlight-nano2g.c
1508target/arm/s5l8700/ipodnano2g/lcd-nano2g.c 1509target/arm/s5l8700/ipodnano2g/lcd-nano2g.c
1509target/arm/s5l8700/ipodnano2g/lcd-asm-nano2g.S 1510target/arm/s5l8700/ipodnano2g/lcd-asm-nano2g.S
@@ -1515,6 +1516,7 @@ target/arm/s5l8700/ipodnano2g/pmu-nano2g.c
1515target/arm/s5l8700/ipodnano2g/rtc-nano2g.c 1516target/arm/s5l8700/ipodnano2g/rtc-nano2g.c
1516#ifndef BOOTLOADER 1517#ifndef BOOTLOADER
1517target/arm/usb-s3c6400x.c 1518target/arm/usb-s3c6400x.c
1519target/arm/s5l8700/timer-s5l8700.c
1518target/arm/s5l8700/debug-s5l8700.c 1520target/arm/s5l8700/debug-s5l8700.c
1519target/arm/s5l8700/pcm-s5l8700.c 1521target/arm/s5l8700/pcm-s5l8700.c
1520target/arm/s5l8700/wmcodec-s5l8700.c 1522target/arm/s5l8700/wmcodec-s5l8700.c
@@ -1524,6 +1526,34 @@ target/arm/s5l8700/ipodnano2g/adc-nano2g.c
1524#endif 1526#endif
1525#endif 1527#endif
1526 1528
1529#ifdef IPOD_6G
1530#ifndef SIMULATOR
1531target/arm/ipod/button-clickwheel.c
1532target/arm/s5l8702/ipod6g/cscodec-ipod6g.c
1533target/arm/s5l8702/ipod6g/backlight-ipod6g.c
1534target/arm/s5l8702/ipod6g/powermgmt-ipod6g.c
1535target/arm/s5l8702/ipod6g/power-ipod6g.c
1536target/arm/s5l8702/kernel-s5l8702.c
1537target/arm/s5l8702/system-s5l8702.c
1538target/arm/s5l8702/ipod6g/lcd-ipod6g.c
1539target/arm/s5l8702/ipod6g/lcd-asm-ipod6g.S
1540target/arm/s5l8702/ipod6g/ata-ipod6g.c
1541#if 0 //TODO
1542target/arm/s5l8702/postmortemstub.S
1543#endif
1544target/arm/s5l8702/ipod6g/pmu-ipod6g.c
1545target/arm/s5l8702/ipod6g/rtc-ipod6g.c
1546#ifndef BOOTLOADER
1547target/arm/usb-s3c6400x.c
1548target/arm/s5l8702/timer-s5l8702.c
1549target/arm/s5l8702/debug-s5l8702.c
1550target/arm/s5l8702/pcm-s5l8702.c
1551target/arm/s5l8702/ipod6g/audio-ipod6g.c
1552target/arm/s5l8702/ipod6g/adc-ipod6g.c
1553#endif
1554#endif
1555#endif
1556
1527#ifndef SIMULATOR 1557#ifndef SIMULATOR
1528#if CONFIG_CPU == JZ4732 1558#if CONFIG_CPU == JZ4732
1529target/mips/ingenic_jz47xx/ata-nand-jz4740.c 1559target/mips/ingenic_jz47xx/ata-nand-jz4740.c
diff --git a/firmware/drivers/audio/cs42l55.c b/firmware/drivers/audio/cs42l55.c
new file mode 100644
index 0000000000..e6ff771190
--- /dev/null
+++ b/firmware/drivers/audio/cs42l55.c
@@ -0,0 +1,208 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: wm8975.c 28572 2010-11-13 11:38:38Z theseven $
9 *
10 * Driver for Cirrus Logic CS42L55 audio codec
11 *
12 * Copyright (c) 2010 Michael Sparmann
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version 2
17 * of the License, or (at your option) any later version.
18 *
19 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
20 * KIND, either express or implied.
21 *
22 ****************************************************************************/
23#include "logf.h"
24#include "system.h"
25#include "string.h"
26#include "audio.h"
27#include "sound.h"
28#include "audiohw.h"
29#include "cscodec.h"
30#include "cs42l55.h"
31
32const struct sound_settings_info audiohw_settings[] = {
33 [SOUND_VOLUME] = {"dB", 0, 1, -58, 12, -25},
34 [SOUND_BASS] = {"dB", 1, 15,-105, 120, 0},
35 [SOUND_TREBLE] = {"dB", 1, 15,-105, 120, 0},
36 [SOUND_BALANCE] = {"%", 0, 1,-100, 100, 0},
37 [SOUND_CHANNELS] = {"", 0, 1, 0, 5, 0},
38 [SOUND_STEREO_WIDTH] = {"%", 0, 5, 0, 250, 100},
39};
40
41static int bass, treble;
42
43/* convert tenth of dB volume (-580..120) to master volume register value */
44int tenthdb2master(int db)
45{
46 /* +12 to -58dB 1dB steps */
47 /* 0001100 == +12dB (0xc) */
48 /* 0000000 == 0dB (0x0) */
49 /* 1000100 == -58dB (0x44) */
50
51 if (db < VOLUME_MIN) return HPACTL_HPAMUTE;
52 return db & HPACTL_HPAVOL_MASK;
53}
54
55static void cscodec_setbits(int reg, unsigned char off, unsigned char on)
56{
57 cscodec_write(reg, (cscodec_read(reg) & ~off) | on);
58}
59
60static void audiohw_mute(bool mute)
61{
62 if (mute) cscodec_setbits(PLAYCTL, 0, PLAYCTL_MSTAMUTE | PLAYCTL_MSTBMUTE);
63 else cscodec_setbits(PLAYCTL, PLAYCTL_MSTAMUTE | PLAYCTL_MSTBMUTE, 0);
64}
65
66void audiohw_preinit(void)
67{
68 cscodec_power(true);
69 cscodec_clock(true);
70 cscodec_reset(true);
71 sleep(HZ / 100);
72 cscodec_reset(false);
73
74 bass = 0;
75 treble = 0;
76
77 /* Ask Cirrus or maybe Apple what the hell this means */
78 cscodec_write(HIDDENCTL, HIDDENCTL_UNLOCK);
79 cscodec_write(HIDDEN2E, HIDDEN2E_DEFAULT);
80 cscodec_write(HIDDEN32, HIDDEN32_DEFAULT);
81 cscodec_write(HIDDEN33, HIDDEN33_DEFAULT);
82 cscodec_write(HIDDEN34, HIDDEN34_DEFAULT);
83 cscodec_write(HIDDEN35, HIDDEN35_DEFAULT);
84 cscodec_write(HIDDEN36, HIDDEN36_DEFAULT);
85 cscodec_write(HIDDEN37, HIDDEN37_DEFAULT);
86 cscodec_write(HIDDEN3A, HIDDEN3A_DEFAULT);
87 cscodec_write(HIDDEN3C, HIDDEN3C_DEFAULT);
88 cscodec_write(HIDDEN3D, HIDDEN3D_DEFAULT);
89 cscodec_write(HIDDEN3E, HIDDEN3E_DEFAULT);
90 cscodec_write(HIDDEN3F, HIDDEN3F_DEFAULT);
91 cscodec_write(HIDDENCTL, HIDDENCTL_LOCK);
92
93 cscodec_write(PWRCTL2, PWRCTL2_PDN_LINA_ALWAYS | PWRCTL2_PDN_LINB_ALWAYS
94 | PWRCTL2_PDN_HPA_NEVER | PWRCTL2_PDN_HPB_NEVER);
95 cscodec_write(CLKCTL1, CLKCTL1_MASTER | CLKCTL1_SCLKMCLK_BEFORE
96 | CLKCTL1_MCLKDIV2);
97 cscodec_write(CLKCTL2, CLKCTL2_44100HZ);
98 cscodec_write(MISCCTL, MISCCTL_UNDOC4 | MISCCTL_ANLGZC | MISCCTL_DIGSFT);
99 cscodec_write(PWRCTL1, PWRCTL1_PDN_CHRG | PWRCTL1_PDN_ADCA
100 | PWRCTL1_PDN_ADCB | PWRCTL1_PDN_CODEC);
101 cscodec_write(PLAYCTL, PLAYCTL_PDN_DSP
102 | PLAYCTL_MSTAMUTE | PLAYCTL_MSTBMUTE);
103 cscodec_write(PGAACTL, 0);
104 cscodec_write(PGABCTL, 0);
105 cscodec_write(HPACTL, HPACTL_HPAMUTE);
106 cscodec_write(HPBCTL, HPBCTL_HPBMUTE);
107 cscodec_write(LINEACTL, LINEACTL_LINEAMUTE);
108 cscodec_write(LINEBCTL, LINEBCTL_LINEBMUTE);
109 cscodec_write(PWRCTL1, PWRCTL1_PDN_CHRG | PWRCTL1_PDN_ADCA
110 | PWRCTL1_PDN_ADCB);
111}
112
113void audiohw_postinit(void)
114{
115 cscodec_write(HPACTL, 0);
116 cscodec_write(HPBCTL, 0);
117 cscodec_write(LINEACTL, 0);
118 cscodec_write(LINEBCTL, 0);
119 cscodec_write(CLSHCTL, CLSHCTL_ADPTPWR_SIGNAL);
120 audiohw_mute(false);
121}
122
123void audiohw_set_master_vol(int vol_l, int vol_r)
124{
125 /* +12 to -58dB 1dB steps */
126 /* 0001100 == +12dB (0xc) */
127 /* 0000000 == 0dB (0x0) */
128 /* 1000100 == -58dB (0x44) */
129
130 cscodec_setbits(HPACTL, HPACTL_HPAVOL_MASK, vol_l << HPACTL_HPAVOL_SHIFT);
131 cscodec_setbits(HPBCTL, HPBCTL_HPBVOL_MASK, vol_r << HPBCTL_HPBVOL_SHIFT);
132}
133
134void audiohw_set_lineout_vol(int vol_l, int vol_r)
135{
136 /* +12 to -58dB 1dB steps */
137 /* 0001100 == +12dB (0xc) */
138 /* 0000000 == 0dB (0x0) */
139 /* 1000100 == -58dB (0x44) */
140
141 cscodec_setbits(LINEACTL, LINEACTL_LINEAVOL_MASK,
142 vol_l << LINEACTL_LINEAVOL_SHIFT);
143 cscodec_setbits(LINEBCTL, LINEBCTL_LINEBVOL_MASK,
144 vol_r << LINEBCTL_LINEBVOL_SHIFT);
145}
146
147void audiohw_enable_lineout(bool enable)
148{
149 if (enable)
150 cscodec_setbits(PWRCTL2, PWRCTL2_PDN_LINA_MASK | PWRCTL2_PDN_LINB_MASK,
151 PWRCTL2_PDN_LINA_NEVER | PWRCTL2_PDN_LINB_NEVER);
152 else
153 cscodec_setbits(PWRCTL2, PWRCTL2_PDN_LINA_MASK | PWRCTL2_PDN_LINB_MASK,
154 PWRCTL2_PDN_LINA_ALWAYS | PWRCTL2_PDN_LINB_ALWAYS);
155}
156
157void audiohw_set_bass(int value)
158{
159 bass = value;
160 if (bass || treble) cscodec_setbits(PLAYCTL, PLAYCTL_PDN_DSP, 0);
161 else cscodec_setbits(PLAYCTL, 0, PLAYCTL_PDN_DSP);
162 if (value >= -105 && value <= 120)
163 cscodec_setbits(TONECTL, TONECTL_BASS_MASK,
164 (value / 15) << TONECTL_BASS_SHIFT);
165}
166
167void audiohw_set_treble(int value)
168{
169 treble = value;
170 if (bass || treble) cscodec_setbits(PLAYCTL, PLAYCTL_PDN_DSP, 0);
171 else cscodec_setbits(PLAYCTL, 0, PLAYCTL_PDN_DSP);
172 if (value >= -105 && value <= 120)
173 cscodec_setbits(TONECTL, TONECTL_TREB_MASK,
174 (value / 15) << TONECTL_TREB_SHIFT);
175}
176
177/* Nice shutdown of CS42L55 codec */
178void audiohw_close(void)
179{
180 audiohw_mute(true);
181 cscodec_write(HPACTL, HPACTL_HPAMUTE);
182 cscodec_write(HPBCTL, HPBCTL_HPBMUTE);
183 cscodec_write(LINEACTL, LINEACTL_LINEAMUTE);
184 cscodec_write(LINEBCTL, LINEBCTL_LINEBMUTE);
185 cscodec_write(PWRCTL1, PWRCTL1_PDN_CHRG | PWRCTL1_PDN_ADCA
186 | PWRCTL1_PDN_ADCB | PWRCTL1_PDN_CODEC);
187 cscodec_reset(true);
188 cscodec_clock(false);
189 cscodec_power(false);
190}
191
192/* Note: Disable output before calling this function */
193void audiohw_set_frequency(int fsel)
194{
195 if (fsel == HW_FREQ_8) cscodec_write(CLKCTL2, CLKCTL2_8000HZ);
196 else if (fsel == HW_FREQ_11) cscodec_write(CLKCTL2, CLKCTL2_11025HZ);
197 else if (fsel == HW_FREQ_12) cscodec_write(CLKCTL2, CLKCTL2_12000HZ);
198 else if (fsel == HW_FREQ_16) cscodec_write(CLKCTL2, CLKCTL2_16000HZ);
199 else if (fsel == HW_FREQ_22) cscodec_write(CLKCTL2, CLKCTL2_22050HZ);
200 else if (fsel == HW_FREQ_24) cscodec_write(CLKCTL2, CLKCTL2_24000HZ);
201 else if (fsel == HW_FREQ_32) cscodec_write(CLKCTL2, CLKCTL2_32000HZ);
202 else if (fsel == HW_FREQ_44) cscodec_write(CLKCTL2, CLKCTL2_44100HZ);
203 else if (fsel == HW_FREQ_48) cscodec_write(CLKCTL2, CLKCTL2_48000HZ);
204}
205
206#ifdef HAVE_RECORDING
207//TODO: Implement
208#endif /* HAVE_RECORDING */
diff --git a/firmware/export/audiohw.h b/firmware/export/audiohw.h
index 930c671c20..651c9cd254 100644
--- a/firmware/export/audiohw.h
+++ b/firmware/export/audiohw.h
@@ -68,6 +68,8 @@
68#include "jz4740-codec.h" 68#include "jz4740-codec.h"
69#elif defined(HAVE_AK4537) 69#elif defined(HAVE_AK4537)
70#include "ak4537.h" 70#include "ak4537.h"
71#elif defined(HAVE_CS42L55)
72#include "cs42l55.h"
71#endif 73#endif
72#if (CONFIG_PLATFORM & PLATFORM_HOSTED) 74#if (CONFIG_PLATFORM & PLATFORM_HOSTED)
73/* #include <SDL_audio.h> gives errors in other code areas, 75/* #include <SDL_audio.h> gives errors in other code areas,
diff --git a/firmware/export/config/ipod6g.h b/firmware/export/config/ipod6g.h
new file mode 100644
index 0000000000..16cf9afcef
--- /dev/null
+++ b/firmware/export/config/ipod6g.h
@@ -0,0 +1,246 @@
1/*
2 * This config file is for iPod 6G / Classic
3 */
4#define TARGET_TREE /* this target is using the target tree system */
5
6#define IPOD_ARCH 1
7
8/* For Rolo and boot loader */
9#define MODEL_NUMBER 71
10
11#define MODEL_NAME "Apple iPod Classic/6G"
12
13/* define this if you use an ATA controller */
14#define CONFIG_STORAGE STORAGE_ATA
15
16#define HAVE_ATA_DMA
17#define ATA_MAX_UDMA 4
18#define ATA_MAX_MWDMA 2
19
20/* define this if the ATA controller and method of USB access support LBA48 */
21#define HAVE_LBA48
22
23/* define this if you have recording possibility */
24//#define HAVE_RECORDING
25
26/* Define bitmask of input sources - recordable bitmask can be defined
27 explicitly if different */
28#define INPUT_SRC_CAPS (SRC_CAP_LINEIN)
29
30/* define the bitmask of hardware sample rates */
31#define HW_SAMPR_CAPS (SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11 \
32 | SAMPR_CAP_48 | SAMPR_CAP_24 | SAMPR_CAP_12 \
33 | SAMPR_CAP_32 | SAMPR_CAP_16 | SAMPR_CAP_8)
34
35/* define the bitmask of recording sample rates */
36#define REC_SAMPR_CAPS (SAMPR_CAP_44 | SAMPR_CAP_22 | SAMPR_CAP_11 \
37 | SAMPR_CAP_48 | SAMPR_CAP_24 | SAMPR_CAP_12 \
38 | SAMPR_CAP_32 | SAMPR_CAP_16 | SAMPR_CAP_8)
39
40/* define this if you have a bitmap LCD display */
41#define HAVE_LCD_BITMAP
42
43/* define this if you can flip your LCD */
44//#define HAVE_LCD_FLIP
45
46/* define this if you have a colour LCD */
47#define HAVE_LCD_COLOR
48
49/* define this if you want album art for this target */
50#define HAVE_ALBUMART
51
52/* define this to enable bitmap scaling */
53#define HAVE_BMP_SCALING
54
55/* define this to enable JPEG decoding */
56#define HAVE_JPEG
57
58/* define this if you can invert the colours on your LCD */
59//#define HAVE_LCD_INVERT
60
61/* LCD stays visible without backlight - simulator hint */
62#define HAVE_TRANSFLECTIVE_LCD
63
64/* define this if you have access to the quickscreen */
65#define HAVE_QUICKSCREEN
66
67/* define this if you have access to the pitchscreen */
68#define HAVE_PITCHSCREEN
69
70/* define this if you would like tagcache to build on this target */
71#define HAVE_TAGCACHE
72
73/* define this if the unit uses a scrollwheel for navigation */
74#define HAVE_SCROLLWHEEL
75#define HAVE_WHEEL_ACCELERATION
76#define WHEEL_ACCEL_START 270
77#define WHEEL_ACCELERATION 3
78
79/* Define this if you can detect headphones */
80#define HAVE_HEADPHONE_DETECTION
81
82/* LCD dimensions */
83#define LCD_WIDTH 320
84#define LCD_HEIGHT 240
85#define LCD_DEPTH 16 /* pseudo 262.144 colors */
86#define LCD_PIXELFORMAT RGB565 /* rgb565 */
87
88/* Define this if the LCD can shut down */
89#define HAVE_LCD_SHUTDOWN
90
91/* Define this if your LCD can be enabled/disabled */
92#define HAVE_LCD_ENABLE
93
94/* Define this if your LCD can be put to sleep. HAVE_LCD_ENABLE
95 should be defined as well. */
96#ifndef BOOTLOADER
97//TODO: #define HAVE_LCD_SLEEP
98//TODO: #define HAVE_LCD_SLEEP_SETTING
99#endif
100
101#define CONFIG_KEYPAD IPOD_4G_PAD
102
103//#define AB_REPEAT_ENABLE
104//#define ACTION_WPSAB_SINGLE ACTION_WPS_BROWSE
105
106/* Define this to enable morse code input */
107#define HAVE_MORSE_INPUT
108
109/* Define this if you do software codec */
110#define CONFIG_CODEC SWCODEC
111
112/* define this if you have a real-time clock */
113#define CONFIG_RTC RTC_NANO2G
114
115/* Define if the device can wake from an RTC alarm */
116//#define HAVE_RTC_ALARM
117
118#define CONFIG_LCD LCD_IPOD6G
119
120/* Define the type of audio codec */
121#define HAVE_CS42L55
122
123#define HAVE_PCM_DMA_ADDRESS
124
125/* Define this for LCD backlight available */
126#define HAVE_BACKLIGHT
127#define HAVE_BACKLIGHT_BRIGHTNESS
128
129/* Define this if you have a software controlled poweroff */
130#define HAVE_SW_POWEROFF
131
132/* The number of bytes reserved for loadable codecs */
133#define CODEC_SIZE 0x100000
134
135/* The number of bytes reserved for loadable plugins */
136#define PLUGIN_BUFFER_SIZE 0x80000
137
138// TODO: Figure out real values
139#define BATTERY_CAPACITY_DEFAULT 400 /* default battery capacity */
140#define BATTERY_CAPACITY_MIN 300 /* min. capacity selectable */
141#define BATTERY_CAPACITY_MAX 500 /* max. capacity selectable */
142#define BATTERY_CAPACITY_INC 10 /* capacity increment */
143#define BATTERY_TYPES_COUNT 1 /* only one type */
144
145/* Hardware controlled charging with monitoring */
146#define CONFIG_CHARGING CHARGING_MONITOR
147
148/* define current usage levels */
149//TODO: #define CURRENT_NORMAL 21 /* playback @48MHz clock, backlight off */
150//TODO: #define CURRENT_BACKLIGHT 23 /* maximum brightness */
151
152/* define this if the unit can be powered or charged via USB */
153#define HAVE_USB_POWER
154
155/* Define this if your LCD can set contrast */
156//#define HAVE_LCD_CONTRAST
157
158/* Define Apple remote tuner */
159//#define CONFIG_TUNER IPOD_REMOTE_TUNER
160//#define HAVE_RDS_CAP
161
162/* The exact type of CPU */
163#define CONFIG_CPU S5L8702
164
165/* I2C interface */
166#define CONFIG_I2C I2C_S5L8702
167
168#define HAVE_USB_CHARGING_ENABLE
169
170/* The size of the flash ROM */
171#define FLASH_SIZE 0x400000
172
173/* Define this to the CPU frequency */
174//TODO: Figure out exact value
175#define CPU_FREQ 216000000
176
177/* define this if the hardware can be powered off while charging */
178#define HAVE_POWEROFF_WHILE_CHARGING
179
180/* Offset ( in the firmware file's header ) to the file CRC */
181#define FIRMWARE_OFFSET_FILE_CRC 0
182
183/* Offset ( in the firmware file's header ) to the real data */
184#define FIRMWARE_OFFSET_FILE_DATA 8
185
186/* Define this if you can read an absolute wheel position */
187#define HAVE_WHEEL_POSITION
188
189/* define this if the device has larger sectors when accessed via USB */
190/* (only relevant in disk.c, fat.c now always supports large virtual sectors) */
191#define MAX_LOG_SECTOR_SIZE 4096
192
193/* define this if the hard drive uses large physical sectors (ATA-7 feature) */
194/* and doesn't handle them in the drive firmware */
195#define MAX_PHYS_SECTOR_SIZE 4096
196
197/* Define this if you have adjustable CPU frequency */
198//TODO: #define HAVE_ADJUSTABLE_CPU_FREQ
199
200#define BOOTFILE_EXT "ipod"
201#define BOOTFILE "rockbox." BOOTFILE_EXT
202#define BOOTDIR "/.rockbox"
203
204/* Alternative bootfile extension - this is for encrypted images */
205#define BOOTFILE_EXT2 "ipodx"
206
207/* Define this for FM radio input available */
208#define HAVE_FMRADIO_IN
209
210/** Port-specific settings **/
211
212#if 0
213/* Main LCD contrast range and defaults */
214#define MIN_CONTRAST_SETTING 1
215#define MAX_CONTRAST_SETTING 30
216#define DEFAULT_CONTRAST_SETTING 19 /* Match boot contrast */
217#endif
218
219/* Main LCD backlight brightness range and defaults */
220#define MIN_BRIGHTNESS_SETTING 1
221#define MAX_BRIGHTNESS_SETTING 0x3f
222#define DEFAULT_BRIGHTNESS_SETTING 0x20
223
224/* USB defines */
225#define HAVE_USBSTACK
226//#define HAVE_USB_HID_MOUSE - broken?
227#define CONFIG_USBOTG USBOTG_S3C6400X
228#define USB_VENDOR_ID 0x05AC
229//TODO: This is still the Nano2G product ID. Figure out the real one.
230#define USB_PRODUCT_ID 0x1260
231#define USB_NUM_ENDPOINTS 5
232#define USE_ROCKBOX_USB
233#define USB_DEVBSS_ATTR __attribute__((aligned(16)))
234
235/* Define this if you can switch on/off the accessory power supply */
236#define HAVE_ACCESSORY_SUPPLY
237//#define IPOD_ACCESSORY_PROTOCOL
238//#define HAVE_SERIAL
239
240/* Define this, if you can switch on/off the lineout */
241#define HAVE_LINEOUT_POWEROFF
242
243#define USB_WRITE_BUFFER_SIZE (1024*64)
244
245/* Define this if a programmable hotkey is mapped */
246#define HAVE_HOTKEY
diff --git a/firmware/export/cpu.h b/firmware/export/cpu.h
index 381830ab52..59d210380b 100644
--- a/firmware/export/cpu.h
+++ b/firmware/export/cpu.h
@@ -59,9 +59,12 @@
59#ifdef CPU_TCC780X 59#ifdef CPU_TCC780X
60#include "tcc780x.h" 60#include "tcc780x.h"
61#endif 61#endif
62#ifdef CPU_S5L870X 62#if CONFIG_CPU == S5L8700 || CONFIG_CPU == S5L8701
63#include "s5l8700.h" 63#include "s5l8700.h"
64#endif 64#endif
65#if CONFIG_CPU == S5L8702
66#include "s5l8702.h"
67#endif
65#if CONFIG_CPU == JZ4732 68#if CONFIG_CPU == JZ4732
66#include "jz4740.h" 69#include "jz4740.h"
67#endif 70#endif
diff --git a/firmware/export/cs42l55.h b/firmware/export/cs42l55.h
new file mode 100644
index 0000000000..8a6640f7c2
--- /dev/null
+++ b/firmware/export/cs42l55.h
@@ -0,0 +1,481 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: wm8975.h 28159 2010-09-24 22:42:06Z Buschel $
9 *
10 * Copyright (C) 2010 by Michael Sparmann
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef __CS42L55_H__
23#define __CS42L55_H__
24
25/* volume/balance/treble/bass interdependency */
26#define VOLUME_MIN -580
27#define VOLUME_MAX 120
28
29#define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP)
30
31extern int tenthdb2master(int db);
32
33extern void audiohw_set_master_vol(int vol_l, int vol_r);
34extern void audiohw_set_lineout_vol(int vol_l, int vol_r);
35extern void audiohw_enable_lineout(bool enable);
36
37/* Register addresses and bits */
38
39#define HIDDENCTL 0x00
40#define HIDDENCTL_LOCK 0x00
41#define HIDDENCTL_UNLOCK 0x99
42
43#define CHIPVERSION 0x01
44
45#define PWRCTL1 0x02
46#define PWRCTL1_PDN_CODEC (1 << 0)
47#define PWRCTL1_PDN_ADCA (1 << 1)
48#define PWRCTL1_PDN_ADCB (1 << 2)
49#define PWRCTL1_PDN_CHRG (1 << 3)
50
51#define PWRCTL2 0x03
52#define PWRCTL2_PDN_LINA_MASK (3 << 0)
53#define PWRCTL2_PDN_LINA_HIGH (0 << 0)
54#define PWRCTL2_PDN_LINA_LOW (1 << 0)
55#define PWRCTL2_PDN_LINA_NEVER (2 << 0)
56#define PWRCTL2_PDN_LINA_ALWAYS (3 << 0)
57#define PWRCTL2_PDN_LINB_MASK (3 << 2)
58#define PWRCTL2_PDN_LINB_HIGH (0 << 2)
59#define PWRCTL2_PDN_LINB_LOW (1 << 2)
60#define PWRCTL2_PDN_LINB_NEVER (2 << 2)
61#define PWRCTL2_PDN_LINB_ALWAYS (3 << 2)
62#define PWRCTL2_PDN_HPA_MASK (3 << 4)
63#define PWRCTL2_PDN_HPA_HIGH (0 << 4)
64#define PWRCTL2_PDN_HPA_LOW (1 << 4)
65#define PWRCTL2_PDN_HPA_NEVER (2 << 4)
66#define PWRCTL2_PDN_HPA_ALWAYS (3 << 4)
67#define PWRCTL2_PDN_HPB_MASK (3 << 6)
68#define PWRCTL2_PDN_HPB_HIGH (0 << 6)
69#define PWRCTL2_PDN_HPB_LOW (1 << 6)
70#define PWRCTL2_PDN_HPB_NEVER (2 << 6)
71#define PWRCTL2_PDN_HPB_ALWAYS (3 << 6)
72
73#define CLKCTL1 0x04
74#define CLKCTL1_MCLKDIS (1 << 0)
75#define CLKCTL1_MCLKDIV2 (1 << 1)
76#define CLKCTL1_SCLKMCLK_MASK (3 << 2)
77#define CLKCTL1_SCLKMCLK_BURST (0 << 2)
78#define CLKCTL1_SCLKMCLK_AFTER (2 << 2)
79#define CLKCTL1_SCLKMCLK_BEFORE (3 << 2)
80#define CLKCTL1_INV_SCLK (1 << 4)
81#define CLKCTL1_MASTER (1 << 5)
82
83#define CLKCTL2 0x05
84#define CLKCTL2_MCLKLRCK_MASK (3 << 0)
85#define CLKCTL2_MCLKLRCK_125 (1 << 0)
86#define CLKCTL2_MCLKLRCK_136 (3 << 0)
87#define CLKCTL2_32KGROUP (1 << 2)
88#define CLKCTL2_SPEED_MASK (3 << 3)
89#define CLKCTL2_SPEED_SINGLE (1 << 3)
90#define CLKCTL2_SPEED_HALF (2 << 3)
91#define CLKCTL2_SPEED_QUARTER (3 << 3)
92#define CLKCTL2_8000HZ 0x1d
93#define CLKCTL2_11025HZ 0x1b
94#define CLKCTL2_12000HZ 0x19
95#define CLKCTL2_16000HZ 0x15
96#define CLKCTL2_22050HZ 0x13
97#define CLKCTL2_24000HZ 0x11
98#define CLKCTL2_32000HZ 0x0d
99#define CLKCTL2_44100HZ 0x0b
100#define CLKCTL2_48000HZ 0x09
101
102#define CLSHCTL 0x06
103#define CLSHCTL_ADPTPWR_MASK (3 << 4)
104#define CLSHCTL_ADPTPWR_VOLUME (0 << 4)
105#define CLSHCTL_ADPTPWR_HALF (1 << 4)
106#define CLSHCTL_ADPTPWR_FULL (2 << 4)
107#define CLSHCTL_ADPTPWR_SIGNAL (3 << 4)
108
109#define MISCCTL 0x07
110#define MISCCTL_FREEZE (1 << 0)
111#define MISCCTL_DIGSFT (1 << 2)
112#define MISCCTL_ANLGZC (1 << 3)
113#define MISCCTL_UNDOC4 (1 << 4)
114#define MISCCTL_DIGMUX (1 << 7)
115
116#define ALHMUX 0x08
117#define ALHMUX_HPAMUX_MASK (1 << 0)
118#define ALHMUX_HPAMUX_DACA (0 << 0)
119#define ALHMUX_HPAMUX_PGAA (1 << 0)
120#define ALHMUX_HPBMUX_MASK (1 << 1)
121#define ALHMUX_HPBMUX_DACB (0 << 1)
122#define ALHMUX_HPBMUX_PGAB (1 << 1)
123#define ALHMUX_LINEAMUX_MASK (1 << 2)
124#define ALHMUX_LINEAMUX_DACA (0 << 2)
125#define ALHMUX_LINEAMUX_PGAA (1 << 2)
126#define ALHMUX_LINEBMUX_MASK (1 << 3)
127#define ALHMUX_LINEBMUX_DACB (0 << 3)
128#define ALHMUX_LINEBMUX_PGAB (1 << 3)
129#define ALHMUX_ADCAMUX_MASK (3 << 4)
130#define ALHMUX_ADCAMUX_PGAA (0 << 4)
131#define ALHMUX_ADCAMUX_AIN1A (1 << 4)
132#define ALHMUX_ADCAMUX_AIN2A (2 << 4)
133#define ALHMUX_ADCBMUX_MASK (3 << 4)
134#define ALHMUX_ADCBMUX_PGAB (0 << 6)
135#define ALHMUX_ADCBMUX_AIN1B (1 << 6)
136#define ALHMUX_ADCBMUX_AIN2B (2 << 6)
137
138#define HPFCTL 0x09
139#define HPFCTL_HPFA_CF_MASK (3 << 0)
140#define HPFCTL_HPFA_CF_1_8 (0 << 0)
141#define HPFCTL_HPFA_CF_119 (1 << 0)
142#define HPFCTL_HPFA_CF_236 (2 << 0)
143#define HPFCTL_HPFA_CF_464 (3 << 0)
144#define HPFCTL_HPFB_CF_MASK (3 << 2)
145#define HPFCTL_HPFB_CF_1_8 (0 << 2)
146#define HPFCTL_HPFB_CF_119 (1 << 2)
147#define HPFCTL_HPFB_CF_236 (2 << 2)
148#define HPFCTL_HPFB_CF_464 (3 << 2)
149#define HPFCTL_HPFRZA (1 << 4)
150#define HPFCTL_HPFA (1 << 5)
151#define HPFCTL_HPFRZB (1 << 6)
152#define HPFCTL_HPFB (1 << 7)
153
154#define ADCCTL 0x0a
155#define ADCCTL_ADCAMUTE (1 << 0)
156#define ADCCTL_ADCBMUTE (1 << 1)
157#define ADCCTL_INV_ADCA (1 << 2)
158#define ADCCTL_INV_ADCB (1 << 3)
159#define ADCCTL_DIGSUM_MASK (3 << 4)
160#define ADCCTL_DIGSUM_NORMAL (0 << 4)
161#define ADCCTL_DIGSUM_HALFSUM (1 << 4)
162#define ADCCTL_DIGSUM_HALFDIFF (2 << 4)
163#define ADCCTL_DIGSUM_SWAPPED (3 << 4)
164#define ADCCTL_PGA_VOLUME_GROUP (1 << 6)
165#define ADCCTL_ADC_VOLUME_GROUP (1 << 7)
166
167#define PGAACTL 0x0b
168#define PGAACTL_VOLUME_MASK (0x3f << 0)
169#define PGAACTL_VOLUME_SHIFT 0
170#define PGAACTL_MUX_MASK (1 << 6)
171#define PGAACTL_MUX_AIN1A (0 << 6)
172#define PGAACTL_MUX_AIN2A (1 << 6)
173#define PGAACTL_BOOST (1 << 7)
174
175#define PGABCTL 0x0c
176#define PGABCTL_VOLUME_MASK (0x3f << 0)
177#define PGABCTL_VOLUME_SHIFT 0
178#define PGABCTL_MUX_MASK (1 << 6)
179#define PGABCTL_MUX_AIN1B (0 << 6)
180#define PGABCTL_MUX_AIN2B (1 << 6)
181#define PGABCTL_BOOST (1 << 7)
182
183#define ADCAATT 0x0d
184#define ADCAATT_VOLUME_MASK (0xff << 0)
185#define ADCAATT_VOLUME_SHIFT 0
186
187#define ADCBATT 0x0e
188#define ADCBATT_VOLUME_MASK (0xff << 0)
189#define ADCBATT_VOLUME_SHIFT 0
190
191#define PLAYCTL 0x0f
192#define PLAYCTL_MSTAMUTE (1 << 0)
193#define PLAYCTL_MSTBMUTE (1 << 1)
194#define PLAYCTL_INV_PCMA (1 << 2)
195#define PLAYCTL_INV_PCMB (1 << 3)
196#define PLAYCTL_PB_VOLUME_GROUP (1 << 4)
197#define PLAYCTL_DEEMPH (1 << 6)
198#define PLAYCTL_PDN_DSP (1 << 7)
199
200#define AMIXACTL 0x10
201#define AMIXACTL_AMIXAVOL_MASK (0x7f << 0)
202#define AMIXACTL_AMIXAVOL_SHIFT 0
203#define AMIXACTL_AMIXAMUTE (1 << 7)
204
205#define AMIXBCTL 0x11
206#define AMIXBCTL_AMIXBVOL_MASK (0x7f << 0)
207#define AMIXBCTL_AMIXBVOL_SHIFT 0
208#define AMIXBCTL_AMIXBMUTE (1 << 7)
209
210#define PMIXACTL 0x12
211#define PMIXACTL_PMIXAVOL_MASK (0x7f << 0)
212#define PMIXACTL_PMIXAVOL_SHIFT 0
213#define PMIXACTL_PMIXAMUTE (1 << 7)
214
215#define PMIXBCTL 0x13
216#define PMIXBCTL_PMIXBVOL_MASK (0x7f << 0)
217#define PMIXBCTL_PMIXBVOL_SHIFT 0
218#define PMIXBCTL_PMIXBMUTE (1 << 7)
219
220#define BEEPFO 0x14
221#define BEEPFO_ONTIME_MASK (0xf << 0)
222#define BEEPFO_ONTIME_86 (0x0 << 0)
223#define BEEPFO_ONTIME_430 (0x1 << 0)
224#define BEEPFO_ONTIME_780 (0x2 << 0)
225#define BEEPFO_ONTIME_1200 (0x3 << 0)
226#define BEEPFO_ONTIME_1500 (0x4 << 0)
227#define BEEPFO_ONTIME_1800 (0x5 << 0)
228#define BEEPFO_ONTIME_2200 (0x6 << 0)
229#define BEEPFO_ONTIME_2500 (0x7 << 0)
230#define BEEPFO_ONTIME_2800 (0x8 << 0)
231#define BEEPFO_ONTIME_3200 (0x9 << 0)
232#define BEEPFO_ONTIME_3500 (0xa << 0)
233#define BEEPFO_ONTIME_3800 (0xb << 0)
234#define BEEPFO_ONTIME_4200 (0xc << 0)
235#define BEEPFO_ONTIME_4500 (0xd << 0)
236#define BEEPFO_ONTIME_4800 (0xe << 0)
237#define BEEPFO_ONTIME_5200 (0xf << 0)
238#define BEEPFO_FREQ_MASK (0xf << 4)
239#define BEEPFO_FREQ_254_76 (0x0 << 4)
240#define BEEPFO_FREQ_509_51 (0x1 << 4)
241#define BEEPFO_FREQ_571_65 (0x2 << 4)
242#define BEEPFO_FREQ_651_04 (0x3 << 4)
243#define BEEPFO_FREQ_689_34 (0x4 << 4)
244#define BEEPFO_FREQ_756_04 (0x5 << 4)
245#define BEEPFO_FREQ_869_45 (0x6 << 4)
246#define BEEPFO_FREQ_976_56 (0x7 << 4)
247#define BEEPFO_FREQ_1019_02 (0x8 << 4)
248#define BEEPFO_FREQ_1171_88 (0x9 << 4)
249#define BEEPFO_FREQ_1302_08 (0xa << 4)
250#define BEEPFO_FREQ_1378_67 (0xb << 4)
251#define BEEPFO_FREQ_1562_50 (0xc << 4)
252#define BEEPFO_FREQ_1674_11 (0xd << 4)
253#define BEEPFO_FREQ_1953_13 (0xe << 4)
254#define BEEPFO_FREQ_2130_68 (0xf << 4)
255
256#define BEEPVO 0x15
257#define BEEPVO_VOLUME_MASK (0x1f << 0)
258#define BEEPVO_VOLUME_SHIFT 0
259#define BEEPVO_OFFTIME_MASK (7 << 5)
260#define BEEPVO_OFFTIME_1230 (0 << 5)
261#define BEEPVO_OFFTIME_2580 (1 << 5)
262#define BEEPVO_OFFTIME_3900 (2 << 5)
263#define BEEPVO_OFFTIME_5200 (3 << 5)
264#define BEEPVO_OFFTIME_6600 (4 << 5)
265#define BEEPVO_OFFTIME_8050 (5 << 5)
266#define BEEPVO_OFFTIME_9350 (6 << 5)
267#define BEEPVO_OFFTIME_10800 (7 << 5)
268
269#define BTCTL 0x16
270#define BTCTL_TCEN (1 << 0)
271#define BTCTL_BASSCF_MASK (3 << 1)
272#define BTCTL_BASSCF_50 (0 << 1)
273#define BTCTL_BASSCF_100 (1 << 1)
274#define BTCTL_BASSCF_200 (2 << 1)
275#define BTCTL_BASSCF_250 (3 << 1)
276#define BTCTL_TREBCF_MASK (3 << 3)
277#define BTCTL_TREBCF_5000 (0 << 3)
278#define BTCTL_TREBCF_7000 (1 << 3)
279#define BTCTL_TREBCF_10000 (2 << 3)
280#define BTCTL_TREBCF_15000 (3 << 3)
281#define BTCTL_BEEP_MASK (0 << 6)
282#define BTCTL_BEEP_OFF (0 << 6)
283#define BTCTL_BEEP_SINGLE (1 << 6)
284#define BTCTL_BEEP_MULTIPLE (2 << 6)
285#define BTCTL_BEEP_CONTINUOUS (3 << 6)
286
287#define TONECTL 0x17
288#define TONECTL_BASS_MASK (0xf << 0)
289#define TONECTL_BASS_SHIFT 0
290#define TONECTL_TREB_MASK (0xf << 4)
291#define TONECTL_TREB_SHIFT 4
292
293#define MSTAVOL 0x18
294#define MSTAVOL_VOLUME_MASK (0xff << 0)
295#define MSTAVOL_VOLUME_SHIFT 0
296
297#define MSTBVOL 0x19
298#define MSTBVOL_VOLUME_MASK (0xff << 0)
299#define MSTBVOL_VOLUME_SHIFT 0
300
301#define HPACTL 0x1a
302#define HPACTL_HPAVOL_MASK (0x7f << 0)
303#define HPACTL_HPAVOL_SHIFT 0
304#define HPACTL_HPAMUTE (1 << 7)
305
306#define HPBCTL 0x1b
307#define HPBCTL_HPBVOL_MASK (0x7f << 0)
308#define HPBCTL_HPBVOL_SHIFT 0
309#define HPBCTL_HPBMUTE (1 << 7)
310
311#define LINEACTL 0x1c
312#define LINEACTL_LINEAVOL_MASK (0x7f << 0)
313#define LINEACTL_LINEAVOL_SHIFT 0
314#define LINEACTL_LINEAMUTE (1 << 7)
315
316#define LINEBCTL 0x1d
317#define LINEBCTL_LINEBVOL_MASK (0x7f << 0)
318#define LINEBCTL_LINEBVOL_SHIFT 0
319#define LINEBCTL_LINEBMUTE (1 << 7)
320
321#define AINADV 0x1e
322#define AINADV_VOLUME_MASK (0xff << 0)
323#define AINADV_VOLUME_SHIFT 0
324
325#define DINADV 0x1f
326#define DINADV_VOLUME_MASK (0xff << 0)
327#define DINADV_VOLUME_SHIFT 0
328
329#define MIXCTL 0x20
330#define MIXCTL_ADCASWP_MASK (3 << 0)
331#define MIXCTL_ADCASWP_NORMAL (0 << 0)
332#define MIXCTL_ADCASWP_HALFSUM (1 << 0)
333#define MIXCTL_ADCASWP_HALFSUM2 (2 << 0)
334#define MIXCTL_ADCASWP_SWAPPED (3 << 0)
335#define MIXCTL_ADCBSWP_MASK (3 << 2)
336#define MIXCTL_ADCBSWP_NORMAL (0 << 2)
337#define MIXCTL_ADCBSWP_HALFSUM (1 << 2)
338#define MIXCTL_ADCBSWP_HALFSUM2 (2 << 2)
339#define MIXCTL_ADCBSWP_SWAPPED (3 << 2)
340#define MIXCTL_PCMASWP_MASK (3 << 4)
341#define MIXCTL_PCMASWP_NORMAL (0 << 4)
342#define MIXCTL_PCMASWP_HALFSUM (1 << 4)
343#define MIXCTL_PCMASWP_HALFSUM2 (2 << 4)
344#define MIXCTL_PCMASWP_SWAPPED (3 << 4)
345#define MIXCTL_PCMBSWP_MASK (3 << 6)
346#define MIXCTL_PCMBSWP_NORMAL (0 << 6)
347#define MIXCTL_PCMBSWP_HALFSUM (1 << 6)
348#define MIXCTL_PCMBSWP_HALFSUM2 (2 << 6)
349#define MIXCTL_PCMBSWP_SWAPPED (3 << 6)
350
351#define LIMCTL1 0x21
352#define LIMCTL1_CUSH_MASK (7 << 2)
353#define LIMCTL1_CUSH_0 (0 << 2)
354#define LIMCTL1_CUSH_3 (1 << 2)
355#define LIMCTL1_CUSH_6 (2 << 2)
356#define LIMCTL1_CUSH_9 (3 << 2)
357#define LIMCTL1_CUSH_12 (4 << 2)
358#define LIMCTL1_CUSH_18 (5 << 2)
359#define LIMCTL1_CUSH_24 (6 << 2)
360#define LIMCTL1_CUSH_30 (7 << 2)
361#define LIMCTL1_LMAX_MASK (7 << 5)
362#define LIMCTL1_LMAX_0 (0 << 5)
363#define LIMCTL1_LMAX_3 (1 << 5)
364#define LIMCTL1_LMAX_6 (2 << 5)
365#define LIMCTL1_LMAX_9 (3 << 5)
366#define LIMCTL1_LMAX_12 (4 << 5)
367#define LIMCTL1_LMAX_18 (5 << 5)
368#define LIMCTL1_LMAX_24 (6 << 5)
369#define LIMCTL1_LMAX_30 (7 << 5)
370
371#define LIMCTL2 0x22
372#define LIMCTL2_LIMRRATE_MASK (0x3f << 0)
373#define LIMCTL2_LIMRRATE_SHIFT 0
374#define LIMCTL2_LIMIT_ALL (1 << 6)
375#define LIMCTL2_LIMIT (1 << 7)
376
377#define LIMCTL3 0x23
378#define LIMCTL3_LIMARATE_MASK (0x3f << 0)
379#define LIMCTL3_LIMARATE_SHIFT 0
380
381#define ALCCTL1 0x24
382#define ALCCTL1_ALCARATE_MASK (0x3f << 0)
383#define ALCCTL1_ALCARATE_SHIFT 0
384#define ALCCTL1_ALCA (1 << 6)
385#define ALCCTL1_ALCB (1 << 7)
386
387#define ALCCTL2 0x25
388#define ALCCTL2_ALCRRATE_MASK (0x3f << 0)
389#define ALCCTL2_ALCRRATE_SHIFT 0
390
391#define ALCCTL3 0x26
392#define ALCCTL3_ALCMIN_MASK (7 << 2)
393#define ALCCTL3_ALCMIN_0 (0 << 2)
394#define ALCCTL3_ALCMIN_3 (1 << 2)
395#define ALCCTL3_ALCMIN_6 (2 << 2)
396#define ALCCTL3_ALCMIN_9 (3 << 2)
397#define ALCCTL3_ALCMIN_12 (4 << 2)
398#define ALCCTL3_ALCMIN_18 (5 << 2)
399#define ALCCTL3_ALCMIN_24 (6 << 2)
400#define ALCCTL3_ALCMIN_30 (7 << 2)
401#define ALCCTL3_ALCMAX_MASK (7 << 5)
402#define ALCCTL3_ALCMAX_0 (0 << 5)
403#define ALCCTL3_ALCMAX_3 (1 << 5)
404#define ALCCTL3_ALCMAX_6 (2 << 5)
405#define ALCCTL3_ALCMAX_9 (3 << 5)
406#define ALCCTL3_ALCMAX_12 (4 << 5)
407#define ALCCTL3_ALCMAX_18 (5 << 5)
408#define ALCCTL3_ALCMAX_24 (6 << 5)
409#define ALCCTL3_ALCMAX_30 (7 << 5)
410
411#define NGCTL 0x27
412#define NGCTL_NGDELEAY_MASK (3 << 0)
413#define NGCTL_NGDELEAY_50 (0 << 0)
414#define NGCTL_NGDELEAY_100 (1 << 0)
415#define NGCTL_NGDELEAY_150 (2 << 0)
416#define NGCTL_NGDELEAY_200 (3 << 0)
417#define NGCTL_THRESH_MASK (7 << 2)
418#define NGCTL_THRESH_SHIFT 2
419#define NGCTL_NG_BOOST30 (1 << 5)
420#define NGCTL_NG (1 << 6)
421#define NGCTL_NGALL (1 << 7)
422
423#define ALSZDIS 0x28
424#define ALSZDIS_LIMSRDIS (1 << 3)
425#define ALSZDIS_ALCAZCDIS (1 << 4)
426#define ALSZDIS_ALCASRDIS (1 << 5)
427#define ALSZDIS_ALCBZCDIS (1 << 6)
428#define ALSZDIS_ALCBSRDIS (1 << 7)
429
430#define STATUS 0x29
431#define STATUS_ADCAOVFL (1 << 0)
432#define STATUS_ADCBOVFL (1 << 1)
433#define STATUS_MIXAOVFL (1 << 2)
434#define STATUS_MIXBOVFL (1 << 3)
435#define STATUS_DSPAOVFL (1 << 4)
436#define STATUS_DSPBOVFL (1 << 5)
437#define STATUS_SPCLKERR (1 << 6)
438#define STATUS_HPDETECT (1 << 7)
439
440#define CPCTL 0x2a
441#define CPCTL_CHGFREQ_MASK (0xf << 0)
442#define CPCTL_CHGFREQ_SHIFT 0
443
444#define HIDDEN2E 0x2e
445#define HIDDEN2E_DEFAULT 0x30
446
447#define HIDDEN32 0x32
448#define HIDDEN32_DEFAULT 0x07
449
450#define HIDDEN33 0x33
451#define HIDDEN33_DEFAULT 0xff
452
453#define HIDDEN34 0x34
454#define HIDDEN34_DEFAULT 0xf8
455
456#define HIDDEN35 0x35
457#define HIDDEN35_DEFAULT 0xdc
458
459#define HIDDEN36 0x36
460#define HIDDEN36_DEFAULT 0xfc
461
462#define HIDDEN37 0x37
463#define HIDDEN37_DEFAULT 0xac
464
465#define HIDDEN3A 0x3a
466#define HIDDEN3A_DEFAULT 0xf8
467
468#define HIDDEN3C 0x3c
469#define HIDDEN3C_DEFAULT 0xd3
470
471#define HIDDEN3D 0x3d
472#define HIDDEN3D_DEFAULT 0x23
473
474#define HIDDEN3E 0x3e
475#define HIDDEN3E_DEFAULT 0x81
476
477#define HIDDEN3F 0x3f
478#define HIDDEN3F_DEFAULT 0x46
479
480
481#endif /* __CS42L55_H__ */
diff --git a/firmware/export/cscodec.h b/firmware/export/cscodec.h
new file mode 100644
index 0000000000..dcf6c30e06
--- /dev/null
+++ b/firmware/export/cscodec.h
@@ -0,0 +1,27 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: wmcodec.h 17847 2008-06-28 18:10:04Z bagder $
9 *
10 * Copyright (C) 2006 by Marcoen Hirschberg
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22unsigned char cscodec_read(int reg);
23void cscodec_write(int reg, unsigned char data);
24void cscodec_power(bool state);
25void cscodec_clock(bool state);
26void cscodec_reset(bool state);
27
diff --git a/firmware/export/i2c-s5l8702.h b/firmware/export/i2c-s5l8702.h
new file mode 100644
index 0000000000..02dc40d89e
--- /dev/null
+++ b/firmware/export/i2c-s5l8702.h
@@ -0,0 +1,32 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: i2c-s5l8700.h 21533 2009-06-27 20:11:11Z bertrik $
9 *
10 * Copyright (C) 2009 by Bertrik Sikken
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef _I2C_S5l8702_H
23#define _I2C_S5l8702_H
24
25#include "config.h"
26
27void i2c_init(void);
28int i2c_write(int bus, unsigned char slave, int address, int len, const unsigned char *data);
29int i2c_read(int bus, unsigned char slave, int address, int len, unsigned char *data);
30
31#endif /* _I2C_S5l8702_H */
32
diff --git a/firmware/export/s5l8702.h b/firmware/export/s5l8702.h
new file mode 100644
index 0000000000..9c7b7e1662
--- /dev/null
+++ b/firmware/export/s5l8702.h
@@ -0,0 +1,631 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: s5l8700.h 28791 2010-12-11 09:39:33Z Buschel $
9 *
10 * Copyright (C) 2008 by Marcoen Hirschberg, Bart van Adrichem
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef __S5L8702_H__
23#define __S5L8702_H__
24
25#include <inttypes.h>
26
27#define REG8_PTR_T volatile uint8_t *
28#define REG16_PTR_T volatile uint16_t *
29#define REG32_PTR_T volatile uint32_t *
30
31//TODO: Figure out
32#define TIMER_FREQ (1843200 * 4 * 26 / 1 / 4) /* 47923200 Hz */
33
34#define CACHEALIGN_BITS (4) /* 2^4 = 16 bytes */
35
36#define DRAM_ORIG 0x08000000
37#define IRAM_ORIG 0
38
39#define DRAM_SIZE (MEMORYSIZE * 0x100000)
40#define IRAM_SIZE 0x40000
41
42#define TTB_SIZE 0x4000
43#define TTB_BASE_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE)
44
45/////SYSCON/////
46#define CLKCON0C (*((uint32_t volatile*)(0x3C50000C)))
47#define PWRCON(i) (*((uint32_t volatile*)(0x3C500000 \
48 + ((i) == 4 ? 0x6C : \
49 ((i) == 3 ? 0x68 : \
50 ((i) == 2 ? 0x58 : \
51 ((i) == 1 ? 0x4C : \
52 0x48)))))))
53
54
55/////TIMER/////
56#define TACON (*((uint32_t volatile*)(0x3C700000)))
57#define TACMD (*((uint32_t volatile*)(0x3C700004)))
58#define TADATA0 (*((uint32_t volatile*)(0x3C700008)))
59#define TADATA1 (*((uint32_t volatile*)(0x3C70000C)))
60#define TAPRE (*((uint32_t volatile*)(0x3C700010)))
61#define TACNT (*((uint32_t volatile*)(0x3C700014)))
62#define TBCON (*((uint32_t volatile*)(0x3C700020)))
63#define TBCMD (*((uint32_t volatile*)(0x3C700024)))
64#define TBDATA0 (*((uint32_t volatile*)(0x3C700028)))
65#define TBDATA1 (*((uint32_t volatile*)(0x3C70002C)))
66#define TBPRE (*((uint32_t volatile*)(0x3C700030)))
67#define TBCNT (*((uint32_t volatile*)(0x3C700034)))
68#define TCCON (*((uint32_t volatile*)(0x3C700040)))
69#define TCCMD (*((uint32_t volatile*)(0x3C700044)))
70#define TCDATA0 (*((uint32_t volatile*)(0x3C700048)))
71#define TCDATA1 (*((uint32_t volatile*)(0x3C70004C)))
72#define TCPRE (*((uint32_t volatile*)(0x3C700050)))
73#define TCCNT (*((uint32_t volatile*)(0x3C700054)))
74#define TDCON (*((uint32_t volatile*)(0x3C700060)))
75#define TDCMD (*((uint32_t volatile*)(0x3C700064)))
76#define TDDATA0 (*((uint32_t volatile*)(0x3C700068)))
77#define TDDATA1 (*((uint32_t volatile*)(0x3C70006C)))
78#define TDPRE (*((uint32_t volatile*)(0x3C700070)))
79#define TDCNT (*((uint32_t volatile*)(0x3C700074)))
80#define TECON (*((uint32_t volatile*)(0x3C7000A0)))
81#define TECMD (*((uint32_t volatile*)(0x3C7000A4)))
82#define TEDATA0 (*((uint32_t volatile*)(0x3C7000A8)))
83#define TEDATA1 (*((uint32_t volatile*)(0x3C7000AC)))
84#define TEPRE (*((uint32_t volatile*)(0x3C7000B0)))
85#define TECNT (*((uint32_t volatile*)(0x3C7000B4)))
86#define TFCON (*((uint32_t volatile*)(0x3C7000C0)))
87#define TFCMD (*((uint32_t volatile*)(0x3C7000C4)))
88#define TFDATA0 (*((uint32_t volatile*)(0x3C7000C8)))
89#define TFDATA1 (*((uint32_t volatile*)(0x3C7000CC)))
90#define TFPRE (*((uint32_t volatile*)(0x3C7000D0)))
91#define TFCNT (*((uint32_t volatile*)(0x3C7000D4)))
92#define TGCON (*((uint32_t volatile*)(0x3C7000E0)))
93#define TGCMD (*((uint32_t volatile*)(0x3C7000E4)))
94#define TGDATA0 (*((uint32_t volatile*)(0x3C7000E8)))
95#define TGDATA1 (*((uint32_t volatile*)(0x3C7000EC)))
96#define TGPRE (*((uint32_t volatile*)(0x3C7000F0)))
97#define TGCNT (*((uint32_t volatile*)(0x3C7000F4)))
98#define THCON (*((uint32_t volatile*)(0x3C700100)))
99#define THCMD (*((uint32_t volatile*)(0x3C700104)))
100#define THDATA0 (*((uint32_t volatile*)(0x3C700108)))
101#define THDATA1 (*((uint32_t volatile*)(0x3C70010C)))
102#define THPRE (*((uint32_t volatile*)(0x3C700110)))
103#define THCNT (*((uint32_t volatile*)(0x3C700114)))
104#define USEC_TIMER TFCNT
105
106
107/////USB/////
108#define OTGBASE 0x38400000
109#define PHYBASE 0x3C400000
110#define SYNOPSYSOTG_CLOCK 0
111#define SYNOPSYSOTG_AHBCFG 0x2B
112
113
114/////I2C/////
115#define IICCON(bus) (*((uint32_t volatile*)(0x3C600000 + 0x300000 * (bus))))
116#define IICSTAT(bus) (*((uint32_t volatile*)(0x3C600004 + 0x300000 * (bus))))
117#define IICADD(bus) (*((uint32_t volatile*)(0x3C600008 + 0x300000 * (bus))))
118#define IICDS(bus) (*((uint32_t volatile*)(0x3C60000C + 0x300000 * (bus))))
119
120
121/////INTERRUPT CONTROLLERS/////
122#define VICIRQSTATUS(v) (*((uint32_t volatile*)(0x38E00000 + 0x1000 * (v))))
123#define VICFIQSTATUS(v) (*((uint32_t volatile*)(0x38E00004 + 0x1000 * (v))))
124#define VICRAWINTR(v) (*((uint32_t volatile*)(0x38E00008 + 0x1000 * (v))))
125#define VICINTSELECT(v) (*((uint32_t volatile*)(0x38E0000C + 0x1000 * (v))))
126#define VICINTENABLE(v) (*((uint32_t volatile*)(0x38E00010 + 0x1000 * (v))))
127#define VICINTENCLEAR(v) (*((uint32_t volatile*)(0x38E00014 + 0x1000 * (v))))
128#define VICSOFTINT(v) (*((uint32_t volatile*)(0x38E00018 + 0x1000 * (v))))
129#define VICSOFTINTCLEAR(v) (*((uint32_t volatile*)(0x38E0001C + 0x1000 * (v))))
130#define VICPROTECTION(v) (*((uint32_t volatile*)(0x38E00020 + 0x1000 * (v))))
131#define VICSWPRIORITYMASK(v) (*((uint32_t volatile*)(0x38E00024 + 0x1000 * (v))))
132#define VICPRIORITYDAISY(v) (*((uint32_t volatile*)(0x38E00028 + 0x1000 * (v))))
133#define VICVECTADDR(v, i) (*((uint32_t volatile*)(0x38E00100 + 0x1000 * (v) + 4 * (i))))
134#define VICVECTPRIORITY(v, i) (*((uint32_t volatile*)(0x38E00200 + 0x1000 * (v) + 4 * (i))))
135#define VICADDRESS(v) (*((const void* volatile*)(0x38E00F00 + 0x1000 * (v))))
136#define VIC0IRQSTATUS (*((uint32_t volatile*)(0x38E00000)))
137#define VIC0FIQSTATUS (*((uint32_t volatile*)(0x38E00004)))
138#define VIC0RAWINTR (*((uint32_t volatile*)(0x38E00008)))
139#define VIC0INTSELECT (*((uint32_t volatile*)(0x38E0000C)))
140#define VIC0INTENABLE (*((uint32_t volatile*)(0x38E00010)))
141#define VIC0INTENCLEAR (*((uint32_t volatile*)(0x38E00014)))
142#define VIC0SOFTINT (*((uint32_t volatile*)(0x38E00018)))
143#define VIC0SOFTINTCLEAR (*((uint32_t volatile*)(0x38E0001C)))
144#define VIC0PROTECTION (*((uint32_t volatile*)(0x38E00020)))
145#define VIC0SWPRIORITYMASK (*((uint32_t volatile*)(0x38E00024)))
146#define VIC0PRIORITYDAISY (*((uint32_t volatile*)(0x38E00028)))
147#define VIC0VECTADDR(i) (*((const void* volatile*)(0x38E00100 + 4 * (i))))
148#define VIC0VECTADDR0 (*((const void* volatile*)(0x38E00100)))
149#define VIC0VECTADDR1 (*((const void* volatile*)(0x38E00104)))
150#define VIC0VECTADDR2 (*((const void* volatile*)(0x38E00108)))
151#define VIC0VECTADDR3 (*((const void* volatile*)(0x38E0010C)))
152#define VIC0VECTADDR4 (*((const void* volatile*)(0x38E00110)))
153#define VIC0VECTADDR5 (*((const void* volatile*)(0x38E00114)))
154#define VIC0VECTADDR6 (*((const void* volatile*)(0x38E00118)))
155#define VIC0VECTADDR7 (*((const void* volatile*)(0x38E0011C)))
156#define VIC0VECTADDR8 (*((const void* volatile*)(0x38E00120)))
157#define VIC0VECTADDR9 (*((const void* volatile*)(0x38E00124)))
158#define VIC0VECTADDR10 (*((const void* volatile*)(0x38E00128)))
159#define VIC0VECTADDR11 (*((const void* volatile*)(0x38E0012C)))
160#define VIC0VECTADDR12 (*((const void* volatile*)(0x38E00130)))
161#define VIC0VECTADDR13 (*((const void* volatile*)(0x38E00134)))
162#define VIC0VECTADDR14 (*((const void* volatile*)(0x38E00138)))
163#define VIC0VECTADDR15 (*((const void* volatile*)(0x38E0013C)))
164#define VIC0VECTADDR16 (*((const void* volatile*)(0x38E00140)))
165#define VIC0VECTADDR17 (*((const void* volatile*)(0x38E00144)))
166#define VIC0VECTADDR18 (*((const void* volatile*)(0x38E00148)))
167#define VIC0VECTADDR19 (*((const void* volatile*)(0x38E0014C)))
168#define VIC0VECTADDR20 (*((const void* volatile*)(0x38E00150)))
169#define VIC0VECTADDR21 (*((const void* volatile*)(0x38E00154)))
170#define VIC0VECTADDR22 (*((const void* volatile*)(0x38E00158)))
171#define VIC0VECTADDR23 (*((const void* volatile*)(0x38E0015C)))
172#define VIC0VECTADDR24 (*((const void* volatile*)(0x38E00160)))
173#define VIC0VECTADDR25 (*((const void* volatile*)(0x38E00164)))
174#define VIC0VECTADDR26 (*((const void* volatile*)(0x38E00168)))
175#define VIC0VECTADDR27 (*((const void* volatile*)(0x38E0016C)))
176#define VIC0VECTADDR28 (*((const void* volatile*)(0x38E00170)))
177#define VIC0VECTADDR29 (*((const void* volatile*)(0x38E00174)))
178#define VIC0VECTADDR30 (*((const void* volatile*)(0x38E00178)))
179#define VIC0VECTADDR31 (*((const void* volatile*)(0x38E0017C)))
180#define VIC0VECTPRIORITY(i) (*((uint32_t volatile*)(0x38E00200 + 4 * (i))))
181#define VIC0VECTPRIORITY0 (*((uint32_t volatile*)(0x38E00200)))
182#define VIC0VECTPRIORITY1 (*((uint32_t volatile*)(0x38E00204)))
183#define VIC0VECTPRIORITY2 (*((uint32_t volatile*)(0x38E00208)))
184#define VIC0VECTPRIORITY3 (*((uint32_t volatile*)(0x38E0020C)))
185#define VIC0VECTPRIORITY4 (*((uint32_t volatile*)(0x38E00210)))
186#define VIC0VECTPRIORITY5 (*((uint32_t volatile*)(0x38E00214)))
187#define VIC0VECTPRIORITY6 (*((uint32_t volatile*)(0x38E00218)))
188#define VIC0VECTPRIORITY7 (*((uint32_t volatile*)(0x38E0021C)))
189#define VIC0VECTPRIORITY8 (*((uint32_t volatile*)(0x38E00220)))
190#define VIC0VECTPRIORITY9 (*((uint32_t volatile*)(0x38E00224)))
191#define VIC0VECTPRIORITY10 (*((uint32_t volatile*)(0x38E00228)))
192#define VIC0VECTPRIORITY11 (*((uint32_t volatile*)(0x38E0022C)))
193#define VIC0VECTPRIORITY12 (*((uint32_t volatile*)(0x38E00230)))
194#define VIC0VECTPRIORITY13 (*((uint32_t volatile*)(0x38E00234)))
195#define VIC0VECTPRIORITY14 (*((uint32_t volatile*)(0x38E00238)))
196#define VIC0VECTPRIORITY15 (*((uint32_t volatile*)(0x38E0023C)))
197#define VIC0VECTPRIORITY16 (*((uint32_t volatile*)(0x38E00240)))
198#define VIC0VECTPRIORITY17 (*((uint32_t volatile*)(0x38E00244)))
199#define VIC0VECTPRIORITY18 (*((uint32_t volatile*)(0x38E00248)))
200#define VIC0VECTPRIORITY19 (*((uint32_t volatile*)(0x38E0024C)))
201#define VIC0VECTPRIORITY20 (*((uint32_t volatile*)(0x38E00250)))
202#define VIC0VECTPRIORITY21 (*((uint32_t volatile*)(0x38E00254)))
203#define VIC0VECTPRIORITY22 (*((uint32_t volatile*)(0x38E00258)))
204#define VIC0VECTPRIORITY23 (*((uint32_t volatile*)(0x38E0025C)))
205#define VIC0VECTPRIORITY24 (*((uint32_t volatile*)(0x38E00260)))
206#define VIC0VECTPRIORITY25 (*((uint32_t volatile*)(0x38E00264)))
207#define VIC0VECTPRIORITY26 (*((uint32_t volatile*)(0x38E00268)))
208#define VIC0VECTPRIORITY27 (*((uint32_t volatile*)(0x38E0026C)))
209#define VIC0VECTPRIORITY28 (*((uint32_t volatile*)(0x38E00270)))
210#define VIC0VECTPRIORITY29 (*((uint32_t volatile*)(0x38E00274)))
211#define VIC0VECTPRIORITY30 (*((uint32_t volatile*)(0x38E00278)))
212#define VIC0VECTPRIORITY31 (*((uint32_t volatile*)(0x38E0027C)))
213#define VIC0ADDRESS (*((void* volatile*)(0x38E00F00)))
214#define VIC1IRQSTATUS (*((uint32_t volatile*)(0x38E01000)))
215#define VIC1FIQSTATUS (*((uint32_t volatile*)(0x38E01004)))
216#define VIC1RAWINTR (*((uint32_t volatile*)(0x38E01008)))
217#define VIC1INTSELECT (*((uint32_t volatile*)(0x38E0100C)))
218#define VIC1INTENABLE (*((uint32_t volatile*)(0x38E01010)))
219#define VIC1INTENCLEAR (*((uint32_t volatile*)(0x38E01014)))
220#define VIC1SOFTINT (*((uint32_t volatile*)(0x38E01018)))
221#define VIC1SOFTINTCLEAR (*((uint32_t volatile*)(0x38E0101C)))
222#define VIC1PROTECTION (*((uint32_t volatile*)(0x38E01020)))
223#define VIC1SWPRIORITYMASK (*((uint32_t volatile*)(0x38E01024)))
224#define VIC1PRIORITYDAISY (*((uint32_t volatile*)(0x38E01028)))
225#define VIC1VECTADDR(i) (*((const void* volatile*)(0x38E01100 + 4 * (i))))
226#define VIC1VECTADDR0 (*((const void* volatile*)(0x38E01100)))
227#define VIC1VECTADDR1 (*((const void* volatile*)(0x38E01104)))
228#define VIC1VECTADDR2 (*((const void* volatile*)(0x38E01108)))
229#define VIC1VECTADDR3 (*((const void* volatile*)(0x38E0110C)))
230#define VIC1VECTADDR4 (*((const void* volatile*)(0x38E01110)))
231#define VIC1VECTADDR5 (*((const void* volatile*)(0x38E01114)))
232#define VIC1VECTADDR6 (*((const void* volatile*)(0x38E01118)))
233#define VIC1VECTADDR7 (*((const void* volatile*)(0x38E0111C)))
234#define VIC1VECTADDR8 (*((const void* volatile*)(0x38E01120)))
235#define VIC1VECTADDR9 (*((const void* volatile*)(0x38E01124)))
236#define VIC1VECTADDR10 (*((const void* volatile*)(0x38E01128)))
237#define VIC1VECTADDR11 (*((const void* volatile*)(0x38E0112C)))
238#define VIC1VECTADDR12 (*((const void* volatile*)(0x38E01130)))
239#define VIC1VECTADDR13 (*((const void* volatile*)(0x38E01134)))
240#define VIC1VECTADDR14 (*((const void* volatile*)(0x38E01138)))
241#define VIC1VECTADDR15 (*((const void* volatile*)(0x38E0113C)))
242#define VIC1VECTADDR16 (*((const void* volatile*)(0x38E01140)))
243#define VIC1VECTADDR17 (*((const void* volatile*)(0x38E01144)))
244#define VIC1VECTADDR18 (*((const void* volatile*)(0x38E01148)))
245#define VIC1VECTADDR19 (*((const void* volatile*)(0x38E0114C)))
246#define VIC1VECTADDR20 (*((const void* volatile*)(0x38E01150)))
247#define VIC1VECTADDR21 (*((const void* volatile*)(0x38E01154)))
248#define VIC1VECTADDR22 (*((const void* volatile*)(0x38E01158)))
249#define VIC1VECTADDR23 (*((const void* volatile*)(0x38E0115C)))
250#define VIC1VECTADDR24 (*((const void* volatile*)(0x38E01160)))
251#define VIC1VECTADDR25 (*((const void* volatile*)(0x38E01164)))
252#define VIC1VECTADDR26 (*((const void* volatile*)(0x38E01168)))
253#define VIC1VECTADDR27 (*((const void* volatile*)(0x38E0116C)))
254#define VIC1VECTADDR28 (*((const void* volatile*)(0x38E01170)))
255#define VIC1VECTADDR29 (*((const void* volatile*)(0x38E01174)))
256#define VIC1VECTADDR30 (*((const void* volatile*)(0x38E01178)))
257#define VIC1VECTADDR31 (*((const void* volatile*)(0x38E0117C)))
258#define VIC1VECTPRIORITY(i) (*((uint32_t volatile*)(0x38E01200 + 4 * (i))))
259#define VIC1VECTPRIORITY0 (*((uint32_t volatile*)(0x38E01200)))
260#define VIC1VECTPRIORITY1 (*((uint32_t volatile*)(0x38E01204)))
261#define VIC1VECTPRIORITY2 (*((uint32_t volatile*)(0x38E01208)))
262#define VIC1VECTPRIORITY3 (*((uint32_t volatile*)(0x38E0120C)))
263#define VIC1VECTPRIORITY4 (*((uint32_t volatile*)(0x38E01210)))
264#define VIC1VECTPRIORITY5 (*((uint32_t volatile*)(0x38E01214)))
265#define VIC1VECTPRIORITY6 (*((uint32_t volatile*)(0x38E01218)))
266#define VIC1VECTPRIORITY7 (*((uint32_t volatile*)(0x38E0121C)))
267#define VIC1VECTPRIORITY8 (*((uint32_t volatile*)(0x38E01220)))
268#define VIC1VECTPRIORITY9 (*((uint32_t volatile*)(0x38E01224)))
269#define VIC1VECTPRIORITY10 (*((uint32_t volatile*)(0x38E01228)))
270#define VIC1VECTPRIORITY11 (*((uint32_t volatile*)(0x38E0122C)))
271#define VIC1VECTPRIORITY12 (*((uint32_t volatile*)(0x38E01230)))
272#define VIC1VECTPRIORITY13 (*((uint32_t volatile*)(0x38E01234)))
273#define VIC1VECTPRIORITY14 (*((uint32_t volatile*)(0x38E01238)))
274#define VIC1VECTPRIORITY15 (*((uint32_t volatile*)(0x38E0123C)))
275#define VIC1VECTPRIORITY16 (*((uint32_t volatile*)(0x38E01240)))
276#define VIC1VECTPRIORITY17 (*((uint32_t volatile*)(0x38E01244)))
277#define VIC1VECTPRIORITY18 (*((uint32_t volatile*)(0x38E01248)))
278#define VIC1VECTPRIORITY19 (*((uint32_t volatile*)(0x38E0124C)))
279#define VIC1VECTPRIORITY20 (*((uint32_t volatile*)(0x38E01250)))
280#define VIC1VECTPRIORITY21 (*((uint32_t volatile*)(0x38E01254)))
281#define VIC1VECTPRIORITY22 (*((uint32_t volatile*)(0x38E01258)))
282#define VIC1VECTPRIORITY23 (*((uint32_t volatile*)(0x38E0125C)))
283#define VIC1VECTPRIORITY24 (*((uint32_t volatile*)(0x38E01260)))
284#define VIC1VECTPRIORITY25 (*((uint32_t volatile*)(0x38E01264)))
285#define VIC1VECTPRIORITY26 (*((uint32_t volatile*)(0x38E01268)))
286#define VIC1VECTPRIORITY27 (*((uint32_t volatile*)(0x38E0126C)))
287#define VIC1VECTPRIORITY28 (*((uint32_t volatile*)(0x38E01270)))
288#define VIC1VECTPRIORITY29 (*((uint32_t volatile*)(0x38E01274)))
289#define VIC1VECTPRIORITY30 (*((uint32_t volatile*)(0x38E01278)))
290#define VIC1VECTPRIORITY31 (*((uint32_t volatile*)(0x38E0127C)))
291#define VIC1ADDRESS (*((void* volatile*)(0x38E01F00)))
292
293
294/////GPIO/////
295#define PCON(i) (*((uint32_t volatile*)(0x3cf00000 + ((i) << 5))))
296#define PDAT(i) (*((uint32_t volatile*)(0x3cf00004 + ((i) << 5))))
297#define PUNA(i) (*((uint32_t volatile*)(0x3cf00008 + ((i) << 5))))
298#define PUNB(i) (*((uint32_t volatile*)(0x3cf0000c + ((i) << 5))))
299#define PCON0 (*((uint32_t volatile*)(0x3cf00000)))
300#define PDAT0 (*((uint32_t volatile*)(0x3cf00004)))
301#define PCON1 (*((uint32_t volatile*)(0x3cf00020)))
302#define PDAT1 (*((uint32_t volatile*)(0x3cf00024)))
303#define PCON2 (*((uint32_t volatile*)(0x3cf00040)))
304#define PDAT2 (*((uint32_t volatile*)(0x3cf00044)))
305#define PCON3 (*((uint32_t volatile*)(0x3cf00060)))
306#define PDAT3 (*((uint32_t volatile*)(0x3cf00064)))
307#define PCON4 (*((uint32_t volatile*)(0x3cf00080)))
308#define PDAT4 (*((uint32_t volatile*)(0x3cf00084)))
309#define PCON5 (*((uint32_t volatile*)(0x3cf000a0)))
310#define PDAT5 (*((uint32_t volatile*)(0x3cf000a4)))
311#define PCON6 (*((uint32_t volatile*)(0x3cf000c0)))
312#define PDAT6 (*((uint32_t volatile*)(0x3cf000c4)))
313#define PCON7 (*((uint32_t volatile*)(0x3cf000e0)))
314#define PDAT7 (*((uint32_t volatile*)(0x3cf000e4)))
315#define PCON8 (*((uint32_t volatile*)(0x3cf00100)))
316#define PDAT8 (*((uint32_t volatile*)(0x3cf00104)))
317#define PCON9 (*((uint32_t volatile*)(0x3cf00120)))
318#define PDAT9 (*((uint32_t volatile*)(0x3cf00124)))
319#define PCONA (*((uint32_t volatile*)(0x3cf00140)))
320#define PDATA (*((uint32_t volatile*)(0x3cf00144)))
321#define PCONB (*((uint32_t volatile*)(0x3cf00160)))
322#define PDATB (*((uint32_t volatile*)(0x3cf00164)))
323#define PCONC (*((uint32_t volatile*)(0x3cf00180)))
324#define PDATC (*((uint32_t volatile*)(0x3cf00184)))
325#define PCOND (*((uint32_t volatile*)(0x3cf001a0)))
326#define PDATD (*((uint32_t volatile*)(0x3cf001a4)))
327#define PCONE (*((uint32_t volatile*)(0x3cf001c0)))
328#define PDATE (*((uint32_t volatile*)(0x3cf001c4)))
329#define PCONF (*((uint32_t volatile*)(0x3cf001e0)))
330#define PDATF (*((uint32_t volatile*)(0x3cf001e4)))
331#define GPIOCMD (*((uint32_t volatile*)(0x3cf00200)))
332
333
334/////SPI/////
335#define SPIBASE(i) ((i) == 2 ? 0x3d200000 : \
336 (i) == 1 ? 0x3ce00000 : \
337 0x3c300000)
338#define SPICLKGATE(i) ((i) == 2 ? 0x2f : \
339 (i) == 1 ? 0x2b : \
340 0x22)
341#define SPIDMA(i) ((i) == 2 ? 0xd : \
342 (i) == 1 ? 0xf : \
343 0x5)
344#define SPICTRL(i) (*((uint32_t volatile*)(SPIBASE(i))))
345#define SPISETUP(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x4)))
346#define SPISTATUS(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x8)))
347#define SPIUNKREG1(i) (*((uint32_t volatile*)(SPIBASE(i) + 0xc)))
348#define SPITXDATA(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x10)))
349#define SPIRXDATA(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x20)))
350#define SPICLKDIV(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x30)))
351#define SPIRXLIMIT(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x34)))
352#define SPIUNKREG3(i) (*((uint32_t volatile*)(SPIBASE(i) + 0x38)))
353
354
355/////AES/////
356#define AESCONTROL (*((uint32_t volatile*)(0x38c00000)))
357#define AESGO (*((uint32_t volatile*)(0x38c00004)))
358#define AESUNKREG0 (*((uint32_t volatile*)(0x38c00008)))
359#define AESSTATUS (*((uint32_t volatile*)(0x38c0000c)))
360#define AESUNKREG1 (*((uint32_t volatile*)(0x38c00010)))
361#define AESKEYLEN (*((uint32_t volatile*)(0x38c00014)))
362#define AESOUTSIZE (*((uint32_t volatile*)(0x38c00018)))
363#define AESOUTADDR (*((void* volatile*)(0x38c00020)))
364#define AESINSIZE (*((uint32_t volatile*)(0x38c00024)))
365#define AESINADDR (*((const void* volatile*)(0x38c00028)))
366#define AESAUXSIZE (*((uint32_t volatile*)(0x38c0002c)))
367#define AESAUXADDR (*((void* volatile*)(0x38c00030)))
368#define AESSIZE3 (*((uint32_t volatile*)(0x38c00034)))
369#define AESKEY ((uint32_t volatile*)(0x38c0004c))
370#define AESTYPE (*((uint32_t volatile*)(0x38c0006c)))
371#define AESIV ((uint32_t volatile*)(0x38c00074))
372#define AESTYPE2 (*((uint32_t volatile*)(0x38c00088)))
373#define AESUNKREG2 (*((uint32_t volatile*)(0x38c0008c)))
374
375
376/////SHA1/////
377#define SHA1CONFIG (*((uint32_t volatile*)(0x38000000)))
378#define SHA1RESET (*((uint32_t volatile*)(0x38000004)))
379#define SHA1RESULT ((uint32_t volatile*)(0x38000020))
380#define SHA1DATAIN ((uint32_t volatile*)(0x38000040))
381
382
383/////DMA/////
384#ifndef ASM
385struct dma_lli
386{
387 const void* srcaddr;
388 void* dstaddr;
389 const struct dma_lli* nextlli;
390 uint32_t control;
391};
392#endif
393#define DMACINTSTS(d) (*((uint32_t volatile*)(0x38200000 + 0x1700000 * (d))))
394#define DMACINTTCSTS(d) (*((uint32_t volatile*)(0x38200004 + 0x1700000 * (d))))
395#define DMACINTTCCLR(d) (*((uint32_t volatile*)(0x38200008 + 0x1700000 * (d))))
396#define DMACINTERRSTS(d) (*((uint32_t volatile*)(0x3820000c + 0x1700000 * (d))))
397#define DMACINTERRCLR(d) (*((uint32_t volatile*)(0x38200010 + 0x1700000 * (d))))
398#define DMACRAWINTTCSTS(d) (*((uint32_t volatile*)(0x38200014 + 0x1700000 * (d))))
399#define DMACRAWINTERRSTS(d) (*((uint32_t volatile*)(0x38200018 + 0x1700000 * (d))))
400#define DMACENABLEDCHANS(d) (*((uint32_t volatile*)(0x3820001c + 0x1700000 * (d))))
401#define DMACSOFTBREQ(d) (*((uint32_t volatile*)(0x38200020 + 0x1700000 * (d))))
402#define DMACSOFTSREQ(d) (*((uint32_t volatile*)(0x38200024 + 0x1700000 * (d))))
403#define DMACSOFTLBREQ(d) (*((uint32_t volatile*)(0x38200028 + 0x1700000 * (d))))
404#define DMACSOFTLSREQ(d) (*((uint32_t volatile*)(0x3820002c + 0x1700000 * (d))))
405#define DMACCONFIG(d) (*((uint32_t volatile*)(0x38200030 + 0x1700000 * (d))))
406#define DMACSYNC(d) (*((uint32_t volatile*)(0x38200034 + 0x1700000 * (d))))
407#define DMACCLLI(d, c) (*((struct dma_lli volatile*)(0x38200100 + 0x1700000 * (d) + 0x20 * (c))))
408#define DMACCSRCADDR(d, c) (*((const void* volatile*)(0x38200100 + 0x1700000 * (d) + 0x20 * (c))))
409#define DMACCDESTADDR(d, c) (*((void* volatile*)(0x38200104 + 0x1700000 * (d) + 0x20 * (c))))
410#define DMACCNEXTLLI(d, c) (*((const void* volatile*)(0x38200108 + 0x1700000 * (d) + 0x20 * (c))))
411#define DMACCCONTROL(d, c) (*((uint32_t volatile*)(0x3820010c + 0x1700000 * (d) + 0x20 * (c))))
412#define DMACCCONFIG(d, c) (*((uint32_t volatile*)(0x38200110 + 0x1700000 * (d) + 0x20 * (c))))
413#define DMAC0INTSTS (*((uint32_t volatile*)(0x38200000)))
414#define DMAC0INTTCSTS (*((uint32_t volatile*)(0x38200004)))
415#define DMAC0INTTCCLR (*((uint32_t volatile*)(0x38200008)))
416#define DMAC0INTERRSTS (*((uint32_t volatile*)(0x3820000c)))
417#define DMAC0INTERRCLR (*((uint32_t volatile*)(0x38200010)))
418#define DMAC0RAWINTTCSTS (*((uint32_t volatile*)(0x38200014)))
419#define DMAC0RAWINTERRSTS (*((uint32_t volatile*)(0x38200018)))
420#define DMAC0ENABLEDCHANS (*((uint32_t volatile*)(0x3820001c)))
421#define DMAC0SOFTBREQ (*((uint32_t volatile*)(0x38200020)))
422#define DMAC0SOFTSREQ (*((uint32_t volatile*)(0x38200024)))
423#define DMAC0SOFTLBREQ (*((uint32_t volatile*)(0x38200028)))
424#define DMAC0SOFTLSREQ (*((uint32_t volatile*)(0x3820002c)))
425#define DMAC0CONFIG (*((uint32_t volatile*)(0x38200030)))
426#define DMAC0SYNC (*((uint32_t volatile*)(0x38200034)))
427#define DMAC0CLLI(c) (*((struct dma_lli volatile*)(0x38200100 + 0x20 * (c))))
428#define DMAC0CSRCADDR(c) (*((const void* volatile*)(0x38200100 + 0x20 * (c))))
429#define DMAC0CDESTADDR(c) (*((void* volatile*)(0x38200104 + 0x20 * (c))))
430#define DMAC0CNEXTLLI(c) (*((const void* volatile*)(0x38200108 + 0x20 * (c))))
431#define DMAC0CCONTROL(c) (*((uint32_t volatile*)(0x3820010c + 0x20 * (c))))
432#define DMAC0CCONFIG(c) (*((uint32_t volatile*)(0x38200110 + 0x20 * (c))))
433#define DMAC0C0LLI (*((struct dma_lli volatile*)(0x38200100)))
434#define DMAC0C0SRCADDR (*((const void* volatile*)(0x38200100)))
435#define DMAC0C0DESTADDR (*((void* volatile*)(0x38200104)))
436#define DMAC0C0NEXTLLI (*((const struct dma_lli* volatile*)(0x38200108)))
437#define DMAC0C0CONTROL (*((uint32_t volatile*)(0x3820010c)))
438#define DMAC0C0CONFIG (*((uint32_t volatile*)(0x38200110)))
439#define DMAC0C1LLI (*((struct dma_lli volatile*)(0x38200120)))
440#define DMAC0C1SRCADDR (*((const void* volatile*)(0x38200120)))
441#define DMAC0C1DESTADDR (*((void* volatile*)(0x38200124)))
442#define DMAC0C1NEXTLLI (*((const struct dma_lli* volatile*)(0x38200128)))
443#define DMAC0C1CONTROL (*((uint32_t volatile*)(0x3820012c)))
444#define DMAC0C1CONFIG (*((uint32_t volatile*)(0x38200130)))
445#define DMAC0C2LLI (*((struct dma_lli volatile*)(0x38200140)))
446#define DMAC0C2SRCADDR (*((const void* volatile*)(0x38200140)))
447#define DMAC0C2DESTADDR (*((void* volatile*)(0x38200144)))
448#define DMAC0C2NEXTLLI (*((const struct dma_lli* volatile*)(0x38200148)))
449#define DMAC0C2CONTROL (*((uint32_t volatile*)(0x3820014c)))
450#define DMAC0C2CONFIG (*((uint32_t volatile*)(0x38200150)))
451#define DMAC0C3LLI (*((struct dma_lli volatile*)(0x38200160)))
452#define DMAC0C3SRCADDR (*((const void* volatile*)(0x38200160)))
453#define DMAC0C3DESTADDR (*((void* volatile*)(0x38200164)))
454#define DMAC0C3NEXTLLI (*((const struct dma_lli* volatile*)(0x38200168)))
455#define DMAC0C3CONTROL (*((uint32_t volatile*)(0x3820016c)))
456#define DMAC0C3CONFIG (*((uint32_t volatile*)(0x38200170)))
457#define DMAC0C4LLI (*((struct dma_lli volatile*)(0x38200180)))
458#define DMAC0C4SRCADDR (*((const void* volatile*)(0x38200180)))
459#define DMAC0C4DESTADDR (*((void* volatile*)(0x38200184)))
460#define DMAC0C4NEXTLLI (*((const struct dma_lli* volatile*)(0x38200188)))
461#define DMAC0C4CONTROL (*((uint32_t volatile*)(0x3820018c)))
462#define DMAC0C4CONFIG (*((uint32_t volatile*)(0x38200190)))
463#define DMAC0C5LLI (*((struct dma_lli volatile*)(0x382001a0)))
464#define DMAC0C5SRCADDR (*((const void* volatile*)(0x382001a0)))
465#define DMAC0C5DESTADDR (*((void* volatile*)(0x382001a4)))
466#define DMAC0C5NEXTLLI (*((const struct dma_lli* volatile*)(0x382001a8)))
467#define DMAC0C5CONTROL (*((uint32_t volatile*)(0x382001ac)))
468#define DMAC0C5CONFIG (*((uint32_t volatile*)(0x382001b0)))
469#define DMAC0C6LLI (*((struct dma_lli volatile*)(0x382001c0)))
470#define DMAC0C6SRCADDR (*((const void* volatile*)(0x382001c0)))
471#define DMAC0C6DESTADDR (*((void* volatile*)(0x382001c4)))
472#define DMAC0C6NEXTLLI (*((const struct dma_lli* volatile*)(0x382001c8)))
473#define DMAC0C6CONTROL (*((uint32_t volatile*)(0x382001cc)))
474#define DMAC0C6CONFIG (*((uint32_t volatile*)(0x382001d0)))
475#define DMAC0C7LLI (*((struct dma_lli volatile*)(0x382001e0)))
476#define DMAC0C7SRCADDR (*((const void* volatile*)(0x382001e0)))
477#define DMAC0C7DESTADDR (*((void* volatile*)(0x382001e4)))
478#define DMAC0C7NEXTLLI (*((const struct dma_lli* volatile*)(0x382001e8)))
479#define DMAC0C7CONTROL (*((uint32_t volatile*)(0x382001ec)))
480#define DMAC0C7CONFIG (*((uint32_t volatile*)(0x382001f0)))
481#define DMAC1INTSTS (*((uint32_t volatile*)(0x39900000)))
482#define DMAC1INTTCSTS (*((uint32_t volatile*)(0x39900004)))
483#define DMAC1INTTCCLR (*((uint32_t volatile*)(0x39900008)))
484#define DMAC1INTERRSTS (*((uint32_t volatile*)(0x3990000c)))
485#define DMAC1INTERRCLR (*((uint32_t volatile*)(0x39900010)))
486#define DMAC1RAWINTTCSTS (*((uint32_t volatile*)(0x39900014)))
487#define DMAC1RAWINTERRSTS (*((uint32_t volatile*)(0x39900018)))
488#define DMAC1ENABLEDCHANS (*((uint32_t volatile*)(0x3990001c)))
489#define DMAC1SOFTBREQ (*((uint32_t volatile*)(0x39900020)))
490#define DMAC1SOFTSREQ (*((uint32_t volatile*)(0x39900024)))
491#define DMAC1SOFTLBREQ (*((uint32_t volatile*)(0x39900028)))
492#define DMAC1SOFTLSREQ (*((uint32_t volatile*)(0x3990002c)))
493#define DMAC1CONFIG (*((uint32_t volatile*)(0x39900030)))
494#define DMAC1SYNC (*((uint32_t volatile*)(0x39900034)))
495#define DMAC1CLLI(c) (*((struct dma_lli volatile*)(0x39900100 + 0x20 * (c))))
496#define DMAC1CSRCADDR(c) (*((const void* volatile*)(0x39900100 + 0x20 * (c))))
497#define DMAC1CDESTADDR(c) (*((void* volatile*)(0x39900104 + 0x20 * (c))))
498#define DMAC1CNEXTLLI(c) (*((const void* volatile*)(0x39900108 + 0x20 * (c))))
499#define DMAC1CCONTROL(c) (*((uint32_t volatile*)(0x3990010c + 0x20 * (c))))
500#define DMAC1CCONFIG(c) (*((uint32_t volatile*)(0x39900110 + 0x20 * (c))))
501#define DMAC1C0LLI (*((struct dma_lli volatile*)(0x39900100)))
502#define DMAC1C0SRCADDR (*((const void* volatile*)(0x39900100)))
503#define DMAC1C0DESTADDR (*((void* volatile*)(0x39900104)))
504#define DMAC1C0NEXTLLI (*((const struct dma_lli* volatile*)(0x39900108)))
505#define DMAC1C0CONTROL (*((uint32_t volatile*)(0x3990010c)))
506#define DMAC1C0CONFIG (*((uint32_t volatile*)(0x39900110)))
507#define DMAC1C1LLI (*((struct dma_lli volatile*)(0x39900120)))
508#define DMAC1C1SRCADDR (*((const void* volatile*)(0x39900120)))
509#define DMAC1C1DESTADDR (*((void* volatile*)(0x39900124)))
510#define DMAC1C1NEXTLLI (*((const struct dma_lli* volatile*)(0x39900128)))
511#define DMAC1C1CONTROL (*((uint32_t volatile*)(0x3990012c)))
512#define DMAC1C1CONFIG (*((uint32_t volatile*)(0x39900130)))
513#define DMAC1C2LLI (*((struct dma_lli volatile*)(0x39900140)))
514#define DMAC1C2SRCADDR (*((const void* volatile*)(0x39900140)))
515#define DMAC1C2DESTADDR (*((void* volatile*)(0x39900144)))
516#define DMAC1C2NEXTLLI (*((const struct dma_lli* volatile*)(0x39900148)))
517#define DMAC1C2CONTROL (*((uint32_t volatile*)(0x3990014c)))
518#define DMAC1C2CONFIG (*((uint32_t volatile*)(0x39900150)))
519#define DMAC1C3LLI (*((struct dma_lli volatile*)(0x39900160)))
520#define DMAC1C3SRCADDR (*((const void* volatile*)(0x39900160)))
521#define DMAC1C3DESTADDR (*((void* volatile*)(0x39900164)))
522#define DMAC1C3NEXTLLI (*((volatile void**)(0x39900168)))
523#define DMAC1C3CONTROL (*((uint32_t volatile*)(0x3990016c)))
524#define DMAC1C3CONFIG (*((uint32_t volatile*)(0x39900170)))
525#define DMAC1C4LLI (*((struct dma_lli volatile*)(0x39900180)))
526#define DMAC1C4SRCADDR (*((const void* volatile*)(0x39900180)))
527#define DMAC1C4DESTADDR (*((void* volatile*)(0x39900184)))
528#define DMAC1C4NEXTLLI (*((const struct dma_lli* volatile*)(0x39900188)))
529#define DMAC1C4CONTROL (*((uint32_t volatile*)(0x3990018c)))
530#define DMAC1C4CONFIG (*((uint32_t volatile*)(0x39900190)))
531#define DMAC1C5LLI (*((struct dma_lli volatile*)(0x399001a0)))
532#define DMAC1C5SRCADDR (*((const void* volatile*)(0x399001a0)))
533#define DMAC1C5DESTADDR (*((void* volatile*)(0x399001a4)))
534#define DMAC1C5NEXTLLI (*((const struct dma_lli* volatile*)(0x399001a8)))
535#define DMAC1C5CONTROL (*((uint32_t volatile*)(0x399001ac)))
536#define DMAC1C5CONFIG (*((uint32_t volatile*)(0x399001b0)))
537#define DMAC1C6LLI (*((struct dma_lli volatile*)(0x399001c0)))
538#define DMAC1C6SRCADDR (*((const void* volatile*)(0x399001c0)))
539#define DMAC1C6DESTADDR (*((void* volatile*)(0x399001c4)))
540#define DMAC1C6NEXTLLI (*((const struct dma_lli* volatile*)(0x399001c8)))
541#define DMAC1C6CONTROL (*((uint32_t volatile*)(0x399001cc)))
542#define DMAC1C6CONFIG (*((uint32_t volatile*)(0x399001d0)))
543#define DMAC1C7LLI (*((struct dma_lli volatile*)(0x399001e0)))
544#define DMAC1C7SRCADDR (*((const void* volatile*)(0x399001e0)))
545#define DMAC1C7DESTADDR (*((void* volatile*)(0x399001e4)))
546#define DMAC1C7NEXTLLI (*((const struct dma_lli* volatile*)(0x399001e8)))
547#define DMAC1C7CONTROL (*((uint32_t volatile*)(0x399001ec)))
548#define DMAC1C7CONFIG (*((uint32_t volatile*)(0x399001f0)))
549
550
551/////LCD/////
552#define LCD_BASE (*((uint32_t volatile*)(0x38300000)))
553#define LCD_WCMD (*((uint32_t volatile*)(0x38300004)))
554#define LCD_STATUS (*((uint32_t volatile*)(0x3830001c)))
555#define LCD_WDATA (*((uint32_t volatile*)(0x38300040)))
556
557
558/////ATA/////
559#define ATA_CCONTROL (*((uint32_t volatile*)(0x38700000)))
560#define ATA_CSTATUS (*((uint32_t volatile*)(0x38700004)))
561#define ATA_CCOMMAND (*((uint32_t volatile*)(0x38700008)))
562#define ATA_SWRST (*((uint32_t volatile*)(0x3870000c)))
563#define ATA_IRQ (*((uint32_t volatile*)(0x38700010)))
564#define ATA_IRQ_MASK (*((uint32_t volatile*)(0x38700014)))
565#define ATA_CFG (*((uint32_t volatile*)(0x38700018)))
566#define ATA_MDMA_TIME (*((uint32_t volatile*)(0x38700028)))
567#define ATA_PIO_TIME (*((uint32_t volatile*)(0x3870002c)))
568#define ATA_UDMA_TIME (*((uint32_t volatile*)(0x38700030)))
569#define ATA_XFR_NUM (*((uint32_t volatile*)(0x38700034)))
570#define ATA_XFR_CNT (*((uint32_t volatile*)(0x38700038)))
571#define ATA_TBUF_START (*((void* volatile*)(0x3870003c)))
572#define ATA_TBUF_SIZE (*((uint32_t volatile*)(0x38700040)))
573#define ATA_SBUF_START (*((void* volatile*)(0x38700044)))
574#define ATA_SBUF_SIZE (*((uint32_t volatile*)(0x38700048)))
575#define ATA_CADR_TBUF (*((void* volatile*)(0x3870004c)))
576#define ATA_CADR_SBUF (*((void* volatile*)(0x38700050)))
577#define ATA_DATA ((uint32_t volatile*)(0x38700054))
578#define ATA_ERROR ((uint32_t volatile*)(0x38700058))
579#define ATA_NSECTOR ((uint32_t volatile*)(0x3870005c))
580#define ATA_SECTOR ((uint32_t volatile*)(0x38700060))
581#define ATA_LCYL ((uint32_t volatile*)(0x38700064))
582#define ATA_HCYL ((uint32_t volatile*)(0x38700068))
583#define ATA_SELECT ((uint32_t volatile*)(0x3870006c))
584#define ATA_COMMAND ((uint32_t volatile*)(0x38700070))
585#define ATA_CONTROL ((uint32_t volatile*)(0x38700074))
586#define ATA_PIO_READY (*((uint32_t volatile*)(0x38700078)))
587#define ATA_PIO_RDATA (*((uint32_t volatile*)(0x3870007c)))
588#define ATA_BUS_FIFO_STATUS (*((uint32_t volatile*)(0x38700080)))
589#define ATA_FIFO_STATUS (*((uint32_t volatile*)(0x38700084)))
590#define ATA_DMA_ADDR (*((void* volatile*)(0x38700088)))
591
592
593/////CLICKWHEEL/////
594#define WHEEL00 (*((uint32_t volatile*)(0x3C200000)))
595#define WHEEL04 (*((uint32_t volatile*)(0x3C200004)))
596#define WHEEL08 (*((uint32_t volatile*)(0x3C200008)))
597#define WHEEL0C (*((uint32_t volatile*)(0x3C20000C)))
598#define WHEEL10 (*((uint32_t volatile*)(0x3C200010)))
599#define WHEELINT (*((uint32_t volatile*)(0x3C200014)))
600#define WHEELRX (*((uint32_t volatile*)(0x3C200018)))
601#define WHEELTX (*((uint32_t volatile*)(0x3C20001C)))
602
603
604/////I2S/////
605#define I2SCLKCON (*((volatile uint32_t*)(0x3CA00000)))
606#define I2STXCON (*((volatile uint32_t*)(0x3CA00004)))
607#define I2STXCOM (*((volatile uint32_t*)(0x3CA00008)))
608#define I2STXDB0 (*((volatile uint32_t*)(0x3CA00010)))
609#define I2SRXCON (*((volatile uint32_t*)(0x3CA00030)))
610#define I2SRXCOM (*((volatile uint32_t*)(0x3CA00034)))
611#define I2SRXDB (*((volatile uint32_t*)(0x3CA00038)))
612#define I2SSTATUS (*((volatile uint32_t*)(0x3CA0003C)))
613#define I2S40 (*((volatile uint32_t*)(0x3CA00040)))
614
615
616/////CLOCK GATES/////
617#define CLOCKGATE_USB_1 2
618#define CLOCKGATE_USB_2 35
619
620
621/////INTERRUPTS/////
622#define IRQ_TIMER 8
623#define IRQ_USB_FUNC 19
624#define IRQ_DMAC(d) 16 + d
625#define IRQ_DMAC0 16
626#define IRQ_DMAC1 17
627#define IRQ_WHEEL 23
628#define IRQ_ATA 29
629
630
631#endif
diff --git a/firmware/target/arm/mmu-arm.S b/firmware/target/arm/mmu-arm.S
index 5693ca587b..24abfec1a7 100644
--- a/firmware/target/arm/mmu-arm.S
+++ b/firmware/target/arm/mmu-arm.S
@@ -18,6 +18,7 @@
18 * KIND, either express or implied. 18 * KIND, either express or implied.
19 * 19 *
20 ****************************************************************************/ 20 ****************************************************************************/
21#define ASM
21#include "config.h" 22#include "config.h"
22#include "cpu.h" 23#include "cpu.h"
23 24
@@ -27,7 +28,7 @@
27/* MMU present but unused */ 28/* MMU present but unused */
28#define HAVE_TEST_AND_CLEAN_CACHE 29#define HAVE_TEST_AND_CLEAN_CACHE
29 30
30#elif CONFIG_CPU == DM320 || CONFIG_CPU == AS3525v2 31#elif CONFIG_CPU == DM320 || CONFIG_CPU == AS3525v2 || CONFIG_CPU == S5L8702
31#define USE_MMU 32#define USE_MMU
32#define HAVE_TEST_AND_CLEAN_CACHE 33#define HAVE_TEST_AND_CLEAN_CACHE
33 34
diff --git a/firmware/target/arm/s5l8700/ipodnano2g/piezo-nano2g.c b/firmware/target/arm/s5l8700/ipodnano2g/piezo-nano2g.c
new file mode 100644
index 0000000000..b41790833f
--- /dev/null
+++ b/firmware/target/arm/s5l8700/ipodnano2g/piezo-nano2g.c
@@ -0,0 +1,95 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006-2007 Robert Keevil
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19
20#include "system.h"
21#include "kernel.h"
22#include "piezo.h"
23
24static unsigned int duration;
25static bool beeping;
26
27void INT_TIMERD(void)
28{
29 /* clear interrupt */
30 TDCON = TDCON;
31 if (!(--duration))
32 {
33 beeping = 0;
34 TDCMD = (1 << 1); /* TD_CLR */
35 }
36}
37
38void piezo_start(unsigned short cycles, unsigned short periods)
39{
40#ifndef SIMULATOR
41 duration = periods;
42 beeping = 1;
43 /* configure timer for 100 kHz */
44 TDCMD = (1 << 1); /* TD_CLR */
45 TDPRE = 30 - 1; /* prescaler */
46 TDCON = (1 << 13) | /* TD_INT1_EN */
47 (0 << 12) | /* TD_INT0_EN */
48 (0 << 11) | /* TD_START */
49 (2 << 8) | /* TD_CS = PCLK / 16 */
50 (1 << 4); /* TD_MODE_SEL = PWM mode */
51 TDDATA0 = cycles; /* set interval period */
52 TDDATA1 = cycles << 1; /* set interval period */
53 TDCMD = (1 << 0); /* TD_EN */
54
55 /* enable timer interrupt */
56 INTMSK |= INTMSK_TIMERD;
57#endif
58}
59
60void piezo_stop(void)
61{
62#ifndef SIMULATOR
63 TDCMD = (1 << 1); /* TD_CLR */
64#endif
65}
66
67void piezo_clear(void)
68{
69 piezo_stop();
70}
71
72bool piezo_busy(void)
73{
74 return beeping;
75}
76
77void piezo_init(void)
78{
79 beeping = 0;
80}
81
82void piezo_button_beep(bool beep, bool force)
83{
84 if (force)
85 while (beeping)
86 yield();
87
88 if (!beeping)
89 {
90 if (beep)
91 piezo_start(22, 457);
92 else
93 piezo_start(40, 4);
94 }
95}
diff --git a/firmware/target/arm/s5l8700/ipodnano2g/piezo.h b/firmware/target/arm/s5l8700/ipodnano2g/piezo.h
new file mode 100644
index 0000000000..d9837cc6a9
--- /dev/null
+++ b/firmware/target/arm/s5l8700/ipodnano2g/piezo.h
@@ -0,0 +1,24 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2006-2007 Robert Keevil
11 *
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
14 *
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
17 *
18 ****************************************************************************/
19
20void piezo_init(void);
21void piezo_stop(void);
22void piezo_clear(void);
23bool piezo_busy(void);
24void piezo_button_beep(bool beep, bool force);
diff --git a/firmware/target/arm/s5l8702/app.lds b/firmware/target/arm/s5l8702/app.lds
new file mode 100644
index 0000000000..fafdea4cd9
--- /dev/null
+++ b/firmware/target/arm/s5l8702/app.lds
@@ -0,0 +1,142 @@
1#define ASM
2#include "config.h"
3#include "cpu.h"
4
5ENTRY(start)
6
7OUTPUT_FORMAT(elf32-littlearm)
8OUTPUT_ARCH(arm)
9STARTUP(target/arm/s5l8702/crt0.o)
10
11#define PLUGINSIZE PLUGIN_BUFFER_SIZE
12#define CODECSIZE CODEC_SIZE
13
14#define IRAMORIG 0x0
15#define DRAMORIG 0x08000000
16
17/* End of the audio buffer, where the codec buffer starts */
18#define ENDAUDIOADDR (DRAMORIG + DRAMSIZE)
19
20#define DRAMSIZE (DRAM_SIZE - PLUGINSIZE - CODECSIZE - TTB_SIZE)
21#define CODECORIG (ENDAUDIOADDR)
22#define IRAMSIZE (56*1024) /* 256KB total - 56KB for core, 200KB for codecs */
23
24/* Where the codec buffer ends, and the plugin buffer starts */
25#define ENDADDR (ENDAUDIOADDR + CODECSIZE)
26
27MEMORY
28{
29 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
30 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
31}
32
33SECTIONS
34{
35 loadaddress = DRAMORIG;
36
37 .intvect : {
38 _intvectstart = . ;
39 *(.intvect)
40 _intvectend = _newstart ;
41 } >IRAM AT> DRAM
42 _intvectcopy = LOADADDR(.intvect) ;
43
44 .text :
45 {
46 _loadaddress = .;
47 _textstart = .;
48 *(.init.text)
49 *(.text)
50 *(.text*)
51 *(.glue_7)
52 *(.glue_7t)
53 . = ALIGN(0x4);
54 } > DRAM
55
56 .rodata :
57 {
58 *(.rodata*)
59 . = ALIGN(0x4);
60 } > DRAM
61
62 .data :
63 {
64 *(.data*)
65 . = ALIGN(0x4);
66 } > DRAM
67
68 /DISCARD/ :
69 {
70 *(.eh_frame)
71 }
72
73 .iram :
74 {
75 _iramstart = .;
76 *(.icode)
77 *(.irodata)
78 *(.idata)
79 . = ALIGN(0x4);
80 _iramend = .;
81 } > IRAM AT> DRAM
82 _iramcopy = LOADADDR(.iram) ;
83
84 .ibss (NOLOAD) :
85 {
86 _iedata = .;
87 *(.qharray)
88 *(.ibss)
89 . = ALIGN(0x4);
90 _iend = .;
91 } > IRAM
92
93 .stack (NOLOAD) :
94 {
95 *(.stack)
96 stackbegin = .;
97 _stackbegin = .;
98 . += 0x4000;
99 stackend = .;
100 _stackend = .;
101 _irqstackbegin = .;
102 . += 0x400;
103 _irqstackend = .;
104 _fiqstackbegin = .;
105 . += 0x400;
106 _fiqstackend = .;
107 } > IRAM
108
109 .bss (NOLOAD) :
110 {
111 _edata = .;
112 *(.bss*)
113 *(COMMON)
114 . = ALIGN(0x4);
115 _end = .;
116 } > DRAM
117
118 .audiobuf (NOLOAD) :
119 {
120 . = ALIGN(4);
121 _audiobuffer = .;
122 audiobuffer = .;
123 } > DRAM
124
125 .audiobufend ENDAUDIOADDR (NOLOAD) :
126 {
127 audiobufend = .;
128 _audiobufend = .;
129 } > DRAM
130
131 .codec CODECORIG (NOLOAD) :
132 {
133 codecbuf = .;
134 _codecbuf = .;
135 } > DRAM
136
137 .plugin ENDADDR (NOLOAD) :
138 {
139 _pluginbuf = .;
140 pluginbuf = .;
141 }
142}
diff --git a/firmware/target/arm/s5l8702/boot.lds b/firmware/target/arm/s5l8702/boot.lds
new file mode 100644
index 0000000000..9741cee45e
--- /dev/null
+++ b/firmware/target/arm/s5l8702/boot.lds
@@ -0,0 +1,94 @@
1#define ASM
2#include "config.h"
3
4ENTRY(start)
5#ifdef ROCKBOX_LITTLE_ENDIAN
6OUTPUT_FORMAT(elf32-littlearm)
7#else
8OUTPUT_FORMAT(elf32-bigarm)
9#endif
10OUTPUT_ARCH(arm)
11STARTUP(target/arm/s5l8702/crt0.o)
12
13#ifdef IPOD_NANO2G
14#define DRAMORIG 0x08000000 + ((MEMORYSIZE - 1) * 0x100000)
15#define DRAMSIZE 0x00100000
16#else
17#define DRAMORIG 0x08000000
18#define DRAMSIZE (DRAM_SIZE - TTB_SIZE)
19#endif
20
21#define IRAMORIG 0x22000000
22#define IRAMSIZE 256K
23
24MEMORY
25{
26 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
27 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
28}
29
30#define LOAD_AREA IRAM
31
32SECTIONS
33{
34#ifdef NEEDS_INTVECT_COPYING
35 .intvect : {
36 _intvectstart = . ;
37 *(.intvect)
38 _intvectend = _newstart ;
39 } >IRAM AT> LOAD_AREA
40 _intvectcopy = LOADADDR(.intvect) ;
41#endif
42
43 .text : {
44#ifndef NEEDS_INTVECT_COPYING
45 *(.intvect)
46#endif
47 *(.init.text)
48 *(.text*)
49 *(.glue_7*)
50 } > LOAD_AREA
51
52 .rodata : {
53 *(.rodata*)
54 . = ALIGN(0x4);
55 } > LOAD_AREA
56
57 .data : {
58 _datastart = . ;
59 *(.irodata)
60 *(.icode)
61 *(.idata)
62 *(.data*)
63 *(.ncdata*);
64 . = ALIGN(0x4);
65 _dataend = . ;
66 } > IRAM AT> LOAD_AREA
67 _datacopy = LOADADDR(.data) ;
68
69 .stack (NOLOAD) :
70 {
71 *(.stack)
72 _stackbegin = .;
73 stackbegin = .;
74 . += 0x2000;
75 _stackend = .;
76 stackend = .;
77 _irqstackbegin = .;
78 . += 0x400;
79 _irqstackend = .;
80 _fiqstackbegin = .;
81 . += 0x400;
82 _fiqstackend = .;
83 } > IRAM
84
85 .bss (NOLOAD) : {
86 _edata = .;
87 *(.bss*);
88 *(.ibss);
89 *(.ncbss*);
90 *(COMMON);
91 . = ALIGN(0x4);
92 _end = .;
93 } > IRAM
94}
diff --git a/firmware/target/arm/s5l8702/crt0.S b/firmware/target/arm/s5l8702/crt0.S
new file mode 100644
index 0000000000..da2f49c971
--- /dev/null
+++ b/firmware/target/arm/s5l8702/crt0.S
@@ -0,0 +1,207 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: crt0.S 18776 2008-10-11 18:32:17Z gevaerts $
9 *
10 * Copyright (C) 2008 by Marcoen Hirschberg
11 * Copyright (C) 2008 by Denes Balatoni
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version 2
16 * of the License, or (at your option) any later version.
17 *
18 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
19 * KIND, either express or implied.
20 *
21 ****************************************************************************/
22#define ASM
23#include "config.h"
24#include "cpu.h"
25
26#define CACHE_NONE 0
27#define CACHE_ALL 0x0C
28
29 .section .intvect,"ax",%progbits
30 .global start
31 .global _newstart
32 /* Exception vectors */
33start:
34 b _newstart
35 ldr pc, =undef_instr_handler
36 ldr pc, =software_int_handler
37 ldr pc, =prefetch_abort_handler
38 ldr pc, =data_abort_handler
39 ldr pc, =reserved_handler
40 ldr pc, =irq_handler
41 ldr pc, =fiq_handler
42 .ltorg
43_newstart:
44#if !defined(BOOTLOADER)
45 ldr pc, =newstart2 // we do not want to execute from 0x0 as iram will be mapped there
46 .section .init.text,"ax",%progbits
47newstart2:
48#endif
49 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
50
51#ifdef BOOTLOADER
52 /* Relocate ourself to IRAM - we have been loaded to DRAM */
53 mov r0, #0x08000000 /* source (DRAM) */
54 mov r1, #0x22000000 /* dest (IRAM) */
55 ldr r2, =_dataend
561:
57 cmp r2, r1
58 ldrhi r3, [r0], #4
59 strhi r3, [r1], #4
60 bhi 1b
61
62 ldr pc, =start_loc /* jump to the relocated start_loc: */
63start_loc:
64#endif
65
66 mrc 15, 0, r0, c1, c0, 0
67 bic r0, r0, #0x1000
68 bic r0, r0, #0x5
69 mcr 15, 0, r0, c1, c0, 0 // disable caches and protection unit
70
71.cleancache:
72 mrc p15, 0, r15,c7,c10,3
73 bne .cleancache
74 mov r0, #0
75 mcr p15, 0, r0,c7,c10,4
76 mcr p15, 0, r0,c7,c5,0
77 bl ttb_init
78
79 mov r0, #0 @ physical address
80 mov r1, #0 @ virtual address
81 mov r2, #0x380 @ size (all memory)
82 mov r3, #CACHE_ALL
83 bl map_section
84
85 mov r0, #0x38000000 @ physical address
86 mov r1, #0x38000000 @ virtual address
87 mov r2, #0x80 @ size (AHB/APB)
88 mov r3, #CACHE_NONE
89 bl map_section
90
91 bl enable_mmu
92
93 mrc 15, 0, r0, c1, c0, 0
94 orr r0, r0, #0x5
95 orr r0, r0, #0x1000
96 mcr 15, 0, r0, c1, c0, 0 // re-enable protection unit and caches
97
98 ldr r1, =0x38e00000
99 add r2, r1, #0x00001000
100 add r3, r1, #0x00002000
101 sub r4, r0, #1
102 str r4, [r1,#0x14]
103 str r4, [r2,#0x14]
104 str r4, [r1,#0xf00]
105 str r4, [r2,#0xf00]
106 str r4, [r3,#0x08]
107 str r4, [r3,#0x0c]
108 str r0, [r1,#0x14]
109 str r0, [r2,#0x14]
110
111#if !defined(BOOTLOADER)
112 /* Copy interrupt vectors to iram */
113 ldr r2, =_intvectstart
114 ldr r3, =_intvectend
115 ldr r4, =_intvectcopy
1161:
117 cmp r3, r2
118 ldrhi r1, [r4], #4
119 strhi r1, [r2], #4
120 bhi 1b
121#endif
122
123 /* Initialise bss section to zero */
124 ldr r2, =_edata
125 ldr r3, =_end
126 mov r4, #0
1271:
128 cmp r3, r2
129 strhi r4, [r2], #4
130 bhi 1b
131
132#ifndef BOOTLOADER
133 /* Copy icode and data to ram */
134 ldr r2, =_iramstart
135 ldr r3, =_iramend
136 ldr r4, =_iramcopy
1371:
138 cmp r3, r2
139 ldrhi r1, [r4], #4
140 strhi r1, [r2], #4
141 bhi 1b
142
143 /* Initialise ibss section to zero */
144 ldr r2, =_iedata
145 ldr r3, =_iend
146 mov r4, #0
1471:
148 cmp r3, r2
149 strhi r4, [r2], #4
150 bhi 1b
151#endif
152
153 /* Set up some stack and munge it with 0xdeadbeef */
154 ldr sp, =stackend
155 ldr r2, =stackbegin
156 ldr r3, =0xdeadbeef
1571:
158 cmp sp, r2
159 strhi r3, [r2], #4
160 bhi 1b
161
162 /* Set up stack for IRQ mode */
163 msr cpsr_c, #0xd2
164 ldr sp, =_irqstackend
165
166 /* Set up stack for FIQ mode */
167 msr cpsr_c, #0xd1
168 ldr sp, =_fiqstackend
169
170 /* Let abort and undefined modes use IRQ stack */
171 msr cpsr_c, #0xd7
172 ldr sp, =_irqstackend
173 msr cpsr_c, #0xdb
174 ldr sp, =_irqstackend
175
176 /* Switch back to supervisor mode */
177 msr cpsr_c, #0xd3
178
179 bl main
180
181 .text
182/* .global UIE*/
183
184/* All illegal exceptions call into UIE with exception address as first
185 * parameter. This is calculated differently depending on which exception
186 * we're in. Second parameter is exception number, used for a string lookup
187 * in UIE. */
188undef_instr_handler:
189 sub r0, lr, #4
190 mov r1, #0
191 b UIE
192
193/* We run supervisor mode most of the time, and should never see a software
194 * exception being thrown. Perhaps make it illegal and call UIE? */
195software_int_handler:
196reserved_handler:
197 movs pc, lr
198
199prefetch_abort_handler:
200 sub r0, lr, #4
201 mov r1, #1
202 b UIE
203
204data_abort_handler:
205 sub r0, lr, #8
206 mov r1, #2
207 b UIE
diff --git a/firmware/target/arm/s5l8702/debug-s5l8702.c b/firmware/target/arm/s5l8702/debug-s5l8702.c
new file mode 100644
index 0000000000..30d97d9203
--- /dev/null
+++ b/firmware/target/arm/s5l8702/debug-s5l8702.c
@@ -0,0 +1,151 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: debug-s5l8700.c 28719 2010-12-01 18:35:01Z Buschel $
9 *
10 * Copyright © 2008 Rafaël Carré
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include <stdbool.h>
23#include "config.h"
24#include "kernel.h"
25#include "debug-target.h"
26#include "button.h"
27#include "lcd.h"
28#include "font.h"
29#include "storage.h"
30#include "power.h"
31#include "pmu-target.h"
32
33/* Skeleton for adding target specific debug info to the debug menu
34 */
35
36#define _DEBUG_PRINTF(a, varargs...) lcd_putsf(0, line++, (a), ##varargs);
37
38bool __dbg_hw_info(void)
39{
40 int line;
41 int i;
42 unsigned int state = 0;
43 const unsigned int max_states=2;
44
45 lcd_clear_display();
46 lcd_setfont(FONT_SYSFIXED);
47
48 state=0;
49 while(1)
50 {
51 lcd_clear_display();
52 line = 0;
53
54 if(state == 0)
55 {
56 _DEBUG_PRINTF("CPU:");
57 _DEBUG_PRINTF("current_tick: %d", (unsigned int)current_tick);
58 line++;
59 }
60 else if(state==1)
61 {
62 _DEBUG_PRINTF("PMU:");
63 for(i=0;i<7;i++)
64 {
65 char *device[] = {"(unknown)",
66 "(unknown)",
67 "(unknown)",
68 "(unknown)",
69 "(unknown)",
70 "(unknown)",
71 "(unknown)"};
72 _DEBUG_PRINTF("ldo%d %s: %dmV %s",i,
73 pmu_read(0x2e + (i << 1))?" on":"off",
74 900 + pmu_read(0x2d + (i << 1))*100,
75 device[i]);
76 }
77 _DEBUG_PRINTF("cpu voltage: %dmV",625 + pmu_read(0x1e)*25);
78 _DEBUG_PRINTF("memory voltage: %dmV",625 + pmu_read(0x22)*25);
79 line++;
80 _DEBUG_PRINTF("charging: %s", charging_state() ? "true" : "false");
81 _DEBUG_PRINTF("backlight: %s", pmu_read(0x29) ? "on" : "off");
82 _DEBUG_PRINTF("brightness value: %d", pmu_read(0x28));
83 }
84 else
85 {
86 state=0;
87 }
88
89
90 lcd_update();
91 switch(button_get_w_tmo(HZ/20))
92 {
93 case BUTTON_SCROLL_BACK:
94 if(state!=0) state--;
95 break;
96
97 case BUTTON_SCROLL_FWD:
98 if(state!=max_states-1)
99 {
100 state++;
101 }
102 break;
103
104 case DEBUG_CANCEL:
105 case BUTTON_REL:
106 lcd_setfont(FONT_UI);
107 return false;
108 }
109 }
110
111 lcd_setfont(FONT_UI);
112 return false;
113}
114
115bool dbg_ports(void)
116{
117 int line;
118
119 lcd_setfont(FONT_SYSFIXED);
120
121 while(1)
122 {
123 lcd_clear_display();
124 line = 0;
125
126 _DEBUG_PRINTF("GPIO 0: %08x",(unsigned int)PDAT(0));
127 _DEBUG_PRINTF("GPIO 1: %08x",(unsigned int)PDAT(1));
128 _DEBUG_PRINTF("GPIO 2: %08x",(unsigned int)PDAT(2));
129 _DEBUG_PRINTF("GPIO 3: %08x",(unsigned int)PDAT(3));
130 _DEBUG_PRINTF("GPIO 4: %08x",(unsigned int)PDAT(4));
131 _DEBUG_PRINTF("GPIO 5: %08x",(unsigned int)PDAT(5));
132 _DEBUG_PRINTF("GPIO 6: %08x",(unsigned int)PDAT(6));
133 _DEBUG_PRINTF("GPIO 7: %08x",(unsigned int)PDAT(7));
134 _DEBUG_PRINTF("GPIO 8: %08x",(unsigned int)PDAT(8));
135 _DEBUG_PRINTF("GPIO 9: %08x",(unsigned int)PDAT(9));
136 _DEBUG_PRINTF("GPIO 10: %08x",(unsigned int)PDAT(10));
137 _DEBUG_PRINTF("GPIO 11: %08x",(unsigned int)PDAT(11));
138 _DEBUG_PRINTF("GPIO 12: %08x",(unsigned int)PDAT(12));
139 _DEBUG_PRINTF("GPIO 13: %08x",(unsigned int)PDAT(13));
140 _DEBUG_PRINTF("GPIO 14: %08x",(unsigned int)PDAT(14));
141 _DEBUG_PRINTF("GPIO 15: %08x",(unsigned int)PDAT(15));
142 _DEBUG_PRINTF("USEC : %08x",(unsigned int)USEC_TIMER);
143
144 lcd_update();
145 if (button_get_w_tmo(HZ/10) == (DEBUG_CANCEL|BUTTON_REL))
146 break;
147 }
148 lcd_setfont(FONT_UI);
149 return false;
150}
151
diff --git a/firmware/target/arm/s5l8702/debug-target.h b/firmware/target/arm/s5l8702/debug-target.h
new file mode 100644
index 0000000000..79e3115dea
--- /dev/null
+++ b/firmware/target/arm/s5l8702/debug-target.h
@@ -0,0 +1,33 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: debug-target.h 28522 2010-11-06 14:24:25Z wodz $
9 *
10 * Copyright (C) 2007 by Karl Kurbjun
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef _DEBUG_TARGET_H_
23#define _DEBUG_TARGET_H_
24
25#include <stdbool.h>
26
27#define DEBUG_CANCEL BUTTON_MENU
28
29bool __dbg_hw_info(void);
30bool dbg_ports(void);
31
32#endif /* _DEBUG_TARGET_H_ */
33
diff --git a/firmware/target/arm/s5l8702/i2c-s5l8702.c b/firmware/target/arm/s5l8702/i2c-s5l8702.c
new file mode 100644
index 0000000000..be286b34b7
--- /dev/null
+++ b/firmware/target/arm/s5l8702/i2c-s5l8702.c
@@ -0,0 +1,186 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: i2c-s5l8700.c 28589 2010-11-14 15:19:30Z theseven $
9 *
10 * Copyright (C) 2009 by Bertrik Sikken
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "config.h"
23#include "system.h"
24#include "kernel.h"
25#include "i2c-s5l8702.h"
26
27/* Driver for the s5l8700 built-in I2C controller in master mode
28
29 Both the i2c_read and i2c_write function take the following arguments:
30 * slave, the address of the i2c slave device to read from / write to
31 * address, optional sub-address in the i2c slave (unused if -1)
32 * len, number of bytes to be transfered
33 * data, pointer to data to be transfered
34 A return value < 0 indicates an error.
35
36 Note:
37 * blocks the calling thread for the entire duraton of the i2c transfer but
38 uses wakeup_wait/wakeup_signal to allow other threads to run.
39 * ACK from slave is not checked, so functions never return an error
40*/
41
42static struct mutex i2c_mtx[2];
43
44void i2c_init(void)
45{
46 mutex_init(&i2c_mtx[0]);
47 mutex_init(&i2c_mtx[1]);
48
49 /* initial config */
50 IICADD(0) = 0;
51 IICADD(1) = 0;
52 IICCON(0) = (1 << 7) | /* ACK_GEN */
53 (0 << 6) | /* CLKSEL = PCLK/16 */
54 (1 << 5) | /* INT_EN */
55 (1 << 4) | /* IRQ clear */
56 (3 << 0); /* CK_REG */
57 IICCON(1) = (1 << 7) | /* ACK_GEN */
58 (0 << 6) | /* CLKSEL = PCLK/16 */
59 (1 << 5) | /* INT_EN */
60 (1 << 4) | /* IRQ clear */
61 (3 << 0); /* CK_REG */
62
63 /* serial output on */
64 IICSTAT(0) = (1 << 4);
65 IICSTAT(1) = (1 << 4);
66}
67
68int i2c_write(int bus, unsigned char slave, int address, int len, const unsigned char *data)
69{
70 mutex_lock(&i2c_mtx[bus]);
71 long timeout = current_tick + HZ / 50;
72
73 /* START */
74 IICDS(bus) = slave & ~1;
75 IICSTAT(bus) = 0xF0;
76 IICCON(bus) = 0xB3;
77 while ((IICCON(bus) & 0x10) == 0)
78 if (TIME_AFTER(current_tick, timeout))
79 {
80 mutex_unlock(&i2c_mtx[bus]);
81 return 1;
82 }
83
84
85 if (address >= 0) {
86 /* write address */
87 IICDS(bus) = address;
88 IICCON(bus) = 0xB3;
89 while ((IICCON(bus) & 0x10) == 0)
90 if (TIME_AFTER(current_tick, timeout))
91 {
92 mutex_unlock(&i2c_mtx[bus]);
93 return 2;
94 }
95 }
96
97 /* write data */
98 while (len--) {
99 IICDS(bus) = *data++;
100 IICCON(bus) = 0xB3;
101 while ((IICCON(bus) & 0x10) == 0)
102 if (TIME_AFTER(current_tick, timeout))
103 {
104 mutex_unlock(&i2c_mtx[bus]);
105 return 4;
106 }
107 }
108
109 /* STOP */
110 IICSTAT(bus) = 0xD0;
111 IICCON(bus) = 0xB3;
112 while ((IICSTAT(bus) & (1 << 5)) != 0)
113 if (TIME_AFTER(current_tick, timeout))
114 {
115 mutex_unlock(&i2c_mtx[bus]);
116 return 5;
117 }
118
119 mutex_unlock(&i2c_mtx[bus]);
120 return 0;
121}
122
123int i2c_read(int bus, unsigned char slave, int address, int len, unsigned char *data)
124{
125 mutex_lock(&i2c_mtx[bus]);
126 long timeout = current_tick + HZ / 50;
127
128 if (address >= 0) {
129 /* START */
130 IICDS(bus) = slave & ~1;
131 IICSTAT(bus) = 0xF0;
132 IICCON(bus) = 0xB3;
133 while ((IICCON(bus) & 0x10) == 0)
134 if (TIME_AFTER(current_tick, timeout))
135 {
136 mutex_unlock(&i2c_mtx[bus]);
137 return 1;
138 }
139
140 /* write address */
141 IICDS(bus) = address;
142 IICCON(bus) = 0xB3;
143 while ((IICCON(bus) & 0x10) == 0)
144 if (TIME_AFTER(current_tick, timeout))
145 {
146 mutex_unlock(&i2c_mtx[bus]);
147 return 2;
148 }
149 }
150
151 /* (repeated) START */
152 IICDS(bus) = slave | 1;
153 IICSTAT(bus) = 0xB0;
154 IICCON(bus) = 0xB3;
155 while ((IICCON(bus) & 0x10) == 0)
156 if (TIME_AFTER(current_tick, timeout))
157 {
158 mutex_unlock(&i2c_mtx[bus]);
159 return 3;
160 }
161
162 while (len--) {
163 IICCON(bus) = (len == 0) ? 0x33 : 0xB3; /* NAK or ACK */
164 while ((IICCON(bus) & 0x10) == 0)
165 if (TIME_AFTER(current_tick, timeout))
166 {
167 mutex_unlock(&i2c_mtx[bus]);
168 return 4;
169 }
170 *data++ = IICDS(bus);
171 }
172
173 /* STOP */
174 IICSTAT(bus) = 0x90;
175 IICCON(bus) = 0xB3;
176 while ((IICSTAT(bus) & (1 << 5)) != 0)
177 if (TIME_AFTER(current_tick, timeout))
178 {
179 mutex_unlock(&i2c_mtx[bus]);
180 return 5;
181 }
182
183 mutex_unlock(&i2c_mtx[bus]);
184 return 0;
185}
186
diff --git a/firmware/target/arm/s5l8702/ipod6g/adc-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/adc-ipod6g.c
new file mode 100644
index 0000000000..201af5ee00
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/adc-ipod6g.c
@@ -0,0 +1,39 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: adc-s5l8700.c 21775 2009-07-11 14:12:02Z bertrik $
9 *
10 * Copyright (C) 2009 by Bertrik Sikken
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "config.h"
23
24#include "inttypes.h"
25#include "s5l8702.h"
26#include "adc.h"
27#include "adc-target.h"
28#include "pmu-target.h"
29#include "kernel.h"
30
31unsigned short adc_read(int channel)
32{
33 return pmu_read_adc(channel);
34}
35
36void adc_init(void)
37{
38}
39
diff --git a/firmware/target/arm/s5l8702/ipod6g/adc-target.h b/firmware/target/arm/s5l8702/ipod6g/adc-target.h
new file mode 100644
index 0000000000..d4dce3d31f
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/adc-target.h
@@ -0,0 +1,33 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: adc-target.h 21734 2009-07-09 20:17:47Z bertrik $
9 *
10 * Copyright (C) 2006 by Barry Wardell
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef _ADC_TARGET_H_
22#define _ADC_TARGET_H_
23
24#define NUM_ADC_CHANNELS 4
25
26#define ADC_UNKNOWN_0 0
27#define ADC_UNKNOWN_1 1
28#define ADC_BATTERY 2
29#define ADC_UNKNOWN_3 3
30
31#define ADC_UNREG_POWER ADC_BATTERY /* For compatibility */
32
33#endif
diff --git a/firmware/target/arm/s5l8702/ipod6g/ata-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/ata-ipod6g.c
new file mode 100644
index 0000000000..f1577ee857
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/ata-ipod6g.c
@@ -0,0 +1,197 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: ata-meg-fx.c 27935 2010-08-28 23:12:11Z funman $
9 *
10 * Copyright (C) 2011 by Michael Sparmann
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "cpu.h"
23#include "kernel.h"
24#include "thread.h"
25#include "system.h"
26#include "power.h"
27#include "panic.h"
28#include "pmu-target.h"
29#include "ata.h"
30#include "ata-target.h"
31#include "s5l8702.h"
32
33
34static struct wakeup ata_wakeup;
35
36#ifdef HAVE_ATA_DMA
37static uint32_t ata_dma_flags;
38#endif
39
40
41void ata_reset(void)
42{
43 ATA_SWRST = 1;
44 sleep(HZ / 100);
45 ATA_SWRST = 0;
46 sleep(HZ / 10);
47}
48
49void ata_enable(bool on)
50{
51 if (on)
52 {
53 PWRCON(0) &= ~(1 << 5);
54 ATA_CFG = 0x41;
55 sleep(HZ / 100);
56 ATA_CFG = 0x40;
57 sleep(HZ / 20);
58 ata_reset();
59 ATA_CCONTROL = 1;
60 sleep(HZ / 5);
61 ATA_PIO_TIME = 0x191f7;
62 *ATA_HCYL = 0;
63 while (!(ATA_PIO_READY & 2)) yield();
64 }
65 else
66 {
67 ATA_CCONTROL = 0;
68 while (!(ATA_CCONTROL & 2)) yield();
69 PWRCON(1) |= 1 << 5;
70 }
71}
72
73bool ata_is_coldstart(void)
74{
75 return false;
76}
77
78void ata_device_init(void)
79{
80 VIC0INTENABLE = 1 << IRQ_ATA;
81}
82
83uint16_t ata_read_cbr(uint32_t volatile* reg)
84{
85 while (!(ATA_PIO_READY & 2));
86 volatile uint32_t __attribute__((unused)) dummy = *reg;
87 while (!(ATA_PIO_READY & 1));
88 return ATA_PIO_RDATA;
89}
90
91void ata_write_cbr(uint32_t volatile* reg, uint16_t data)
92{
93 while (!(ATA_PIO_READY & 2));
94 *reg = data;
95}
96
97void ata_set_pio_timings(int mode)
98{
99 if (mode >= 4) ATA_PIO_TIME = 0x7083;
100 if (mode >= 3) ATA_PIO_TIME = 0x2072;
101 else ATA_PIO_TIME = 0x11f3;
102}
103
104#ifdef HAVE_ATA_DMA
105static void ata_set_mdma_timings(unsigned int mode)
106{
107 if (mode >= 2) ATA_MDMA_TIME = 0x5072;
108 if (mode >= 1) ATA_MDMA_TIME = 0x7083;
109 else ATA_MDMA_TIME = 0x1c175;
110}
111
112static void ata_set_udma_timings(unsigned int mode)
113{
114 if (mode >= 4) ATA_UDMA_TIME = 0x2010a52;
115 if (mode >= 3) ATA_UDMA_TIME = 0x2020a52;
116 if (mode >= 2) ATA_UDMA_TIME = 0x3030a52;
117 if (mode >= 1) ATA_UDMA_TIME = 0x3050a52;
118 else ATA_UDMA_TIME = 0x5071152;
119}
120
121void ata_dma_set_mode(unsigned char mode)
122{
123 unsigned int modeidx = mode & 0x07;
124 unsigned int dmamode = mode & 0xf8;
125
126 if (dmamode == 0x40 && modeidx <= ATA_MAX_UDMA)
127 {
128 /* Using Ultra DMA */
129 ata_set_udma_timings(dmamode);
130 ata_dma_flags = 0x60c;
131 }
132 else if (dmamode == 0x20 && modeidx <= ATA_MAX_MWDMA)
133 {
134 /* Using Multiword DMA */
135 ata_set_mdma_timings(dmamode);
136 ata_dma_flags = 0x408;
137 }
138 else
139 {
140 /* Don't understand this - force PIO. */
141 ata_dma_flags = 0;
142 }
143}
144
145bool ata_dma_setup(void *addr, unsigned long bytes, bool write)
146{
147 if ((((int)addr) & 0xf) || (((int)bytes) & 0xf) || !ata_dma_flags)
148 return false;
149
150 if (write) clean_dcache();
151 else invalidate_dcache();
152 ATA_CCOMMAND = 2;
153
154 if (write)
155 {
156 ATA_SBUF_START = addr;
157 ATA_SBUF_SIZE = bytes;
158 ATA_CFG |= 0x10;
159 }
160 else
161 {
162 ATA_TBUF_START = addr;
163 ATA_TBUF_SIZE = bytes;
164 ATA_CFG &= ~0x10;
165 }
166 ATA_XFR_NUM = bytes - 1;
167
168 return true;
169}
170
171bool ata_dma_finish(void)
172{
173 ATA_CFG |= ata_dma_flags;
174 ATA_CFG &= ~0x180;
175 wakeup_wait(&ata_wakeup, TIMEOUT_NOBLOCK);
176 ATA_IRQ = 0x1f;
177 ATA_IRQ_MASK = 1;
178 ATA_CCOMMAND = 1;
179 if (wakeup_wait(&ata_wakeup, HZ / 2) != OBJ_WAIT_SUCCEEDED)
180 {
181 ATA_CCOMMAND = 2;
182 ATA_CFG &= ~0x100c;
183 return false;
184 }
185 ATA_CCOMMAND = 2;
186 ATA_CFG &= ~0x100c;
187 return true;
188}
189#endif /* HAVE_ATA_DMA */
190
191void INT_ATA(void)
192{
193 uint32_t ata_irq = ATA_IRQ;
194 ATA_IRQ = ata_irq;
195 if (ata_irq & ATA_IRQ_MASK) wakeup_signal(&ata_wakeup);
196 ATA_IRQ_MASK = 0;
197}
diff --git a/firmware/target/arm/s5l8702/ipod6g/ata-target.h b/firmware/target/arm/s5l8702/ipod6g/ata-target.h
new file mode 100644
index 0000000000..e2e7bd298c
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/ata-target.h
@@ -0,0 +1,47 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: ata-target.h 25525 2010-04-07 20:01:21Z torne $
9 *
10 * Copyright (C) 2011 by Michael Sparmann
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef ATA_TARGET_H
22#define ATA_TARGET_H
23
24#include "inttypes.h"
25#include "s5l8702.h"
26
27#ifdef BOOTLOADER
28#define ATA_DRIVER_CLOSE
29#endif
30
31#define ATA_SWAP_IDENTIFY(word) (swap16(word))
32
33void ata_reset(void);
34void ata_device_init(void);
35bool ata_is_coldstart(void);
36uint16_t ata_read_cbr(uint32_t volatile* reg);
37void ata_write_cbr(uint32_t volatile* reg, uint16_t data);
38
39#define ATA_OUT8(reg, data) ata_write_cbr(reg, data)
40#define ATA_OUT16(reg, data) ata_write_cbr(reg, data)
41#define ATA_IN8(reg) ata_read_cbr(reg)
42#define ATA_IN16(reg) ata_read_cbr(reg)
43
44#define ATA_SET_DEVICE_FEATURES
45void ata_set_pio_timings(int mode);
46
47#endif
diff --git a/firmware/target/arm/s5l8702/ipod6g/audio-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/audio-ipod6g.c
new file mode 100644
index 0000000000..6ede3d0c30
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/audio-ipod6g.c
@@ -0,0 +1,65 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: audio-nano2g.c 23095 2009-10-11 09:17:12Z dave $
9 *
10 * Copyright (C) 2006 by Michael Sevakis
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "system.h"
22#include "cpu.h"
23#include "audio.h"
24#include "sound.h"
25
26#if INPUT_SRC_CAPS != 0
27void audio_set_output_source(int source)
28{
29 if ((unsigned)source >= AUDIO_NUM_SOURCES)
30 source = AUDIO_SRC_PLAYBACK;
31} /* audio_set_output_source */
32
33void audio_input_mux(int source, unsigned flags)
34{
35 (void)flags;
36 /* Prevent pops from unneeded switching */
37 static int last_source = AUDIO_SRC_PLAYBACK;
38
39 switch (source)
40 {
41 default: /* playback - no recording */
42 source = AUDIO_SRC_PLAYBACK;
43 case AUDIO_SRC_PLAYBACK:
44#ifdef HAVE_RECORDING
45 if (source != last_source)
46 {
47 audiohw_set_monitor(false);
48 audiohw_disable_recording();
49 }
50#endif
51 break;
52#ifdef HAVE_LINE_REC
53 case AUDIO_SRC_LINEIN: /* recording only */
54 if (source != last_source)
55 {
56 audiohw_set_monitor(false);
57 audiohw_enable_recording(false); /* source line */
58 }
59 break;
60#endif
61 } /* end switch */
62
63 last_source = source;
64} /* audio_input_mux */
65#endif /* INPUT_SRC_CAPS != 0 */
diff --git a/firmware/target/arm/s5l8702/ipod6g/backlight-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/backlight-ipod6g.c
new file mode 100644
index 0000000000..dc21d161de
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/backlight-ipod6g.c
@@ -0,0 +1,67 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: backlight-nano2g.c 28601 2010-11-14 20:39:18Z theseven $
9 *
10 * Copyright (C) 2009 by Dave Chapman
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include <stdbool.h>
22
23#include "config.h"
24#include "kernel.h"
25#include "backlight.h"
26#include "backlight-target.h"
27#include "pmu-target.h"
28
29#ifdef HAVE_LCD_SLEEP
30bool lcd_active(void);
31void lcd_awake(void);
32void lcd_update(void);
33#endif
34
35void _backlight_set_brightness(int brightness)
36{
37 pmu_write(0x28, brightness);
38}
39
40void _backlight_on(void)
41{
42#ifdef HAVE_LCD_SLEEP
43 if (!lcd_active())
44 {
45 lcd_awake();
46 lcd_update();
47 sleep(HZ/8);
48 }
49#endif
50 pmu_write(0x29, 1);
51}
52
53void _backlight_off(void)
54{
55 pmu_write(0x29, 0);
56}
57
58bool _backlight_init(void)
59{
60 pmu_write(0x2a, 6);
61 pmu_write(0x28, 0x20);
62 pmu_write(0x2b, 20);
63
64 _backlight_on();
65
66 return true;
67}
diff --git a/firmware/target/arm/s5l8702/ipod6g/backlight-target.h b/firmware/target/arm/s5l8702/ipod6g/backlight-target.h
new file mode 100644
index 0000000000..05a8addfea
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/backlight-target.h
@@ -0,0 +1,29 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: backlight-target.h 21478 2009-06-23 18:11:03Z bertrik $
9 *
10 * Copyright (C) 2008 by Marcoen Hirschberg
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef BACKLIGHT_TARGET_H
22#define BACKLIGHT_TARGET_H
23
24bool _backlight_init(void);
25void _backlight_on(void);
26void _backlight_off(void);
27void _backlight_set_brightness(int brightness);
28
29#endif
diff --git a/firmware/target/arm/s5l8702/ipod6g/button-target.h b/firmware/target/arm/s5l8702/ipod6g/button-target.h
new file mode 100644
index 0000000000..0bd89d1d2a
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/button-target.h
@@ -0,0 +1,78 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: button-target.h 21828 2009-07-12 22:16:51Z dave $
9 *
10 * Copyright (C) 2006 by Barry Wardell
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef _BUTTON_TARGET_H_
22#define _BUTTON_TARGET_H_
23
24#include <stdbool.h>
25#include "config.h"
26
27#define HAS_BUTTON_HOLD
28
29bool button_hold(void);
30void button_init_device(void);
31int button_read_device(void);
32
33void ipod_mini_button_int(void);
34void ipod_3g_button_int(void);
35void ipod_4g_button_int(void);
36
37/* iPod specific button codes */
38
39#define BUTTON_SELECT 0x00000001
40#define BUTTON_MENU 0x00000002
41
42#define BUTTON_LEFT 0x00000004
43#define BUTTON_RIGHT 0x00000008
44#define BUTTON_SCROLL_FWD 0x00000010
45#define BUTTON_SCROLL_BACK 0x00000020
46
47#define BUTTON_PLAY 0x00000040
48
49#define BUTTON_MAIN (BUTTON_SELECT|BUTTON_MENU\
50 |BUTTON_LEFT|BUTTON_RIGHT|BUTTON_SCROLL_FWD\
51 |BUTTON_SCROLL_BACK|BUTTON_PLAY)
52
53 /* Remote control's buttons */
54#ifdef IPOD_ACCESSORY_PROTOCOL
55#define BUTTON_RC_PLAY 0x00100000
56#define BUTTON_RC_STOP 0x00080000
57
58#define BUTTON_RC_LEFT 0x00040000
59#define BUTTON_RC_RIGHT 0x00020000
60#define BUTTON_RC_VOL_UP 0x00010000
61#define BUTTON_RC_VOL_DOWN 0x00008000
62
63#define BUTTON_REMOTE (BUTTON_RC_PLAY|BUTTON_RC_STOP\
64 |BUTTON_RC_LEFT|BUTTON_RC_RIGHT\
65 |BUTTON_RC_VOL_UP|BUTTON_RC_VOL_DOWN)
66#else
67#define BUTTON_REMOTE 0
68#endif
69
70/* This is for later
71#define BUTTON_SCROLL_TOUCH 0x00000200
72*/
73
74
75#define POWEROFF_BUTTON BUTTON_PLAY
76#define POWEROFF_COUNT 40
77
78#endif /* _BUTTON_TARGET_H_ */
diff --git a/firmware/target/arm/s5l8702/ipod6g/cscodec-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/cscodec-ipod6g.c
new file mode 100644
index 0000000000..460b254730
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/cscodec-ipod6g.c
@@ -0,0 +1,64 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: wmcodec-s5l8700.c 22025 2009-07-25 00:49:13Z dave $
9 *
10 * S5L8702-specific code for Cirrus codecs
11 *
12 * Copyright (c) 2010 Michael Sparmann
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License
16 * as published by the Free Software Foundation; either version 2
17 * of the License, or (at your option) any later version.
18 *
19 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
20 * KIND, either express or implied.
21 *
22 ****************************************************************************/
23
24#include "system.h"
25#include "audiohw.h"
26#include "i2c-s5l8702.h"
27#include "s5l8702.h"
28#include "cscodec.h"
29
30void audiohw_init(void)
31{
32#ifdef HAVE_CS42L55
33 audiohw_preinit();
34#endif
35}
36
37unsigned char cscodec_read(int reg)
38{
39 unsigned char data;
40 i2c_read(0, 0x94, reg, 1, &data);
41 return data;
42}
43
44void cscodec_write(int reg, unsigned char data)
45{
46 i2c_write(0, 0x94, reg, 1, &data);
47}
48
49void cscodec_power(bool state)
50{
51 (void)state; //TODO: Figure out which LDO this is
52}
53
54void cscodec_reset(bool state)
55{
56 if (state) PDAT(3) &= ~8;
57 else PDAT(3) |= 8;
58}
59
60void cscodec_clock(bool state)
61{
62 if (state) CLKCON0C &= ~0xffff;
63 else CLKCON0C |= 0x8000;
64}
diff --git a/firmware/target/arm/s5l8702/ipod6g/lcd-asm-ipod6g.S b/firmware/target/arm/s5l8702/ipod6g/lcd-asm-ipod6g.S
new file mode 100644
index 0000000000..2b170f329b
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/lcd-asm-ipod6g.S
@@ -0,0 +1,295 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: lcd-as-video.S 26756 2010-06-11 04:41:36Z funman $
9 *
10 * Copyright (C) 2010 by Andree Buschmann
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22/****************************************************************************
23 * #define FORCE_FIFO_WAIT
24 *
25 * This is not needed in YUV blitting when the LCD IF is fast enough. In this
26 * case YUV-to-RGB conversion per pixel needs longer than the transfer of a
27 * pixel via the LCD IF. For iPod nano 2G this is true if the LCD IF is
28 * configured to use LCD_PHTIME = 0x00 (see lcd-nano2g.c).
29 ****************************************************************************/
30
31#include "config.h"
32
33 .section .icode, "ax", %progbits
34
35/****************************************************************************
36 * void lcd_write_line(const fb_data *addr,
37 * int pixelcount,
38 * const unsigned int lcd_base_addr);
39 *
40 * Writes pixelcount pixels from src-pointer (lcd_framebuffer) to LCD dataport.
41 */
42 .align 2
43 .global lcd_write_line
44 .type lcd_write_line, %function
45 /* r0 = addr, must be aligned */
46 /* r1 = pixel count, must be even */
47lcd_write_line: /* r2 = LCD_BASE */
48 stmfd sp!, {r4-r6, lr} /* save non-scratch registers */
49 add r12, r2, #0x40 /* LCD_WDATA = LCD data port */
50
51.loop:
52 ldmia r0!, {r3, r5} /* read 2 pixel (=8 byte) */
53
54 /* wait for FIFO half full */
55.fifo_wait:
56 ldr lr, [r2, #0x1C] /* while (LCD_STATUS & 0x08); */
57 tst lr, #0x8
58 bgt .fifo_wait
59
60 mov r4, r3, asr #16 /* r3 = 1st pixel, r4 = 2nd pixel */
61 mov r6, r5, asr #16 /* r5 = 3rd pixel, r6 = 4th pixel */
62 stmia r12, {r3-r6} /* write pixels (lowest 16 bit used) */
63
64 subs r1, r1, #4
65 bgt .loop
66
67 ldmpc regs=r4-r6
68
69/****************************************************************************
70 * extern void lcd_write_yuv420_lines(unsigned char const * const src[3],
71 * const unsigned LCD_BASE,
72 * int width,
73 * int stride);
74 *
75 * Conversion from Motion JPEG and MPEG Y'PbPr to RGB is:
76 * |R| |1.164 0.000 1.596| |Y' - 16|
77 * |G| = |1.164 -0.391 -0.813| |Pb - 128|
78 * |B| |1.164 2.018 0.000| |Pr - 128|
79 *
80 * Scaled, normalized, rounded and tweaked to yield RGB 565:
81 * |R| |74 0 101| |Y' - 16| >> 9
82 * |G| = |74 -24 -51| |Cb - 128| >> 8
83 * |B| |74 128 0| |Cr - 128| >> 9
84 *
85 * Converts two lines from YUV to RGB565 and writes to LCD at once. First loop
86 * loads Cb/Cr, calculates the chroma offset and saves them to buffer. Within
87 * the second loop these chroma offset are reloaded from buffer. Within each
88 * loop two pixels are calculated and written to LCD.
89 */
90 .align 2
91 .global lcd_write_yuv420_lines
92 .type lcd_write_yuv420_lines, %function
93lcd_write_yuv420_lines:
94 /* r0 = src = yuv_src */
95 /* r1 = dst = LCD_BASE */
96 /* r2 = width */
97 /* r3 = stride */
98 stmfd sp!, { r4-r10, lr } /* save non-scratch */
99 ldmia r0, { r9, r10, r12 } /* r9 = yuv_src[0] = Y'_p */
100 /* r10 = yuv_src[1] = Cb_p */
101 /* r12 = yuv_src[2] = Cr_p */
102 add r3, r9, r3 /* r3 = &ysrc[stride] */
103 add r4, r2, r2, asr #1 /* chroma buffer lenght = width/2 *3 */
104 mov r4, r4, asl #2 /* use words for str/ldm possibility */
105 add r4, r4, #19 /* plus room for 4 additional words, */
106 bic r4, r4, #3 /* rounded up to multiples of 4 byte */
107 sub sp, sp, r4 /* and allocate on stack */
108 stmia sp, {r1-r4} /* LCD_BASE, width, &ysrc[stride], stack_alloc */
109
110 mov r7, r2 /* r7 = loop count */
111 add r8, sp, #16 /* chroma buffer */
112 add lr, r1, #0x40 /* LCD data port = LCD_BASE + 0x40 */
113
114 /* 1st loop start */
11510: /* loop start */
116
117 ldrb r0, [r10], #1 /* r0 = *usrc++ = *Cb_p++ */
118 ldrb r1, [r12], #1 /* r1 = *vsrc++ = *Cr_p++ */
119
120 sub r0, r0, #128 /* r0 = Cb-128 */
121 sub r1, r1, #128 /* r1 = Cr-128 */
122
123 add r2, r1, r1, asl #1 /* r2 = Cr*51 + Cb*24 */
124 add r2, r2, r2, asl #4
125 add r2, r2, r0, asl #3
126 add r2, r2, r0, asl #4
127
128 add r4, r1, r1, asl #2 /* r1 = Cr*101 */
129 add r4, r4, r1, asl #5
130 add r1, r4, r1, asl #6
131
132 add r1, r1, #256 /* r1 = rv = (r1 + 256) >> 9 */
133 mov r1, r1, asr #9
134 rsb r2, r2, #128 /* r2 = guv = (-r2 + 128) >> 8 */
135 mov r2, r2, asr #8
136 add r0, r0, #2 /* r0 = bu = (Cb*128 + 256) >> 9 */
137 mov r0, r0, asr #2
138 stmia r8!, {r0-r2} /* store r0, r1 and r2 to chroma buffer */
139
140 /* 1st loop, first pixel */
141 ldrb r5, [r9], #1 /* r5 = *ysrc++ = *Y'_p++ */
142 sub r5, r5, #16 /* r5 = (Y'-16) * 74 */
143 add r3, r5, r5, asl #2
144 add r5, r3, r5, asl #5
145
146 add r6, r1, r5, asr #8 /* r6 = r = (Y >> 9) + rv */
147 add r3, r2, r5, asr #7 /* r3 = g = (Y >> 8) + guv */
148 add r4, r0, r5, asr #8 /* r4 = b = (Y >> 9) + bu */
149
150 orr r5, r6, r4 /* check if clamping is needed... */
151 orr r5, r5, r3, asr #1 /* ...at all */
152 cmp r5, #31
153 bls 15f /* -> no clamp */
154 cmp r6, #31 /* clamp r */
155 mvnhi r6, r6, asr #31
156 andhi r6, r6, #31
157 cmp r3, #63 /* clamp g */
158 mvnhi r3, r3, asr #31
159 andhi r3, r3, #63
160 cmp r4, #31 /* clamp b */
161 mvnhi r4, r4, asr #31
162 andhi r4, r4, #31
16315: /* no clamp */
164
165 /* calculate pixel_1 and save to r4 for later pixel packing */
166 orr r4, r4, r3, lsl #5 /* pixel_1 = r<<11 | g<<5 | b */
167 orr r4, r4, r6, lsl #11 /* r4 = pixel_1 */
168
169 /* 1st loop, second pixel */
170 ldrb r5, [r9], #1 /* r5 = *ysrc++ = *Y'_p++ */
171 sub r5, r5, #16 /* r5 = (Y'-16) * 74 */
172 add r3, r5, r5, asl #2
173 add r5, r3, r5, asl #5
174
175 add r6, r1, r5, asr #8 /* r6 = r = (Y >> 9) + rv */
176 add r3, r2, r5, asr #7 /* r3 = g = (Y >> 8) + guv */
177 add r5, r0, r5, asr #8 /* r5 = b = (Y >> 9) + bu */
178
179 orr r0, r6, r5 /* check if clamping is needed... */
180 orr r0, r0, r3, asr #1 /* ...at all */
181 cmp r0, #31
182 bls 15f /* -> no clamp */
183 cmp r6, #31 /* clamp r */
184 mvnhi r6, r6, asr #31
185 andhi r6, r6, #31
186 cmp r3, #63 /* clamp g */
187 mvnhi r3, r3, asr #31
188 andhi r3, r3, #63
189 cmp r5, #31 /* clamp b */
190 mvnhi r5, r5, asr #31
191 andhi r5, r5, #31
19215: /* no clamp */
193
194 /* calculate pixel_2 and pack with pixel_1 before writing */
195 orr r5, r5, r3, lsl #5 /* pixel_2 = r<<11 | g<<5 | b */
196 orr r5, r5, r6, lsl #11 /* r5 = pixel_2 */
197#ifdef FORCE_FIFO_WAIT
198 /* wait for FIFO half full */
199.fifo_wait1:
200 ldr r3, [lr, #-0x24] /* while (LCD_STATUS & 0x08); */
201 tst r3, #0x8
202 bgt .fifo_wait1
203#endif
204 stmia lr, {r4,r5} /* write pixel_1 and pixel_2 */
205
206 subs r7, r7, #2 /* check for loop end */
207 bgt 10b /* back to beginning */
208 /* 1st loop end */
209
210 /* Reload several registers for pointer rewinding for next loop */
211 add r8, sp, #16 /* chroma buffer */
212 ldmia sp, { r1, r7, r9} /* r1 = LCD_BASE */
213 /* r7 = loop count */
214 /* r9 = &ysrc[stride] */
215
216 /* 2nd loop start */
21720: /* loop start */
218 /* restore r0 (bu), r1 (rv) and r2 (guv) from chroma buffer */
219 ldmia r8!, {r0-r2}
220
221 /* 2nd loop, first pixel */
222 ldrb r5, [r9], #1 /* r5 = *ysrc++ = *Y'_p++ */
223 sub r5, r5, #16 /* r5 = (Y'-16) * 74 */
224 add r3, r5, r5, asl #2
225 add r5, r3, r5, asl #5
226
227 add r6, r1, r5, asr #8 /* r6 = r = (Y >> 9) + rv */
228 add r3, r2, r5, asr #7 /* r3 = g = (Y >> 8) + guv */
229 add r4, r0, r5, asr #8 /* r4 = b = (Y >> 9) + bu */
230
231 orr r5, r6, r4 /* check if clamping is needed... */
232 orr r5, r5, r3, asr #1 /* ...at all */
233 cmp r5, #31
234 bls 15f /* -> no clamp */
235 cmp r6, #31 /* clamp r */
236 mvnhi r6, r6, asr #31
237 andhi r6, r6, #31
238 cmp r3, #63 /* clamp g */
239 mvnhi r3, r3, asr #31
240 andhi r3, r3, #63
241 cmp r4, #31 /* clamp b */
242 mvnhi r4, r4, asr #31
243 andhi r4, r4, #31
24415: /* no clamp */
245 /* calculate pixel_1 and save to r4 for later pixel packing */
246 orr r4, r4, r3, lsl #5 /* pixel_1 = r<<11 | g<<5 | b */
247 orr r4, r4, r6, lsl #11 /* r4 = pixel_1 */
248
249 /* 2nd loop, second pixel */
250 ldrb r5, [r9], #1 /* r5 = *ysrc++ = *Y'_p++ */
251 sub r5, r5, #16 /* r5 = (Y'-16) * 74 */
252 add r3, r5, r5, asl #2
253 add r5, r3, r5, asl #5
254
255 add r6, r1, r5, asr #8 /* r6 = r = (Y >> 9) + rv */
256 add r3, r2, r5, asr #7 /* r3 = g = (Y >> 8) + guv */
257 add r5, r0, r5, asr #8 /* r5 = b = (Y >> 9) + bu */
258
259 orr r0, r6, r5 /* check if clamping is needed... */
260 orr r0, r0, r3, asr #1 /* ...at all */
261 cmp r0, #31
262 bls 15f /* -> no clamp */
263 cmp r6, #31 /* clamp r */
264 mvnhi r6, r6, asr #31
265 andhi r6, r6, #31
266 cmp r3, #63 /* clamp g */
267 mvnhi r3, r3, asr #31
268 andhi r3, r3, #63
269 cmp r5, #31 /* clamp b */
270 mvnhi r5, r5, asr #31
271 andhi r5, r5, #31
27215: /* no clamp */
273
274 /* calculate pixel_2 and pack with pixel_1 before writing */
275 orr r5, r5, r3, lsl #5 /* pixel_2 = r<<11 | g<<5 | b */
276 orr r5, r5, r6, lsl #11 /* r5 = pixel_2 */
277#ifdef FORCE_FIFO_WAIT
278 /* wait for FIFO half full */
279.fifo_wait2:
280 ldr r3, [lr, #-0x24] /* while (LCD_STATUS & 0x08); */
281 tst r3, #0x8
282 bgt .fifo_wait2
283#endif
284 stmia lr, {r4,r5} /* write pixel_1 and pixel_2 */
285
286 subs r7, r7, #2 /* check for loop end */
287 bgt 20b /* back to beginning */
288 /* 2nd loop end */
289
290 ldr r3, [sp, #12]
291 add sp, sp, r3 /* deallocate buffer */
292 ldmpc regs=r4-r10 /* restore registers */
293
294 .ltorg
295 .size lcd_write_yuv420_lines, .-lcd_write_yuv420_lines
diff --git a/firmware/target/arm/s5l8702/ipod6g/lcd-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/lcd-ipod6g.c
new file mode 100644
index 0000000000..1de6a8e62f
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/lcd-ipod6g.c
@@ -0,0 +1,286 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: lcd-nano2g.c 28868 2010-12-21 06:59:17Z Buschel $
9 *
10 * Copyright (C) 2009 by Dave Chapman
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22
23#include "hwcompat.h"
24#include "kernel.h"
25#include "lcd.h"
26#include "system.h"
27#include "cpu.h"
28#include "pmu-target.h"
29#include "power.h"
30
31
32#define R_HORIZ_GRAM_ADDR_SET 0x200
33#define R_VERT_GRAM_ADDR_SET 0x201
34#define R_WRITE_DATA_TO_GRAM 0x202
35#define R_HORIZ_ADDR_START_POS 0x210
36#define R_HORIZ_ADDR_END_POS 0x211
37#define R_VERT_ADDR_START_POS 0x212
38#define R_VERT_ADDR_END_POS 0x213
39
40
41/* LCD type 1 register defines */
42
43#define R_COLUMN_ADDR_SET 0x2a
44#define R_ROW_ADDR_SET 0x2b
45#define R_MEMORY_WRITE 0x2c
46
47
48/** globals **/
49
50int lcd_type; /* also needed in debug-s5l8702.c */
51
52
53static inline void s5l_lcd_write_cmd_data(int cmd, int data)
54{
55 while (LCD_STATUS & 0x10);
56 LCD_WCMD = cmd;
57
58 while (LCD_STATUS & 0x10);
59 LCD_WDATA = data;
60}
61
62static inline void s5l_lcd_write_cmd(unsigned short cmd)
63{
64 while (LCD_STATUS & 0x10);
65 LCD_WCMD = cmd;
66}
67
68static inline void s5l_lcd_write_data(unsigned short data)
69{
70 while (LCD_STATUS & 0x10);
71 LCD_WDATA = data;
72}
73
74/*** hardware configuration ***/
75
76int lcd_default_contrast(void)
77{
78 return 0x1f;
79}
80
81void lcd_set_contrast(int val)
82{
83 (void)val;
84}
85
86void lcd_set_invert_display(bool yesno)
87{
88 (void)yesno;
89}
90
91void lcd_set_flip(bool yesno)
92{
93 (void)yesno;
94}
95
96bool lcd_active(void)
97{
98 return true;
99}
100
101void lcd_shutdown(void)
102{
103 pmu_write(0x2b, 0); /* Kill the backlight, instantly. */
104 pmu_write(0x29, 0);
105
106 if (lcd_type == 3)
107 {
108 s5l_lcd_write_cmd_data(0x7, 0x172);
109 s5l_lcd_write_cmd_data(0x30, 0x3ff);
110 sleep(HZ / 10);
111 s5l_lcd_write_cmd_data(0x7, 0x120);
112 s5l_lcd_write_cmd_data(0x30, 0x0);
113 s5l_lcd_write_cmd_data(0x100, 0x780);
114 s5l_lcd_write_cmd_data(0x7, 0x0);
115 s5l_lcd_write_cmd_data(0x101, 0x260);
116 s5l_lcd_write_cmd_data(0x102, 0xa9);
117 sleep(HZ / 30);
118 s5l_lcd_write_cmd_data(0x100, 0x700);
119 s5l_lcd_write_cmd_data(0x100, 0x704);
120 }
121 else if (lcd_type == 1)
122 {
123 s5l_lcd_write_cmd(0x28);
124 s5l_lcd_write_cmd(0x10);
125 sleep(HZ / 10);
126 }
127 else
128 {
129 s5l_lcd_write_cmd(0x28);
130 sleep(HZ / 20);
131 s5l_lcd_write_cmd(0x10);
132 sleep(HZ / 20);
133 }
134}
135
136void lcd_sleep(void)
137{
138 lcd_shutdown();
139}
140
141/* LCD init */
142void lcd_init_device(void)
143{
144 /* Detect lcd type */
145 lcd_type = (PDAT6 & 0x30) >> 4;
146}
147
148/*** Update functions ***/
149
150static inline void lcd_write_pixel(fb_data pixel)
151{
152 LCD_WDATA = pixel;
153}
154
155/* Update the display.
156 This must be called after all other LCD functions that change the display. */
157void lcd_update(void) ICODE_ATTR;
158void lcd_update(void)
159{
160 lcd_update_rect(0, 0, LCD_WIDTH, LCD_HEIGHT);
161}
162
163/* Line write helper function. */
164extern void lcd_write_line(const fb_data *addr,
165 int pixelcount,
166 const unsigned int lcd_base_addr);
167
168/* Update a fraction of the display. */
169void lcd_update_rect(int, int, int, int) ICODE_ATTR;
170void lcd_update_rect(int x, int y, int width, int height)
171{
172 int y0, x0, y1, x1;
173 fb_data* p;
174
175 /* Both x and width need to be preprocessed due to asm optimizations */
176 x = x & ~1; /* ensure x is even */
177 width = (width + 3) & ~3; /* ensure width is a multiple of 4 */
178
179 x0 = x; /* start horiz */
180 y0 = y; /* start vert */
181 x1 = (x + width) - 1; /* max horiz */
182 y1 = (y + height) - 1; /* max vert */
183
184 if (lcd_type & 2) {
185 s5l_lcd_write_cmd_data(R_HORIZ_ADDR_START_POS, x0);
186 s5l_lcd_write_cmd_data(R_HORIZ_ADDR_END_POS, x1);
187 s5l_lcd_write_cmd_data(R_VERT_ADDR_START_POS, y0);
188 s5l_lcd_write_cmd_data(R_VERT_ADDR_END_POS, y1);
189
190 s5l_lcd_write_cmd_data(R_HORIZ_GRAM_ADDR_SET, (x1 << 8) | x0);
191 s5l_lcd_write_cmd_data(R_VERT_GRAM_ADDR_SET, (y1 << 8) | y0);
192
193 s5l_lcd_write_cmd(R_WRITE_DATA_TO_GRAM);
194 } else {
195 s5l_lcd_write_cmd(R_COLUMN_ADDR_SET);
196 s5l_lcd_write_data(x0 >> 8);
197 s5l_lcd_write_data(x0 & 0xff);
198 s5l_lcd_write_data(x1 >> 8);
199 s5l_lcd_write_data(x1 & 0xff);
200
201 s5l_lcd_write_cmd(R_ROW_ADDR_SET);
202 s5l_lcd_write_data(y0 >> 8);
203 s5l_lcd_write_data(y0 & 0xff);
204 s5l_lcd_write_data(y1 >> 8);
205 s5l_lcd_write_data(y1 & 0xff);
206
207 s5l_lcd_write_cmd(R_MEMORY_WRITE);
208 }
209 for (y = y0; y <= y1; y++)
210 for (x = x0; x <= x1; x++)
211 s5l_lcd_write_data(lcd_framebuffer[y][x]);
212 return;
213
214 /* Copy display bitmap to hardware */
215 p = &lcd_framebuffer[y0][x0];
216 if (LCD_WIDTH == width) {
217 /* Write all lines at once */
218 lcd_write_line(p, height*LCD_WIDTH, LCD_BASE);
219 } else {
220 y1 = height;
221 do {
222 /* Write a single line */
223 lcd_write_line(p, width, LCD_BASE);
224 p += LCD_WIDTH;
225 } while (--y1 > 0 );
226 }
227}
228
229/* Line write helper function for lcd_yuv_blit. Writes two lines of yuv420. */
230extern void lcd_write_yuv420_lines(unsigned char const * const src[3],
231 const unsigned int lcd_baseadress,
232 int width,
233 int stride);
234
235/* Blit a YUV bitmap directly to the LCD */
236void lcd_blit_yuv(unsigned char * const src[3],
237 int src_x, int src_y, int stride,
238 int x, int y, int width, int height)
239{
240 unsigned int z, y0, x0, y1, x1;;
241 unsigned char const * yuv_src[3];
242
243 width = (width + 1) & ~1; /* ensure width is even */
244
245 x0 = x; /* start horiz */
246 y0 = y; /* start vert */
247 x1 = (x + width) - 1; /* max horiz */
248 y1 = (y + height) - 1; /* max vert */
249
250 if (lcd_type & 2) {
251 s5l_lcd_write_cmd_data(R_HORIZ_ADDR_START_POS, x0);
252 s5l_lcd_write_cmd_data(R_HORIZ_ADDR_END_POS, x1);
253 s5l_lcd_write_cmd_data(R_VERT_ADDR_START_POS, y0);
254 s5l_lcd_write_cmd_data(R_VERT_ADDR_END_POS, y1);
255
256 s5l_lcd_write_cmd_data(R_HORIZ_GRAM_ADDR_SET, (x1 << 8) | x0);
257 s5l_lcd_write_cmd_data(R_VERT_GRAM_ADDR_SET, (y1 << 8) | y0);
258
259 s5l_lcd_write_cmd(0);
260 s5l_lcd_write_cmd(R_WRITE_DATA_TO_GRAM);
261 } else {
262 s5l_lcd_write_cmd(R_COLUMN_ADDR_SET);
263 s5l_lcd_write_data(x0); /* Start column */
264 s5l_lcd_write_data(x1); /* End column */
265
266 s5l_lcd_write_cmd(R_ROW_ADDR_SET);
267 s5l_lcd_write_data(y0); /* Start row */
268 s5l_lcd_write_data(y1); /* End row */
269
270 s5l_lcd_write_cmd(R_MEMORY_WRITE);
271 }
272
273 z = stride * src_y;
274 yuv_src[0] = src[0] + z + src_x;
275 yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1);
276 yuv_src[2] = src[2] + (yuv_src[1] - src[1]);
277
278 height >>= 1;
279
280 do {
281 lcd_write_yuv420_lines(yuv_src, LCD_BASE, width, stride);
282 yuv_src[0] += stride << 1;
283 yuv_src[1] += stride >> 1; /* Skip down one chroma line */
284 yuv_src[2] += stride >> 1;
285 } while (--height > 0);
286}
diff --git a/firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c
new file mode 100644
index 0000000000..73d8f98083
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/pmu-ipod6g.c
@@ -0,0 +1,143 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: pmu-nano2g.c 27752 2010-08-08 10:49:32Z bertrik $
9 *
10 * Copyright © 2008 Rafaël Carré
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "config.h"
23#include "kernel.h"
24#include "i2c-s5l8702.h"
25#include "pmu-target.h"
26
27static struct mutex pmu_adc_mutex;
28
29int pmu_read_multiple(int address, int count, unsigned char* buffer)
30{
31 return i2c_read(0, 0xe6, address, count, buffer);
32}
33
34int pmu_write_multiple(int address, int count, unsigned char* buffer)
35{
36 return i2c_write(0, 0xe6, address, count, buffer);
37}
38
39unsigned char pmu_read(int address)
40{
41 unsigned char tmp;
42
43 pmu_read_multiple(address, 1, &tmp);
44
45 return tmp;
46}
47
48int pmu_write(int address, unsigned char val)
49{
50 return pmu_write_multiple(address, 1, &val);
51}
52
53void pmu_init(void)
54{
55 mutex_init(&pmu_adc_mutex);
56}
57
58int pmu_read_adc(unsigned int adc)
59{
60 int data = 0;
61 mutex_lock(&pmu_adc_mutex);
62 pmu_write(0x54, 5 | (adc << 4));
63 while ((data & 0x80) == 0)
64 {
65 yield();
66 data = pmu_read(0x57);
67 }
68 int value = (pmu_read(0x55) << 2) | (data & 3);
69 mutex_unlock(&pmu_adc_mutex);
70 return value;
71}
72
73/* millivolts */
74int pmu_read_battery_voltage(void)
75{
76 return pmu_read_adc(0) * 6;
77}
78
79/* milliamps */
80int pmu_read_battery_current(void)
81{
82// return pmu_read_adc(2);
83 return 0;
84}
85
86void pmu_ldo_on_in_standby(unsigned int ldo, int onoff)
87{
88 if (ldo < 4)
89 {
90 unsigned char newval = pmu_read(0x3B) & ~(1 << (2 * ldo));
91 if (onoff) newval |= 1 << (2 * ldo);
92 pmu_write(0x3B, newval);
93 }
94 else if (ldo < 8)
95 {
96 unsigned char newval = pmu_read(0x3C) & ~(1 << (2 * (ldo - 4)));
97 if (onoff) newval |= 1 << (2 * (ldo - 4));
98 pmu_write(0x3C, newval);
99 }
100}
101
102void pmu_ldo_set_voltage(unsigned int ldo, unsigned char voltage)
103{
104 if (ldo > 6) return;
105 pmu_write(0x2d + (ldo << 1), voltage);
106}
107
108void pmu_hdd_power(bool on)
109{
110 pmu_write(0x1b, on ? 1 : 0);
111}
112
113void pmu_ldo_power_on(unsigned int ldo)
114{
115 if (ldo > 6) return;
116 pmu_write(0x2e + (ldo << 1), 1);
117}
118
119void pmu_ldo_power_off(unsigned int ldo)
120{
121 if (ldo > 6) return;
122 pmu_write(0x2e + (ldo << 1), 0);
123}
124
125void pmu_set_wake_condition(unsigned char condition)
126{
127 pmu_write(0xd, condition);
128}
129
130void pmu_enter_standby(void)
131{
132 pmu_write(0xc, 1);
133}
134
135void pmu_read_rtc(unsigned char* buffer)
136{
137 pmu_read_multiple(0x59, 7, buffer);
138}
139
140void pmu_write_rtc(unsigned char* buffer)
141{
142 pmu_write_multiple(0x59, 7, buffer);
143}
diff --git a/firmware/target/arm/s5l8702/ipod6g/pmu-target.h b/firmware/target/arm/s5l8702/ipod6g/pmu-target.h
new file mode 100644
index 0000000000..a8c7851d97
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/pmu-target.h
@@ -0,0 +1,46 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: pmu-target.h 24721 2010-02-17 15:54:48Z theseven $
9 *
10 * Copyright © 2009 Michael Sparmann
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#ifndef __PMU_TARGET_H__
23#define __PMU_TARGET_H__
24
25#include <stdbool.h>
26#include "config.h"
27
28unsigned char pmu_read(int address);
29int pmu_write(int address, unsigned char val);
30int pmu_read_multiple(int address, int count, unsigned char* buffer);
31int pmu_write_multiple(int address, int count, unsigned char* buffer);
32int pmu_read_adc(unsigned int adc);
33int pmu_read_battery_voltage(void);
34int pmu_read_battery_current(void);
35void pmu_init(void);
36void pmu_ldo_on_in_standby(unsigned int ldo, int onoff);
37void pmu_ldo_set_voltage(unsigned int ldo, unsigned char voltage);
38void pmu_ldo_power_on(unsigned int ldo);
39void pmu_ldo_power_off(unsigned int ldo);
40void pmu_set_wake_condition(unsigned char condition);
41void pmu_enter_standby(void);
42void pmu_read_rtc(unsigned char* buffer);
43void pmu_write_rtc(unsigned char* buffer);
44void pmu_hdd_power(bool on);
45
46#endif
diff --git a/firmware/target/arm/s5l8702/ipod6g/power-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/power-ipod6g.c
new file mode 100644
index 0000000000..973e26968f
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/power-ipod6g.c
@@ -0,0 +1,75 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: power-nano2g.c 28190 2010-10-01 18:09:10Z Buschel $
9 *
10 * Copyright © 2009 Bertrik Sikken
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include <stdbool.h>
22#include "config.h"
23#include "inttypes.h"
24#include "s5l8702.h"
25#include "power.h"
26#include "panic.h"
27#include "pmu-target.h"
28#include "usb_core.h" /* for usb_charging_maxcurrent_change */
29
30static int idepowered;
31
32void power_off(void)
33{
34 pmu_set_wake_condition(0x42); /* USB inserted or EXTON1 */
35 pmu_enter_standby();
36
37 while(1);
38}
39
40void power_init(void)
41{
42 idepowered = false;
43}
44
45void ide_power_enable(bool on)
46{
47 idepowered = on;
48 pmu_hdd_power(on);
49}
50
51bool ide_powered()
52{
53 return idepowered;
54}
55
56#if CONFIG_CHARGING
57
58#ifdef HAVE_USB_CHARGING_ENABLE
59void usb_charging_maxcurrent_change(int maxcurrent)
60{
61 bool on = (maxcurrent >= 500);
62 GPIOCMD = 0xb060e | (on ? 1 : 0);
63}
64#endif
65
66unsigned int power_input_status(void)
67{
68 return (PDAT(12) & 8) ? POWER_INPUT_NONE : POWER_INPUT_MAIN_CHARGER;
69}
70
71bool charging_state(void)
72{
73 return false; //TODO: Figure out
74}
75#endif /* CONFIG_CHARGING */
diff --git a/firmware/target/arm/s5l8702/ipod6g/powermgmt-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/powermgmt-ipod6g.c
new file mode 100644
index 0000000000..3bd3791eeb
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/powermgmt-ipod6g.c
@@ -0,0 +1,88 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: powermgmt-nano2g.c 28159 2010-09-24 22:42:06Z Buschel $
9 *
10 * Copyright © 2008 Rafaël Carré
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "config.h"
23#include "powermgmt.h"
24#include "pmu-target.h"
25#include "power.h"
26#include "audiohw.h"
27
28const unsigned short battery_level_dangerous[BATTERY_TYPES_COUNT] =
29{
30 3600
31};
32
33const unsigned short battery_level_shutoff[BATTERY_TYPES_COUNT] =
34{
35 3350
36};
37
38/* voltages (millivolt) of 0%, 10%, ... 100% when charging disabled */
39const unsigned short percent_to_volt_discharge[BATTERY_TYPES_COUNT][11] =
40{
41 { 3550, 3783, 3830, 3882, 3911, 3949, 3996, 4067, 4148, 4228, 4310 }
42};
43
44#if CONFIG_CHARGING
45/* voltages (millivolt) of 0%, 10%, ... 100% when charging enabled */
46const unsigned short percent_to_volt_charge[11] =
47{
48 3550, 3783, 3830, 3882, 3911, 3949, 3996, 4067, 4148, 4228, 4310
49};
50#endif /* CONFIG_CHARGING */
51
52/* ADC should read 0x3ff=6.00V */
53#define BATTERY_SCALE_FACTOR 6000
54/* full-scale ADC readout (2^10) in millivolt */
55
56
57/* Returns battery voltage from ADC [millivolts] */
58unsigned int battery_adc_voltage(void)
59{
60 int compensation = (10 * (pmu_read_battery_current() - 7)) / 12;
61 if (charging_state()) return pmu_read_battery_voltage() - compensation;
62 return pmu_read_battery_voltage() + compensation;
63}
64
65
66#ifdef HAVE_ACCESSORY_SUPPLY
67void accessory_supply_set(bool enable)
68{
69 if (enable)
70 {
71 /* Accessory voltage supply on */
72//TODO: pmu_ldo_power_on(6);
73 }
74 else
75 {
76 /* Accessory voltage supply off */
77//TODO: pmu_ldo_power_off(6);
78 }
79}
80#endif
81
82#ifdef HAVE_LINEOUT_POWEROFF
83void lineout_set(bool enable)
84{
85 /* Call audio hardware driver implementation */
86 audiohw_enable_lineout(enable);
87}
88#endif
diff --git a/firmware/target/arm/s5l8702/ipod6g/rtc-ipod6g.c b/firmware/target/arm/s5l8702/ipod6g/rtc-ipod6g.c
new file mode 100644
index 0000000000..76ef8ecb00
--- /dev/null
+++ b/firmware/target/arm/s5l8702/ipod6g/rtc-ipod6g.c
@@ -0,0 +1,72 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: rtc-nano2g.c 23114 2009-10-11 18:20:56Z theseven $
9 *
10 * Copyright (C) 2002 by Linus Nielsen Feltzing, Uwe Freese, Laurent Baum
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "rtc.h"
23#include "kernel.h"
24#include "system.h"
25#include "pmu-target.h"
26
27void rtc_init(void)
28{
29}
30
31int rtc_read_datetime(struct tm *tm)
32{
33 unsigned int i;
34 unsigned char buf[7];
35
36 pmu_read_rtc(buf);
37
38 for (i = 0; i < sizeof(buf); i++)
39 buf[i] = BCD2DEC(buf[i]);
40
41 tm->tm_sec = buf[0];
42 tm->tm_min = buf[1];
43 tm->tm_hour = buf[2];
44 tm->tm_wday = buf[3];
45 tm->tm_mday = buf[4];
46 tm->tm_mon = buf[5] - 1;
47 tm->tm_year = buf[6] + 100;
48
49 return 0;
50}
51
52int rtc_write_datetime(const struct tm *tm)
53{
54 unsigned int i;
55 unsigned char buf[7];
56
57 buf[0] = tm->tm_sec;
58 buf[1] = tm->tm_min;
59 buf[2] = tm->tm_hour;
60 buf[3] = tm->tm_wday;
61 buf[4] = tm->tm_mday;
62 buf[5] = tm->tm_mon + 1;
63 buf[6] = tm->tm_year - 100;
64
65 for (i = 0; i < sizeof(buf); i++)
66 buf[i] = DEC2BCD(buf[i]);
67
68 pmu_write_rtc(buf);
69
70 return 0;
71}
72
diff --git a/firmware/target/arm/s5l8702/kernel-s5l8702.c b/firmware/target/arm/s5l8702/kernel-s5l8702.c
new file mode 100644
index 0000000000..67dabd5f3f
--- /dev/null
+++ b/firmware/target/arm/s5l8702/kernel-s5l8702.c
@@ -0,0 +1,56 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: kernel-s5l8700.c 28795 2010-12-11 17:52:52Z Buschel $
9 *
10 * Copyright © 2009 Bertrik Sikken
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "system.h"
23#include "kernel.h"
24
25/* S5L8702 driver for the kernel timer
26
27 Timer B is configured as a 10 kHz timer
28 */
29
30void INT_TIMERB(void)
31{
32 /* clear interrupt */
33 TBCON = TBCON;
34
35 call_tick_tasks(); /* Run through the list of tick tasks */
36}
37
38void tick_start(unsigned int interval_in_ms)
39{
40 int cycles = 10 * interval_in_ms;
41
42 /* configure timer for 10 kHz */
43 TBCMD = (1 << 1); /* TB_CLR */
44 TBPRE = 208 - 1; /* prescaler */
45 TBCON = (0 << 13) | /* TB_INT1_EN */
46 (1 << 12) | /* TB_INT0_EN */
47 (0 << 11) | /* TB_START */
48 (2 << 8) | /* TB_CS = PCLK / 16 */
49 (0 << 4); /* TB_MODE_SEL = interval mode */
50 TBDATA0 = cycles; /* set interval period */
51 TBCMD = (1 << 0); /* TB_EN */
52
53 /* enable timer interrupt */
54 VIC0INTENABLE = 1 << IRQ_TIMER;
55}
56
diff --git a/firmware/target/arm/s5l8702/pcm-s5l8702.c b/firmware/target/arm/s5l8702/pcm-s5l8702.c
new file mode 100644
index 0000000000..7966eaddbd
--- /dev/null
+++ b/firmware/target/arm/s5l8702/pcm-s5l8702.c
@@ -0,0 +1,219 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: pcm-s5l8700.c 28600 2010-11-14 19:49:20Z Buschel $
9 *
10 * Copyright © 2011 Michael Sparmann
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include <string.h>
22
23#include "config.h"
24#include "system.h"
25#include "audio.h"
26#include "s5l8702.h"
27#include "panic.h"
28#include "audiohw.h"
29#include "pcm.h"
30#include "pcm_sampr.h"
31#include "mmu-arm.h"
32
33/* S5L8702 PCM driver tunables: */
34#define LLIMAX (2047) /* Maximum number of samples per LLI */
35#define CHUNKSIZE (8700) /* Maximum number of samples to handle with one IRQ */
36 /* (bigger chunks will be segmented internally) */
37#define WATERMARK (512) /* Number of remaining samples to schedule IRQ at */
38
39static volatile int locked = 0;
40static const int zerosample = 0;
41static unsigned char dblbuf[WATERMARK * 4] IBSS_ATTR;
42struct dma_lli lli[(CHUNKSIZE - WATERMARK + LLIMAX - 1) / LLIMAX + 1]
43 __attribute__((aligned(16)));
44static const unsigned char* dataptr;
45static size_t remaining;
46
47/* Mask the DMA interrupt */
48void pcm_play_lock(void)
49{
50 if (locked++ == 0) {
51 //TODO: Urgh, I don't like that at all...
52 VIC0INTENCLEAR = 1 << IRQ_DMAC0;
53 }
54}
55
56/* Unmask the DMA interrupt if enabled */
57void pcm_play_unlock(void)
58{
59 if (--locked == 0) {
60 VIC0INTENABLE = 1 << IRQ_DMAC0;
61 }
62}
63
64void INT_DMAC0C0(void) ICODE_ATTR;
65void INT_DMAC0C0(void)
66{
67 DMAC0INTTCCLR = 1;
68 if (!remaining) pcm_play_get_more_callback((void**)&dataptr, &remaining);
69 if (!remaining)
70 {
71 lli->nextlli = NULL;
72 lli->control = 0x75249000;
73 clean_dcache();
74 return;
75 }
76 uint32_t lastsize = MIN(WATERMARK * 4, remaining);
77 remaining -= lastsize;
78 struct dma_lli* lastlli;
79 if (remaining) lastlli = &lli[ARRAYLEN(lli) - 1];
80 else lastlli = lli;
81 uint32_t chunksize = MIN(CHUNKSIZE * 4 - lastsize, remaining);
82 if (remaining > chunksize && chunksize > remaining - WATERMARK * 4)
83 chunksize = remaining - WATERMARK * 4;
84 remaining -= chunksize;
85 bool last = !chunksize;
86 int i = 0;
87 while (chunksize)
88 {
89 uint32_t thislli = MIN(LLIMAX * 4, chunksize);
90 chunksize -= thislli;
91 lli[i].srcaddr = (void*)dataptr;
92 lli[i].dstaddr = (void*)((int)&I2STXDB0);
93 lli[i].nextlli = chunksize ? &lli[i + 1] : lastlli;
94 lli[i].control = (chunksize ? 0x75249000 : 0xf5249000) | (thislli / 2);
95 dataptr += thislli;
96 i++;
97 }
98 if (!remaining) memcpy(dblbuf, dataptr, lastsize);
99 lastlli->srcaddr = remaining ? dataptr : dblbuf;
100 lastlli->dstaddr = (void*)((int)&I2STXDB0);
101 lastlli->nextlli = last ? NULL : lli;
102 lastlli->control = (last ? 0xf5249000 : 0x75249000) | (lastsize / 2);
103 dataptr += lastsize;
104 clean_dcache();
105 if (!(DMAC0C0CONFIG & 1) && (lli[0].control & 0xfff))
106 {
107 DMAC0C0LLI = lli[0];
108 DMAC0C0CONFIG = 0x8a81;
109 }
110 else DMAC0C0NEXTLLI = lli;
111}
112
113void pcm_play_dma_start(const void* addr, size_t size)
114{
115 dataptr = (const unsigned char*)addr;
116 remaining = size;
117 I2STXCOM = 0xe;
118 DMAC0CONFIG |= 4;
119 INT_DMAC0C0();
120}
121
122void pcm_play_dma_stop(void)
123{
124 DMAC0C0CONFIG = 0x8a80;
125 I2STXCOM = 0xa;
126}
127
128/* pause playback by disabling LRCK */
129void pcm_play_dma_pause(bool pause)
130{
131 if (pause) I2STXCOM |= 1;
132 else I2STXCOM &= ~1;
133}
134
135void pcm_play_dma_init(void)
136{
137 PWRCON(0) &= ~(1 << 4);
138 PWRCON(1) &= ~(1 << 7);
139 I2S40 = 0x110;
140 I2STXCON = 0xb100059;
141 I2SCLKCON = 1;
142 VIC0INTENABLE = 1 << IRQ_DMAC0;
143
144 audiohw_preinit();
145}
146
147void pcm_postinit(void)
148{
149 audiohw_postinit();
150}
151
152void pcm_dma_apply_settings(void)
153{
154}
155
156size_t pcm_get_bytes_waiting(void)
157{
158 int bytes = remaining + (DMAC0C0LLI.control & 0xfff) * 2;
159 const struct dma_lli* lli = DMAC0C0LLI.nextlli;
160 while (lli)
161 {
162 bytes += (lli->control & 0xfff) * 2;
163 lli = lli->nextlli;
164 }
165 return bytes;
166}
167
168const void* pcm_play_dma_get_peak_buffer(int *count)
169{
170 *count = (DMAC0C0LLI.control & 0xfff) * 2;
171 return (void*)(((uint32_t)DMAC0C0LLI.srcaddr) & ~3);
172}
173
174#ifdef HAVE_PCM_DMA_ADDRESS
175void * pcm_dma_addr(void *addr)
176{
177 return addr;
178}
179#endif
180
181
182/****************************************************************************
183 ** Recording DMA transfer
184 **/
185#ifdef HAVE_RECORDING
186void pcm_rec_lock(void)
187{
188}
189
190void pcm_rec_unlock(void)
191{
192}
193
194void pcm_rec_dma_stop(void)
195{
196}
197
198void pcm_rec_dma_start(void *addr, size_t size)
199{
200 (void)addr;
201 (void)size;
202}
203
204void pcm_rec_dma_close(void)
205{
206}
207
208
209void pcm_rec_dma_init(void)
210{
211}
212
213
214const void * pcm_rec_dma_get_peak_buffer(void)
215{
216 return NULL;
217}
218
219#endif /* HAVE_RECORDING */
diff --git a/firmware/target/arm/s5l8702/system-s5l8702.c b/firmware/target/arm/s5l8702/system-s5l8702.c
new file mode 100644
index 0000000000..6973738790
--- /dev/null
+++ b/firmware/target/arm/s5l8702/system-s5l8702.c
@@ -0,0 +1,268 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: system-s5l8700.c 28935 2010-12-30 20:23:46Z Buschel $
9 *
10 * Copyright (C) 2007 by Rob Purchase
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22#include "kernel.h"
23#include "system.h"
24#include "panic.h"
25#include "system-target.h"
26#include "pmu-target.h"
27
28#define default_interrupt(name) \
29 extern __attribute__((weak,alias("UIRQ"))) void name (void)
30
31void irq_handler(void) __attribute__((interrupt ("IRQ"), naked));
32void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked, \
33 weak, alias("fiq_dummy")));
34
35default_interrupt(INT_IRQ0);
36default_interrupt(INT_IRQ1);
37default_interrupt(INT_IRQ2);
38default_interrupt(INT_IRQ3);
39default_interrupt(INT_IRQ4);
40default_interrupt(INT_IRQ5);
41default_interrupt(INT_IRQ6);
42default_interrupt(INT_IRQ7);
43default_interrupt(INT_TIMERA);
44default_interrupt(INT_TIMERB);
45default_interrupt(INT_TIMERC);
46default_interrupt(INT_TIMERD);
47default_interrupt(INT_TIMERE);
48default_interrupt(INT_TIMERF);
49default_interrupt(INT_TIMERG);
50default_interrupt(INT_TIMERH);
51default_interrupt(INT_IRQ9);
52default_interrupt(INT_IRQ10);
53default_interrupt(INT_IRQ11);
54default_interrupt(INT_IRQ12);
55default_interrupt(INT_IRQ13);
56default_interrupt(INT_IRQ14);
57default_interrupt(INT_IRQ15);
58default_interrupt(INT_DMAC0C0);
59default_interrupt(INT_DMAC0C1);
60default_interrupt(INT_DMAC0C2);
61default_interrupt(INT_DMAC0C3);
62default_interrupt(INT_DMAC0C4);
63default_interrupt(INT_DMAC0C5);
64default_interrupt(INT_DMAC0C6);
65default_interrupt(INT_DMAC0C7);
66default_interrupt(INT_DMAC1C0);
67default_interrupt(INT_DMAC1C1);
68default_interrupt(INT_DMAC1C2);
69default_interrupt(INT_DMAC1C3);
70default_interrupt(INT_DMAC1C4);
71default_interrupt(INT_DMAC1C5);
72default_interrupt(INT_DMAC1C6);
73default_interrupt(INT_DMAC1C7);
74default_interrupt(INT_IRQ18);
75default_interrupt(INT_USB_FUNC);
76default_interrupt(INT_IRQ20);
77default_interrupt(INT_IRQ21);
78default_interrupt(INT_IRQ22);
79default_interrupt(INT_WHEEL);
80default_interrupt(INT_IRQ24);
81default_interrupt(INT_IRQ25);
82default_interrupt(INT_IRQ26);
83default_interrupt(INT_IRQ27);
84default_interrupt(INT_IRQ28);
85default_interrupt(INT_ATA);
86default_interrupt(INT_IRQ30);
87default_interrupt(INT_IRQ31);
88default_interrupt(INT_IRQ32);
89default_interrupt(INT_IRQ33);
90default_interrupt(INT_IRQ34);
91default_interrupt(INT_IRQ35);
92default_interrupt(INT_IRQ36);
93default_interrupt(INT_IRQ37);
94default_interrupt(INT_IRQ38);
95default_interrupt(INT_IRQ39);
96default_interrupt(INT_IRQ40);
97default_interrupt(INT_IRQ41);
98default_interrupt(INT_IRQ42);
99default_interrupt(INT_IRQ43);
100default_interrupt(INT_IRQ44);
101default_interrupt(INT_IRQ45);
102default_interrupt(INT_IRQ46);
103default_interrupt(INT_IRQ47);
104default_interrupt(INT_IRQ48);
105default_interrupt(INT_IRQ49);
106default_interrupt(INT_IRQ50);
107default_interrupt(INT_IRQ51);
108default_interrupt(INT_IRQ52);
109default_interrupt(INT_IRQ53);
110default_interrupt(INT_IRQ54);
111default_interrupt(INT_IRQ55);
112default_interrupt(INT_IRQ56);
113default_interrupt(INT_IRQ57);
114default_interrupt(INT_IRQ58);
115default_interrupt(INT_IRQ59);
116default_interrupt(INT_IRQ60);
117default_interrupt(INT_IRQ61);
118default_interrupt(INT_IRQ62);
119default_interrupt(INT_IRQ63);
120
121
122int current_irq;
123
124
125void INT_TIMER(void) ICODE_ATTR;
126void INT_TIMER()
127{
128 if (TACON & (TACON >> 4) & 0x7000) INT_TIMERA();
129 if (TBCON & (TBCON >> 4) & 0x7000) INT_TIMERB();
130 if (TCCON & (TCCON >> 4) & 0x7000) INT_TIMERC();
131 if (TDCON & (TDCON >> 4) & 0x7000) INT_TIMERD();
132 if (TFCON & (TFCON >> 4) & 0x7000) INT_TIMERF();
133 if (TGCON & (TGCON >> 4) & 0x7000) INT_TIMERG();
134 if (THCON & (THCON >> 4) & 0x7000) INT_TIMERH();
135}
136
137void INT_DMAC0(void) ICODE_ATTR;
138void INT_DMAC0()
139{
140 uint32_t intsts = DMAC0INTSTS;
141 if (intsts & 1) INT_DMAC0C0();
142 if (intsts & 2) INT_DMAC0C1();
143 if (intsts & 4) INT_DMAC0C2();
144 if (intsts & 8) INT_DMAC0C3();
145 if (intsts & 0x10) INT_DMAC0C4();
146 if (intsts & 0x20) INT_DMAC0C5();
147 if (intsts & 0x40) INT_DMAC0C6();
148 if (intsts & 0x80) INT_DMAC0C7();
149}
150
151void INT_DMAC1(void) ICODE_ATTR;
152void INT_DMAC1()
153{
154 uint32_t intsts = DMAC1INTSTS;
155 if (intsts & 1) INT_DMAC1C0();
156 if (intsts & 2) INT_DMAC1C1();
157 if (intsts & 4) INT_DMAC1C2();
158 if (intsts & 8) INT_DMAC1C3();
159 if (intsts & 0x10) INT_DMAC1C4();
160 if (intsts & 0x20) INT_DMAC1C5();
161 if (intsts & 0x40) INT_DMAC1C6();
162 if (intsts & 0x80) INT_DMAC1C7();
163}
164
165static void (* const irqvector[])(void) =
166{
167 INT_IRQ0,INT_IRQ1,INT_IRQ2,INT_IRQ3,INT_IRQ4,INT_IRQ5,INT_IRQ6,INT_IRQ7,
168 INT_TIMER,INT_IRQ9,INT_IRQ10,INT_IRQ11,INT_IRQ12,INT_IRQ13,INT_IRQ14,INT_IRQ15,
169 INT_DMAC0,INT_DMAC1,INT_IRQ18,INT_USB_FUNC,INT_IRQ20,INT_IRQ21,INT_IRQ22,INT_WHEEL,
170 INT_IRQ24,INT_IRQ25,INT_IRQ26,INT_IRQ27,INT_IRQ28,INT_ATA,INT_IRQ30,INT_IRQ31,
171 INT_IRQ32,INT_IRQ33,INT_IRQ34,INT_IRQ35,INT_IRQ36,INT_IRQ37,INT_IRQ38,INT_IRQ39,
172 INT_IRQ40,INT_IRQ41,INT_IRQ42,INT_IRQ43,INT_IRQ55,INT_IRQ56,INT_IRQ57,INT_IRQ58,
173 INT_IRQ48,INT_IRQ49,INT_IRQ50,INT_IRQ51,INT_IRQ52,INT_IRQ53,INT_IRQ54,INT_IRQ55,
174 INT_IRQ56,INT_IRQ57,INT_IRQ58,INT_IRQ59,INT_IRQ60,INT_IRQ61,INT_IRQ62,INT_IRQ63
175};
176
177static void UIRQ(void)
178{
179 panicf("Unhandled IRQ %d!", current_irq);
180}
181
182void irq_handler(void)
183{
184 /*
185 * Based on: linux/arch/arm/kernel/entry-armv.S and system-meg-fx.c
186 */
187
188 asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */
189 "sub sp, sp, #8 \n"); /* Reserve stack */
190
191 void* dummy = VIC0ADDRESS;
192 dummy = VIC1ADDRESS;
193 uint32_t irqs0 = VIC0IRQSTATUS;
194 uint32_t irqs1 = VIC1IRQSTATUS;
195 for (current_irq = 0; irqs0; current_irq++, irqs0 >>= 1)
196 if (irqs0 & 1)
197 irqvector[current_irq]();
198 for (current_irq = 32; irqs1; current_irq++, irqs1 >>= 1)
199 if (irqs1 & 1)
200 irqvector[current_irq]();
201 VIC0ADDRESS = NULL;
202 VIC1ADDRESS = NULL;
203
204 asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */
205 "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */
206 "subs pc, lr, #4 \n"); /* Return from IRQ */
207}
208
209void fiq_dummy(void)
210{
211 asm volatile (
212 "subs pc, lr, #4 \r\n"
213 );
214}
215
216
217void system_init(void)
218{
219 pmu_init();
220 VIC0INTENABLE = 1 << IRQ_WHEEL;
221}
222
223void system_reboot(void)
224{
225 /* Reset the SoC */
226 asm volatile("msr CPSR_c, #0xd3 \n"
227 "mov r0, #0x100000 \n"
228 "mov r1, #0x3c800000 \n"
229 "str r0, [r1] \n");
230
231 /* Wait for reboot to kick in */
232 while(1);
233}
234
235//extern void post_mortem_stub(void);
236
237void system_exception_wait(void)
238{
239// post_mortem_stub();
240 while(1);
241}
242
243int system_memory_guard(int newmode)
244{
245 (void)newmode;
246 return 0;
247}
248
249#ifdef HAVE_ADJUSTABLE_CPU_FREQ
250
251void set_cpu_frequency(long frequency)
252{
253 if (cpu_frequency == frequency)
254 return;
255
256 if (frequency == CPUFREQ_MAX)
257 {
258 //TODO: Figure out and implement
259 }
260 else
261 {
262 //TODO: Figure out and implement
263 }
264
265 cpu_frequency = frequency;
266}
267
268#endif
diff --git a/firmware/target/arm/s5l8702/system-target.h b/firmware/target/arm/s5l8702/system-target.h
new file mode 100644
index 0000000000..96e0371526
--- /dev/null
+++ b/firmware/target/arm/s5l8702/system-target.h
@@ -0,0 +1,48 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id: system-target.h 28791 2010-12-11 09:39:33Z Buschel $
9 *
10 * Copyright (C) 2007 by Dave Chapman
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef SYSTEM_TARGET_H
22#define SYSTEM_TARGET_H
23
24#include "system-arm.h"
25#include "mmu-arm.h"
26
27//TODO: Figure out
28#define CPUFREQ_SLEEP 32768
29#define CPUFREQ_MAX (1843200 * 4 * 26 / 1) /* 191692800 Hz */
30#define CPUFREQ_DEFAULT (CPUFREQ_MAX/4) /* 47923200 Hz */
31#define CPUFREQ_NORMAL (CPUFREQ_MAX/4)
32
33#define STORAGE_WANTS_ALIGN
34
35#define inl(a) (*(volatile unsigned long *) (a))
36#define outl(a,b) (*(volatile unsigned long *) (b) = (a))
37#define inb(a) (*(volatile unsigned char *) (a))
38#define outb(a,b) (*(volatile unsigned char *) (b) = (a))
39#define inw(a) (*(volatile unsigned short*) (a))
40#define outw(a,b) (*(volatile unsigned short*) (b) = (a))
41
42static inline void udelay(unsigned usecs)
43{
44 unsigned stop = USEC_TIMER + usecs;
45 while (TIME_BEFORE(USEC_TIMER, stop));
46}
47
48#endif /* SYSTEM_TARGET_H */
diff --git a/firmware/target/arm/s5l8702/timer-s5l8702.c b/firmware/target/arm/s5l8702/timer-s5l8702.c
new file mode 100644
index 0000000000..fb56a9ffcf
--- /dev/null
+++ b/firmware/target/arm/s5l8702/timer-s5l8702.c
@@ -0,0 +1,94 @@
1/***************************************************************************
2* __________ __ ___.
3* Open \______ \ ____ ____ | | _\_ |__ _______ ___
4* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7* \/ \/ \/ \/ \/
8* $Id: timer-s5l8700.c 23103 2009-10-11 11:35:14Z theseven $
9*
10* Copyright (C) 2009 Bertrik Sikken
11*
12* This program is free software; you can redistribute it and/or
13* modify it under the terms of the GNU General Public License
14* as published by the Free Software Foundation; either version 2
15* of the License, or (at your option) any later version.
16*
17* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18* KIND, either express or implied.
19*
20****************************************************************************/
21
22#include "config.h"
23
24#include "inttypes.h"
25#include "s5l8702.h"
26#include "system.h"
27#include "timer.h"
28
29//TODO: This needs calibration once we figure out the clocking
30
31void INT_TIMERC(void)
32{
33 /* clear interrupt */
34 TCCON = TCCON;
35
36 if (pfn_timer != NULL) {
37 pfn_timer();
38 }
39}
40
41bool timer_set(long cycles, bool start)
42{
43 static const int cs_table[] = {1, 2, 4, 6};
44 int prescale, cs;
45 long count;
46
47 /* stop and clear timer */
48 TCCMD = (1 << 1); /* TD_CLR */
49
50 /* optionally unregister any previously registered timer user */
51 if (start) {
52 if (pfn_unregister != NULL) {
53 pfn_unregister();
54 pfn_unregister = NULL;
55 }
56 }
57
58 /* scale the count down with the clock select */
59 for (cs = 0; cs < 4; cs++) {
60 count = cycles >> cs_table[cs];
61 if ((count < 65536) || (cs == 3)) {
62 break;
63 }
64 }
65
66 /* scale the count down with the prescaler */
67 prescale = 1;
68 while (count >= 65536) {
69 count >>= 1;
70 prescale <<= 1;
71 }
72
73 /* configure timer */
74 TCCON = (1 << 12) | /* TD_INT0_EN */
75 (cs << 8) | /* TS_CS */
76 (0 << 4); /* TD_MODE_SEL, 0 = interval mode */
77 TCPRE = prescale - 1;
78 TCDATA0 = count;
79 TCCMD = (1 << 0); /* TD_ENABLE */
80
81 return true;
82}
83
84bool timer_start(void)
85{
86 TCCMD = (1 << 0); /* TD_ENABLE */
87 return true;
88}
89
90void timer_stop(void)
91{
92 TCCMD = (0 << 0); /* TD_ENABLE */
93}
94
diff --git a/firmware/target/arm/thread-arm.c b/firmware/target/arm/thread-arm.c
index 9ea3d0bef9..84a3aecbd7 100644
--- a/firmware/target/arm/thread-arm.c
+++ b/firmware/target/arm/thread-arm.c
@@ -93,7 +93,8 @@ static inline void load_context(const void* addr)
93 93
94#if defined(CPU_TCC780X) || defined(CPU_TCC77X) /* Single core only for now */ \ 94#if defined(CPU_TCC780X) || defined(CPU_TCC77X) /* Single core only for now */ \
95|| CONFIG_CPU == IMX31L || CONFIG_CPU == DM320 || CONFIG_CPU == AS3525 \ 95|| CONFIG_CPU == IMX31L || CONFIG_CPU == DM320 || CONFIG_CPU == AS3525 \
96|| CONFIG_CPU == S3C2440 || CONFIG_CPU == S5L8701 || CONFIG_CPU == AS3525v2 96|| CONFIG_CPU == S3C2440 || CONFIG_CPU == S5L8701 || CONFIG_CPU == AS3525v2 \
97|| CONFIG_CPU == S5L8702
97/* Use the generic ARMv4/v5/v6 wait for IRQ */ 98/* Use the generic ARMv4/v5/v6 wait for IRQ */
98static inline void core_sleep(void) 99static inline void core_sleep(void)
99{ 100{
diff --git a/tools/configure b/tools/configure
index 1b5721008d..7e53cd4047 100755
--- a/tools/configure
+++ b/tools/configure
@@ -1068,32 +1068,31 @@ cat <<EOF
1068 6) AV300 26) Mini 2G 1068 6) AV300 26) Mini 2G
1069 ==Toshiba== 27) 1G, 2G 1069 ==Toshiba== 27) 1G, 2G
1070 ==Cowon/iAudio== 40) Gigabeat F/X 28) Nano 2G 1070 ==Cowon/iAudio== 40) Gigabeat F/X 28) Nano 2G
1071 30) X5/X5V/X5L 41) Gigabeat S 1071 30) X5/X5V/X5L 41) Gigabeat S 29) Classic/6G
1072 31) M5/M5L ==SanDisk== 1072 31) M5/M5L
1073 32) 7 ==Olympus= 50) Sansa e200 1073 32) 7 ==Olympus= ==SanDisk==
1074 33) D2 70) M:Robe 500 51) Sansa e200R 1074 33) D2 70) M:Robe 500 50) Sansa e200
1075 34) M3/M3L 71) M:Robe 100 52) Sansa c200 1075 34) M3/M3L 71) M:Robe 100 51) Sansa e200R
1076 53) Sansa m200 1076 52) Sansa c200
1077 ==Creative== ==Philips== 54) Sansa c100 1077 ==Creative== ==Philips== 53) Sansa m200
1078 90) Zen Vision:M 30GB 100) GoGear SA9200 55) Sansa Clip 1078 90) Zen Vision:M 30GB 100) GoGear SA9200 54) Sansa c100
1079 91) Zen Vision:M 60GB 101) GoGear HDD1630/ 56) Sansa e200v2 1079 91) Zen Vision:M 60GB 101) GoGear HDD1630/ 55) Sansa Clip
1080 92) Zen Vision HDD1830 57) Sansa m200v4 1080 92) Zen Vision HDD1830 56) Sansa e200v2
1081 102) GoGear HDD6330 58) Sansa Fuze 1081 102) GoGear HDD6330 57) Sansa m200v4
1082 ==Onda== 59) Sansa c200v2 1082 ==Onda== 58) Sansa Fuze
1083 120) VX747 ==Meizu== 60) Sansa Clipv2 1083 120) VX747 ==Meizu== 59) Sansa c200v2
1084 121) VX767 110) M6SL 61) Sansa View 1084 121) VX767 110) M6SL 60) Sansa Clipv2
1085 122) VX747+ 111) M6SP 62) Sansa Clip+ 1085 122) VX747+ 111) M6SP 61) Sansa View
1086 123) VX777 112) M3 63) Sansa Fuze v2 1086 123) VX777 112) M3 62) Sansa Clip+
1087 1087 63) Sansa Fuze v2
1088 ==Logik== 1088 ==Samsung== ==Tatung==
1089 ==Samsung== ==Tatung== 80) DAX 1GB MP3/DAB 1089 140) YH-820 150) Elio TPJ-1022 ==Logik==
1090 140) YH-820 150) Elio TPJ-1022 1090 141) YH-920 80) DAX 1GB MP3/DAB
1091 141) YH-920 ==Lyre project== 1091 142) YH-925 ==Packard Bell==
1092 142) YH-925 ==Packard Bell== 130) Lyre proto 1 1092 143) YP-S3 160) Vibe 500 ==Lyre project==
1093 143) YP-S3 160) Vibe 500 131) Mini2440 1093 130) Lyre proto 1
1094 1094 ==MPIO== == Application == 131) Mini2440
1095 ==MPIO== == Application == 1095 170) HD200 200) Application
1096 170) HD200 200) Application
1097 171) HD300 1096 171) HD300
1098 1097
1099EOF 1098EOF
@@ -1660,6 +1659,29 @@ fi
1660 t_model="ipodnano2g" 1659 t_model="ipodnano2g"
1661 ;; 1660 ;;
1662 1661
1662 29|ipod6g)
1663 target_id=71
1664 modelname="ipod6g"
1665 target="-DIPOD_6G"
1666 memory=64 # always
1667 arm926ejscc
1668 tool="$rootdir/tools/scramble -add=ip6g"
1669 bmp2rb_mono="$rootdir/tools/bmp2rb -f 0"
1670 bmp2rb_native="$rootdir/tools/bmp2rb -f 4"
1671 output="rockbox.ipod"
1672 appextra="recorder:gui:radio"
1673 plugins="yes"
1674 swcodec="yes"
1675 bootoutput="bootloader-$modelname.ipod"
1676 # toolset is the tools within the tools directory that we build for
1677 # this particular target.
1678 toolset=$ipodbitmaptools
1679 # architecture, manufacturer and model for the target-tree build
1680 t_cpu="arm"
1681 t_manufacturer="s5l8702"
1682 t_model="ipod6g"
1683 ;;
1684
1663 30|iaudiox5) 1685 30|iaudiox5)
1664 target_id=12 1686 target_id=12
1665 modelname="iaudiox5" 1687 modelname="iaudiox5"
diff --git a/tools/scramble.c b/tools/scramble.c
index b460d51c5e..c18631a2f5 100644
--- a/tools/scramble.c
+++ b/tools/scramble.c
@@ -125,7 +125,8 @@ void usage(void)
125 "\t tpj2, c200, e200, giga, gigs, m100, m500, d2,\n"); 125 "\t tpj2, c200, e200, giga, gigs, m100, m500, d2,\n");
126 printf("\t 9200, 1630, 6330, ldax, m200, c100, clip, e2v2,\n" 126 printf("\t 9200, 1630, 6330, ldax, m200, c100, clip, e2v2,\n"
127 "\t m2v4, fuze, c2v2, clv2, y820, y920, y925, x747,\n" 127 "\t m2v4, fuze, c2v2, clv2, y820, y920, y925, x747,\n"
128 "\t 747p, x777, nn2g, m244, cli+, fuz2, hd20, hd30)\n"); 128 "\t 747p, x777, nn2g, m244, cli+, fuz2, hd20, hd30,\n"
129 "\t ip6g)\n");
129 printf("\nNo option results in Archos standard player/recorder format.\n"); 130 printf("\nNo option results in Archos standard player/recorder format.\n");
130 131
131 exit(1); 132 exit(1);
@@ -332,6 +333,8 @@ int main (int argc, char** argv)
332 modelnum = 69; 333 modelnum = 69;
333 else if (!strcmp(&argv[1][5], "hd30")) /* MPIO HD300 */ 334 else if (!strcmp(&argv[1][5], "hd30")) /* MPIO HD300 */
334 modelnum = 70; 335 modelnum = 70;
336 else if (!strcmp(&argv[1][5], "ip6g")) /* iPod Classic/6G */
337 modelnum = 71;
335 else { 338 else {
336 fprintf(stderr, "unsupported model: %s\n", &argv[1][5]); 339 fprintf(stderr, "unsupported model: %s\n", &argv[1][5]);
337 return 2; 340 return 2;
generated by cgit v1.2.3 (git 2.39.1) at 2024-10-05 21:41:48 +0000